| blob | 628c77b0b3865b6239b1f252c1ebe8736e4c35bb |
1 /*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
13 #include <dt-bindings/clock/am3.h>
15 / {
16 compatible = "ti,am33xx";
17 interrupt-parent = <&intc>;
18 #address-cells = <1>;
19 #size-cells = <1>;
20 chosen { };
22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 serial0 = &uart0;
27 serial1 = &uart1;
28 serial2 = &uart2;
29 serial3 = &uart3;
30 serial4 = &uart4;
31 serial5 = &uart5;
32 d_can0 = &dcan0;
33 d_can1 = &dcan1;
34 usb0 = &usb0;
35 usb1 = &usb1;
36 phy0 = &usb0_phy;
37 phy1 = &usb1_phy;
38 ethernet0 = &cpsw_emac0;
39 ethernet1 = &cpsw_emac1;
40 spi0 = &spi0;
41 spi1 = &spi1;
42 };
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
47 cpu@0 {
48 compatible = "arm,cortex-a8";
49 device_type = "cpu";
50 reg = <0>;
52 operating-points-v2 = <&cpu0_opp_table>;
54 clocks = <&dpll_mpu_ck>;
55 clock-names = "cpu";
57 clock-latency = <300000>; /* From omap-cpufreq driver */
58 };
59 };
61 cpu0_opp_table: opp-table {
62 compatible = "operating-points-v2-ti-cpu";
63 syscon = <&scm_conf>;
65 /*
66 * The three following nodes are marked with opp-suspend
67 * because the can not be enabled simultaneously on a
68 * single SoC.
69 */
70 opp50-300000000 {
71 opp-hz = /bits/ 64 <300000000>;
72 opp-microvolt = <950000 931000 969000>;
73 opp-supported-hw = <0x06 0x0010>;
74 opp-suspend;
75 };
77 opp100-275000000 {
78 opp-hz = /bits/ 64 <275000000>;
79 opp-microvolt = <1100000 1078000 1122000>;
80 opp-supported-hw = <0x01 0x00FF>;
81 opp-suspend;
82 };
84 opp100-300000000 {
85 opp-hz = /bits/ 64 <300000000>;
86 opp-microvolt = <1100000 1078000 1122000>;
87 opp-supported-hw = <0x06 0x0020>;
88 opp-suspend;
89 };
91 opp100-500000000 {
92 opp-hz = /bits/ 64 <500000000>;
93 opp-microvolt = <1100000 1078000 1122000>;
94 opp-supported-hw = <0x01 0xFFFF>;
95 };
97 opp100-600000000 {
98 opp-hz = /bits/ 64 <600000000>;
99 opp-microvolt = <1100000 1078000 1122000>;
100 opp-supported-hw = <0x06 0x0040>;
101 };
103 opp120-600000000 {
104 opp-hz = /bits/ 64 <600000000>;
105 opp-microvolt = <1200000 1176000 1224000>;
106 opp-supported-hw = <0x01 0xFFFF>;
107 };
109 opp120-720000000 {
110 opp-hz = /bits/ 64 <720000000>;
111 opp-microvolt = <1200000 1176000 1224000>;
112 opp-supported-hw = <0x06 0x0080>;
113 };
115 oppturbo-720000000 {
116 opp-hz = /bits/ 64 <720000000>;
117 opp-microvolt = <1260000 1234800 1285200>;
118 opp-supported-hw = <0x01 0xFFFF>;
119 };
121 oppturbo-800000000 {
122 opp-hz = /bits/ 64 <800000000>;
123 opp-microvolt = <1260000 1234800 1285200>;
124 opp-supported-hw = <0x06 0x0100>;
125 };
127 oppnitro-1000000000 {
128 opp-hz = /bits/ 64 <1000000000>;
129 opp-microvolt = <1325000 1298500 1351500>;
130 opp-supported-hw = <0x04 0x0200>;
131 };
132 };
134 pmu@4b000000 {
135 compatible = "arm,cortex-a8-pmu";
136 interrupts = <3>;
137 reg = <0x4b000000 0x1000000>;
138 ti,hwmods = "debugss";
139 };
141 /*
142 * The soc node represents the soc top level view. It is used for IPs
143 * that are not memory mapped in the MPU view or for the MPU itself.
144 */
145 soc {
146 compatible = "ti,omap-infra";
147 mpu {
148 compatible = "ti,omap3-mpu";
149 ti,hwmods = "mpu";
150 };
151 };
153 /*
154 * XXX: Use a flat representation of the AM33XX interconnect.
155 * The real AM33XX interconnect network is quite complex. Since
156 * it will not bring real advantage to represent that in DT
157 * for the moment, just use a fake OCP bus entry to represent
158 * the whole bus hierarchy.
159 */
160 ocp {
161 compatible = "simple-bus";
162 #address-cells = <1>;
163 #size-cells = <1>;
164 ranges;
165 ti,hwmods = "l3_main";
167 l4_wkup: l4_wkup@44c00000 {
168 compatible = "ti,am3-l4-wkup", "simple-bus";
169 #address-cells = <1>;
170 #size-cells = <1>;
171 ranges = <0 0x44c00000 0x280000>;
173 wkup_m3: wkup_m3@100000 {
174 compatible = "ti,am3352-wkup-m3";
175 reg = <0x100000 0x4000>,
176 <0x180000 0x2000>;
177 reg-names = "umem", "dmem";
178 ti,hwmods = "wkup_m3";
179 ti,pm-firmware = "am335x-pm-firmware.elf";
180 };
182 prcm: prcm@200000 {
183 compatible = "ti,am3-prcm", "simple-bus";
184 reg = <0x200000 0x4000>;
185 #address-cells = <1>;
186 #size-cells = <1>;
187 ranges = <0 0x200000 0x4000>;
189 prcm_clocks: clocks {
190 #address-cells = <1>;
191 #size-cells = <0>;
192 };
194 prcm_clockdomains: clockdomains {
195 };
196 };
198 scm: scm@210000 {
199 compatible = "ti,am3-scm", "simple-bus";
200 reg = <0x210000 0x2000>;
201 #address-cells = <1>;
202 #size-cells = <1>;
203 #pinctrl-cells = <1>;
204 ranges = <0 0x210000 0x2000>;
206 am33xx_pinmux: pinmux@800 {
207 compatible = "pinctrl-single";
208 reg = <0x800 0x238>;
209 #address-cells = <1>;
210 #size-cells = <0>;
211 #pinctrl-cells = <1>;
212 pinctrl-single,register-width = <32>;
213 pinctrl-single,function-mask = <0x7f>;
214 };
216 scm_conf: scm_conf@0 {
217 compatible = "syscon", "simple-bus";
218 reg = <0x0 0x800>;
219 #address-cells = <1>;
220 #size-cells = <1>;
221 ranges = <0 0 0x800>;
223 scm_clocks: clocks {
224 #address-cells = <1>;
225 #size-cells = <0>;
226 };
227 };
229 wkup_m3_ipc: wkup_m3_ipc@1324 {
230 compatible = "ti,am3352-wkup-m3-ipc";
231 reg = <0x1324 0x24>;
232 interrupts = <78>;
233 ti,rproc = <&wkup_m3>;
234 mboxes = <&mailbox &mbox_wkupm3>;
235 };
237 edma_xbar: dma-router@f90 {
238 compatible = "ti,am335x-edma-crossbar";
239 reg = <0xf90 0x40>;
240 #dma-cells = <3>;
241 dma-requests = <32>;
242 dma-masters = <&edma>;
243 };
245 scm_clockdomains: clockdomains {
246 };
247 };
248 };
250 intc: interrupt-controller@48200000 {
251 compatible = "ti,am33xx-intc";
252 interrupt-controller;
253 #interrupt-cells = <1>;
254 reg = <0x48200000 0x1000>;
255 };
257 edma: edma@49000000 {
258 compatible = "ti,edma3-tpcc";
259 ti,hwmods = "tpcc";
260 reg = <0x49000000 0x10000>;
261 reg-names = "edma3_cc";
262 interrupts = <12 13 14>;
263 interrupt-names = "edma3_ccint", "edma3_mperr",
264 "edma3_ccerrint";
265 dma-requests = <64>;
266 #dma-cells = <2>;
268 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
269 <&edma_tptc2 0>;
271 ti,edma-memcpy-channels = <20 21>;
272 };
274 edma_tptc0: tptc@49800000 {
275 compatible = "ti,edma3-tptc";
276 ti,hwmods = "tptc0";
277 reg = <0x49800000 0x100000>;
278 interrupts = <112>;
279 interrupt-names = "edma3_tcerrint";
280 };
282 edma_tptc1: tptc@49900000 {
283 compatible = "ti,edma3-tptc";
284 ti,hwmods = "tptc1";
285 reg = <0x49900000 0x100000>;
286 interrupts = <113>;
287 interrupt-names = "edma3_tcerrint";
288 };
290 edma_tptc2: tptc@49a00000 {
291 compatible = "ti,edma3-tptc";
292 ti,hwmods = "tptc2";
293 reg = <0x49a00000 0x100000>;
294 interrupts = <114>;
295 interrupt-names = "edma3_tcerrint";
296 };
298 gpio0: gpio@44e07000 {
299 compatible = "ti,omap4-gpio";
300 ti,hwmods = "gpio1";
301 gpio-controller;
302 #gpio-cells = <2>;
303 interrupt-controller;
304 #interrupt-cells = <2>;
305 reg = <0x44e07000 0x1000>;
306 interrupts = <96>;
307 };
309 gpio1: gpio@4804c000 {
310 compatible = "ti,omap4-gpio";
311 ti,hwmods = "gpio2";
312 gpio-controller;
313 #gpio-cells = <2>;
314 interrupt-controller;
315 #interrupt-cells = <2>;
316 reg = <0x4804c000 0x1000>;
317 interrupts = <98>;
318 };
320 gpio2: gpio@481ac000 {
321 compatible = "ti,omap4-gpio";
322 ti,hwmods = "gpio3";
323 gpio-controller;
324 #gpio-cells = <2>;
325 interrupt-controller;
326 #interrupt-cells = <2>;
327 reg = <0x481ac000 0x1000>;
328 interrupts = <32>;
329 };
331 gpio3: gpio@481ae000 {
332 compatible = "ti,omap4-gpio";
333 ti,hwmods = "gpio4";
334 gpio-controller;
335 #gpio-cells = <2>;
336 interrupt-controller;
337 #interrupt-cells = <2>;
338 reg = <0x481ae000 0x1000>;
339 interrupts = <62>;
340 };
342 uart0: serial@44e09000 {
343 compatible = "ti,am3352-uart", "ti,omap3-uart";
344 ti,hwmods = "uart1";
345 clock-frequency = <48000000>;
346 reg = <0x44e09000 0x2000>;
347 interrupts = <72>;
348 status = "disabled";
349 dmas = <&edma 26 0>, <&edma 27 0>;
350 dma-names = "tx", "rx";
351 };
353 uart1: serial@48022000 {
354 compatible = "ti,am3352-uart", "ti,omap3-uart";
355 ti,hwmods = "uart2";
356 clock-frequency = <48000000>;
357 reg = <0x48022000 0x2000>;
358 interrupts = <73>;
359 status = "disabled";
360 dmas = <&edma 28 0>, <&edma 29 0>;
361 dma-names = "tx", "rx";
362 };
364 uart2: serial@48024000 {
365 compatible = "ti,am3352-uart", "ti,omap3-uart";
366 ti,hwmods = "uart3";
367 clock-frequency = <48000000>;
368 reg = <0x48024000 0x2000>;
369 interrupts = <74>;
370 status = "disabled";
371 dmas = <&edma 30 0>, <&edma 31 0>;
372 dma-names = "tx", "rx";
373 };
375 uart3: serial@481a6000 {
376 compatible = "ti,am3352-uart", "ti,omap3-uart";
377 ti,hwmods = "uart4";
378 clock-frequency = <48000000>;
379 reg = <0x481a6000 0x2000>;
380 interrupts = <44>;
381 status = "disabled";
382 };
384 uart4: serial@481a8000 {
385 compatible = "ti,am3352-uart", "ti,omap3-uart";
386 ti,hwmods = "uart5";
387 clock-frequency = <48000000>;
388 reg = <0x481a8000 0x2000>;
389 interrupts = <45>;
390 status = "disabled";
391 };
393 uart5: serial@481aa000 {
394 compatible = "ti,am3352-uart", "ti,omap3-uart";
395 ti,hwmods = "uart6";
396 clock-frequency = <48000000>;
397 reg = <0x481aa000 0x2000>;
398 interrupts = <46>;
399 status = "disabled";
400 };
402 i2c0: i2c@44e0b000 {
403 compatible = "ti,omap4-i2c";
404 #address-cells = <1>;
405 #size-cells = <0>;
406 ti,hwmods = "i2c1";
407 reg = <0x44e0b000 0x1000>;
408 interrupts = <70>;
409 status = "disabled";
410 };
412 i2c1: i2c@4802a000 {
413 compatible = "ti,omap4-i2c";
414 #address-cells = <1>;
415 #size-cells = <0>;
416 ti,hwmods = "i2c2";
417 reg = <0x4802a000 0x1000>;
418 interrupts = <71>;
419 status = "disabled";
420 };
422 i2c2: i2c@4819c000 {
423 compatible = "ti,omap4-i2c";
424 #address-cells = <1>;
425 #size-cells = <0>;
426 ti,hwmods = "i2c3";
427 reg = <0x4819c000 0x1000>;
428 interrupts = <30>;
429 status = "disabled";
430 };
432 mmc1: mmc@48060000 {
433 compatible = "ti,omap4-hsmmc";
434 ti,hwmods = "mmc1";
435 ti,dual-volt;
436 ti,needs-special-reset;
437 ti,needs-special-hs-handling;
438 dmas = <&edma_xbar 24 0 0
439 &edma_xbar 25 0 0>;
440 dma-names = "tx", "rx";
441 interrupts = <64>;
442 reg = <0x48060000 0x1000>;
443 status = "disabled";
444 };
446 mmc2: mmc@481d8000 {
447 compatible = "ti,omap4-hsmmc";
448 ti,hwmods = "mmc2";
449 ti,needs-special-reset;
450 dmas = <&edma 2 0
451 &edma 3 0>;
452 dma-names = "tx", "rx";
453 interrupts = <28>;
454 reg = <0x481d8000 0x1000>;
455 status = "disabled";
456 };
458 mmc3: mmc@47810000 {
459 compatible = "ti,omap4-hsmmc";
460 ti,hwmods = "mmc3";
461 ti,needs-special-reset;
462 interrupts = <29>;
463 reg = <0x47810000 0x1000>;
464 status = "disabled";
465 };
467 hwspinlock: spinlock@480ca000 {
468 compatible = "ti,omap4-hwspinlock";
469 reg = <0x480ca000 0x1000>;
470 ti,hwmods = "spinlock";
471 #hwlock-cells = <1>;
472 };
474 wdt2: wdt@44e35000 {
475 compatible = "ti,omap3-wdt";
476 ti,hwmods = "wd_timer2";
477 reg = <0x44e35000 0x1000>;
478 interrupts = <91>;
479 };
481 dcan0: can@481cc000 {
482 compatible = "ti,am3352-d_can";
483 ti,hwmods = "d_can0";
484 reg = <0x481cc000 0x2000>;
485 clocks = <&dcan0_fck>;
486 clock-names = "fck";
487 syscon-raminit = <&scm_conf 0x644 0>;
488 interrupts = <52>;
489 status = "disabled";
490 };
492 dcan1: can@481d0000 {
493 compatible = "ti,am3352-d_can";
494 ti,hwmods = "d_can1";
495 reg = <0x481d0000 0x2000>;
496 clocks = <&dcan1_fck>;
497 clock-names = "fck";
498 syscon-raminit = <&scm_conf 0x644 1>;
499 interrupts = <55>;
500 status = "disabled";
501 };
503 mailbox: mailbox@480c8000 {
504 compatible = "ti,omap4-mailbox";
505 reg = <0x480C8000 0x200>;
506 interrupts = <77>;
507 ti,hwmods = "mailbox";
508 #mbox-cells = <1>;
509 ti,mbox-num-users = <4>;
510 ti,mbox-num-fifos = <8>;
511 mbox_wkupm3: wkup_m3 {
512 ti,mbox-send-noirq;
513 ti,mbox-tx = <0 0 0>;
514 ti,mbox-rx = <0 0 3>;
515 };
516 };
518 timer1: timer@44e31000 {
519 compatible = "ti,am335x-timer-1ms";
520 reg = <0x44e31000 0x400>;
521 interrupts = <67>;
522 ti,hwmods = "timer1";
523 ti,timer-alwon;
524 clocks = <&timer1_fck>;
525 clock-names = "fck";
526 };
528 timer2: timer@48040000 {
529 compatible = "ti,am335x-timer";
530 reg = <0x48040000 0x400>;
531 interrupts = <68>;
532 ti,hwmods = "timer2";
533 clocks = <&timer2_fck>;
534 clock-names = "fck";
535 };
537 timer3: timer@48042000 {
538 compatible = "ti,am335x-timer";
539 reg = <0x48042000 0x400>;
540 interrupts = <69>;
541 ti,hwmods = "timer3";
542 };
544 timer4: timer@48044000 {
545 compatible = "ti,am335x-timer";
546 reg = <0x48044000 0x400>;
547 interrupts = <92>;
548 ti,hwmods = "timer4";
549 ti,timer-pwm;
550 };
552 timer5: timer@48046000 {
553 compatible = "ti,am335x-timer";
554 reg = <0x48046000 0x400>;
555 interrupts = <93>;
556 ti,hwmods = "timer5";
557 ti,timer-pwm;
558 };
560 timer6: timer@48048000 {
561 compatible = "ti,am335x-timer";
562 reg = <0x48048000 0x400>;
563 interrupts = <94>;
564 ti,hwmods = "timer6";
565 ti,timer-pwm;
566 };
568 timer7: timer@4804a000 {
569 compatible = "ti,am335x-timer";
570 reg = <0x4804a000 0x400>;
571 interrupts = <95>;
572 ti,hwmods = "timer7";
573 ti,timer-pwm;
574 };
576 rtc: rtc@44e3e000 {
577 compatible = "ti,am3352-rtc", "ti,da830-rtc";
578 reg = <0x44e3e000 0x1000>;
579 interrupts = <75
580 76>;
581 ti,hwmods = "rtc";
582 clocks = <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
583 clock-names = "int-clk";
584 };
586 spi0: spi@48030000 {
587 compatible = "ti,omap4-mcspi";
588 #address-cells = <1>;
589 #size-cells = <0>;
590 reg = <0x48030000 0x400>;
591 interrupts = <65>;
592 ti,spi-num-cs = <2>;
593 ti,hwmods = "spi0";
594 dmas = <&edma 16 0
595 &edma 17 0
596 &edma 18 0
597 &edma 19 0>;
598 dma-names = "tx0", "rx0", "tx1", "rx1";
599 status = "disabled";
600 };
602 spi1: spi@481a0000 {
603 compatible = "ti,omap4-mcspi";
604 #address-cells = <1>;
605 #size-cells = <0>;
606 reg = <0x481a0000 0x400>;
607 interrupts = <125>;
608 ti,spi-num-cs = <2>;
609 ti,hwmods = "spi1";
610 dmas = <&edma 42 0
611 &edma 43 0
612 &edma 44 0
613 &edma 45 0>;
614 dma-names = "tx0", "rx0", "tx1", "rx1";
615 status = "disabled";
616 };
618 usb: usb@47400000 {
619 compatible = "ti,am33xx-usb";
620 reg = <0x47400000 0x1000>;
621 ranges;
622 #address-cells = <1>;
623 #size-cells = <1>;
624 ti,hwmods = "usb_otg_hs";
625 status = "disabled";
627 usb_ctrl_mod: control@44e10620 {
628 compatible = "ti,am335x-usb-ctrl-module";
629 reg = <0x44e10620 0x10
630 0x44e10648 0x4>;
631 reg-names = "phy_ctrl", "wakeup";
632 status = "disabled";
633 };
635 usb0_phy: usb-phy@47401300 {
636 compatible = "ti,am335x-usb-phy";
637 reg = <0x47401300 0x100>;
638 reg-names = "phy";
639 status = "disabled";
640 ti,ctrl_mod = <&usb_ctrl_mod>;
641 #phy-cells = <0>;
642 };
644 usb0: usb@47401000 {
645 compatible = "ti,musb-am33xx";
646 status = "disabled";
647 reg = <0x47401400 0x400
648 0x47401000 0x200>;
649 reg-names = "mc", "control";
651 interrupts = <18>;
652 interrupt-names = "mc";
653 dr_mode = "otg";
654 mentor,multipoint = <1>;
655 mentor,num-eps = <16>;
656 mentor,ram-bits = <12>;
657 mentor,power = <500>;
658 phys = <&usb0_phy>;
660 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
661 &cppi41dma 2 0 &cppi41dma 3 0
662 &cppi41dma 4 0 &cppi41dma 5 0
663 &cppi41dma 6 0 &cppi41dma 7 0
664 &cppi41dma 8 0 &cppi41dma 9 0
665 &cppi41dma 10 0 &cppi41dma 11 0
666 &cppi41dma 12 0 &cppi41dma 13 0
667 &cppi41dma 14 0 &cppi41dma 0 1
668 &cppi41dma 1 1 &cppi41dma 2 1
669 &cppi41dma 3 1 &cppi41dma 4 1
670 &cppi41dma 5 1 &cppi41dma 6 1
671 &cppi41dma 7 1 &cppi41dma 8 1
672 &cppi41dma 9 1 &cppi41dma 10 1
673 &cppi41dma 11 1 &cppi41dma 12 1
674 &cppi41dma 13 1 &cppi41dma 14 1>;
675 dma-names =
676 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
677 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
678 "rx14", "rx15",
679 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
680 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
681 "tx14", "tx15";
682 };
684 usb1_phy: usb-phy@47401b00 {
685 compatible = "ti,am335x-usb-phy";
686 reg = <0x47401b00 0x100>;
687 reg-names = "phy";
688 status = "disabled";
689 ti,ctrl_mod = <&usb_ctrl_mod>;
690 #phy-cells = <0>;
691 };
693 usb1: usb@47401800 {
694 compatible = "ti,musb-am33xx";
695 status = "disabled";
696 reg = <0x47401c00 0x400
697 0x47401800 0x200>;
698 reg-names = "mc", "control";
699 interrupts = <19>;
700 interrupt-names = "mc";
701 dr_mode = "otg";
702 mentor,multipoint = <1>;
703 mentor,num-eps = <16>;
704 mentor,ram-bits = <12>;
705 mentor,power = <500>;
706 phys = <&usb1_phy>;
708 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
709 &cppi41dma 17 0 &cppi41dma 18 0
710 &cppi41dma 19 0 &cppi41dma 20 0
711 &cppi41dma 21 0 &cppi41dma 22 0
712 &cppi41dma 23 0 &cppi41dma 24 0
713 &cppi41dma 25 0 &cppi41dma 26 0
714 &cppi41dma 27 0 &cppi41dma 28 0
715 &cppi41dma 29 0 &cppi41dma 15 1
716 &cppi41dma 16 1 &cppi41dma 17 1
717 &cppi41dma 18 1 &cppi41dma 19 1
718 &cppi41dma 20 1 &cppi41dma 21 1
719 &cppi41dma 22 1 &cppi41dma 23 1
720 &cppi41dma 24 1 &cppi41dma 25 1
721 &cppi41dma 26 1 &cppi41dma 27 1
722 &cppi41dma 28 1 &cppi41dma 29 1>;
723 dma-names =
724 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
725 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
726 "rx14", "rx15",
727 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
728 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
729 "tx14", "tx15";
730 };
732 cppi41dma: dma-controller@47402000 {
733 compatible = "ti,am3359-cppi41";
734 reg = <0x47400000 0x1000
735 0x47402000 0x1000
736 0x47403000 0x1000
737 0x47404000 0x4000>;
738 reg-names = "glue", "controller", "scheduler", "queuemgr";
739 interrupts = <17>;
740 interrupt-names = "glue";
741 #dma-cells = <2>;
742 #dma-channels = <30>;
743 #dma-requests = <256>;
744 status = "disabled";
745 };
746 };
748 epwmss0: epwmss@48300000 {
749 compatible = "ti,am33xx-pwmss";
750 reg = <0x48300000 0x10>;
751 ti,hwmods = "epwmss0";
752 #address-cells = <1>;
753 #size-cells = <1>;
754 status = "disabled";
755 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
756 0x48300180 0x48300180 0x80 /* EQEP */
757 0x48300200 0x48300200 0x80>; /* EHRPWM */
759 ecap0: ecap@48300100 {
760 compatible = "ti,am3352-ecap",
761 "ti,am33xx-ecap";
762 #pwm-cells = <3>;
763 reg = <0x48300100 0x80>;
764 clocks = <&l4ls_gclk>;
765 clock-names = "fck";
766 interrupts = <31>;
767 interrupt-names = "ecap0";
768 status = "disabled";
769 };
771 ehrpwm0: pwm@48300200 {
772 compatible = "ti,am3352-ehrpwm",
773 "ti,am33xx-ehrpwm";
774 #pwm-cells = <3>;
775 reg = <0x48300200 0x80>;
776 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
777 clock-names = "tbclk", "fck";
778 status = "disabled";
779 };
780 };
782 epwmss1: epwmss@48302000 {
783 compatible = "ti,am33xx-pwmss";
784 reg = <0x48302000 0x10>;
785 ti,hwmods = "epwmss1";
786 #address-cells = <1>;
787 #size-cells = <1>;
788 status = "disabled";
789 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
790 0x48302180 0x48302180 0x80 /* EQEP */
791 0x48302200 0x48302200 0x80>; /* EHRPWM */
793 ecap1: ecap@48302100 {
794 compatible = "ti,am3352-ecap",
795 "ti,am33xx-ecap";
796 #pwm-cells = <3>;
797 reg = <0x48302100 0x80>;
798 clocks = <&l4ls_gclk>;
799 clock-names = "fck";
800 interrupts = <47>;
801 interrupt-names = "ecap1";
802 status = "disabled";
803 };
805 ehrpwm1: pwm@48302200 {
806 compatible = "ti,am3352-ehrpwm",
807 "ti,am33xx-ehrpwm";
808 #pwm-cells = <3>;
809 reg = <0x48302200 0x80>;
810 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
811 clock-names = "tbclk", "fck";
812 status = "disabled";
813 };
814 };
816 epwmss2: epwmss@48304000 {
817 compatible = "ti,am33xx-pwmss";
818 reg = <0x48304000 0x10>;
819 ti,hwmods = "epwmss2";
820 #address-cells = <1>;
821 #size-cells = <1>;
822 status = "disabled";
823 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
824 0x48304180 0x48304180 0x80 /* EQEP */
825 0x48304200 0x48304200 0x80>; /* EHRPWM */
827 ecap2: ecap@48304100 {
828 compatible = "ti,am3352-ecap",
829 "ti,am33xx-ecap";
830 #pwm-cells = <3>;
831 reg = <0x48304100 0x80>;
832 clocks = <&l4ls_gclk>;
833 clock-names = "fck";
834 interrupts = <61>;
835 interrupt-names = "ecap2";
836 status = "disabled";
837 };
839 ehrpwm2: pwm@48304200 {
840 compatible = "ti,am3352-ehrpwm",
841 "ti,am33xx-ehrpwm";
842 #pwm-cells = <3>;
843 reg = <0x48304200 0x80>;
844 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
845 clock-names = "tbclk", "fck";
846 status = "disabled";
847 };
848 };
850 mac: ethernet@4a100000 {
851 compatible = "ti,am335x-cpsw","ti,cpsw";
852 ti,hwmods = "cpgmac0";
853 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
854 clock-names = "fck", "cpts";
855 cpdma_channels = <8>;
856 ale_entries = <1024>;
857 bd_ram_size = <0x2000>;
858 mac_control = <0x20>;
859 slaves = <2>;
860 active_slave = <0>;
861 cpts_clock_mult = <0x80000000>;
862 cpts_clock_shift = <29>;
863 reg = <0x4a100000 0x800
864 0x4a101200 0x100>;
865 #address-cells = <1>;
866 #size-cells = <1>;
867 /*
868 * c0_rx_thresh_pend
869 * c0_rx_pend
870 * c0_tx_pend
871 * c0_misc_pend
872 */
873 interrupts = <40 41 42 43>;
874 ranges;
875 syscon = <&scm_conf>;
876 status = "disabled";
878 davinci_mdio: mdio@4a101000 {
879 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
880 #address-cells = <1>;
881 #size-cells = <0>;
882 ti,hwmods = "davinci_mdio";
883 bus_freq = <1000000>;
884 reg = <0x4a101000 0x100>;
885 status = "disabled";
886 };
888 cpsw_emac0: slave@4a100200 {
889 /* Filled in by U-Boot */
890 mac-address = [ 00 00 00 00 00 00 ];
891 };
893 cpsw_emac1: slave@4a100300 {
894 /* Filled in by U-Boot */
895 mac-address = [ 00 00 00 00 00 00 ];
896 };
898 phy_sel: cpsw-phy-sel@44e10650 {
899 compatible = "ti,am3352-cpsw-phy-sel";
900 reg= <0x44e10650 0x4>;
901 reg-names = "gmii-sel";
902 };
903 };
905 ocmcram: ocmcram@40300000 {
906 compatible = "mmio-sram";
907 reg = <0x40300000 0x10000>; /* 64k */
908 };
910 elm: elm@48080000 {
911 compatible = "ti,am3352-elm";
912 reg = <0x48080000 0x2000>;
913 interrupts = <4>;
914 ti,hwmods = "elm";
915 status = "disabled";
916 };
918 lcdc: lcdc@4830e000 {
919 compatible = "ti,am33xx-tilcdc";
920 reg = <0x4830e000 0x1000>;
921 interrupts = <36>;
922 ti,hwmods = "lcdc";
923 status = "disabled";
924 };
926 tscadc: tscadc@44e0d000 {
927 compatible = "ti,am3359-tscadc";
928 reg = <0x44e0d000 0x1000>;
929 interrupts = <16>;
930 ti,hwmods = "adc_tsc";
931 status = "disabled";
932 dmas = <&edma 53 0>, <&edma 57 0>;
933 dma-names = "fifo0", "fifo1";
935 tsc {
936 compatible = "ti,am3359-tsc";
937 };
938 am335x_adc: adc {
939 #io-channel-cells = <1>;
940 compatible = "ti,am3359-adc";
941 };
942 };
944 emif: emif@4c000000 {
945 compatible = "ti,emif-am3352";
946 reg = <0x4c000000 0x1000000>;
947 ti,hwmods = "emif";
948 };
950 gpmc: gpmc@50000000 {
951 compatible = "ti,am3352-gpmc";
952 ti,hwmods = "gpmc";
953 ti,no-idle-on-init;
954 reg = <0x50000000 0x2000>;
955 interrupts = <100>;
956 dmas = <&edma 52 0>;
957 dma-names = "rxtx";
958 gpmc,num-cs = <7>;
959 gpmc,num-waitpins = <2>;
960 #address-cells = <2>;
961 #size-cells = <1>;
962 interrupt-controller;
963 #interrupt-cells = <2>;
964 gpio-controller;
965 #gpio-cells = <2>;
966 status = "disabled";
967 };
969 sham: sham@53100000 {
970 compatible = "ti,omap4-sham";
971 ti,hwmods = "sham";
972 reg = <0x53100000 0x200>;
973 interrupts = <109>;
974 dmas = <&edma 36 0>;
975 dma-names = "rx";
976 };
978 aes: aes@53500000 {
979 compatible = "ti,omap4-aes";
980 ti,hwmods = "aes";
981 reg = <0x53500000 0xa0>;
982 interrupts = <103>;
983 dmas = <&edma 6 0>,
984 <&edma 5 0>;
985 dma-names = "tx", "rx";
986 };
988 mcasp0: mcasp@48038000 {
989 compatible = "ti,am33xx-mcasp-audio";
990 ti,hwmods = "mcasp0";
991 reg = <0x48038000 0x2000>,
992 <0x46000000 0x400000>;
993 reg-names = "mpu", "dat";
994 interrupts = <80>, <81>;
995 interrupt-names = "tx", "rx";
996 status = "disabled";
997 dmas = <&edma 8 2>,
998 <&edma 9 2>;
999 dma-names = "tx", "rx";
1000 };
1002 mcasp1: mcasp@4803c000 {
1003 compatible = "ti,am33xx-mcasp-audio";
1004 ti,hwmods = "mcasp1";
1005 reg = <0x4803C000 0x2000>,
1006 <0x46400000 0x400000>;
1007 reg-names = "mpu", "dat";
1008 interrupts = <82>, <83>;
1009 interrupt-names = "tx", "rx";
1010 status = "disabled";
1011 dmas = <&edma 10 2>,
1012 <&edma 11 2>;
1013 dma-names = "tx", "rx";
1014 };
1016 rng: rng@48310000 {
1017 compatible = "ti,omap4-rng";
1018 ti,hwmods = "rng";
1019 reg = <0x48310000 0x2000>;
1020 interrupts = <111>;
1021 };
1022 };
1023 };
1025 #include "am33xx-clocks.dtsi"