| blob | 964f3ef797289e2cfb3dd13291556aed35649719 |
1 /*
2 * Device Tree Source for AM4372 SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/clock/am4.h>
15 / {
16 compatible = "ti,am4372", "ti,am43";
17 interrupt-parent = <&wakeupgen>;
18 #address-cells = <1>;
19 #size-cells = <1>;
20 chosen { };
22 memory@0 {
23 device_type = "memory";
24 reg = <0 0>;
25 };
27 aliases {
28 i2c0 = &i2c0;
29 i2c1 = &i2c1;
30 i2c2 = &i2c2;
31 serial0 = &uart0;
32 serial1 = &uart1;
33 serial2 = &uart2;
34 serial3 = &uart3;
35 serial4 = &uart4;
36 serial5 = &uart5;
37 ethernet0 = &cpsw_emac0;
38 ethernet1 = &cpsw_emac1;
39 spi0 = &qspi;
40 };
42 cpus {
43 #address-cells = <1>;
44 #size-cells = <0>;
45 cpu: cpu@0 {
46 compatible = "arm,cortex-a9";
47 device_type = "cpu";
48 reg = <0>;
50 clocks = <&dpll_mpu_ck>;
51 clock-names = "cpu";
53 operating-points-v2 = <&cpu0_opp_table>;
55 clock-latency = <300000>; /* From omap-cpufreq driver */
56 };
57 };
59 cpu0_opp_table: opp-table {
60 compatible = "operating-points-v2-ti-cpu";
61 syscon = <&scm_conf>;
63 opp50-300000000 {
64 opp-hz = /bits/ 64 <300000000>;
65 opp-microvolt = <950000 931000 969000>;
66 opp-supported-hw = <0xFF 0x01>;
67 opp-suspend;
68 };
70 opp100-600000000 {
71 opp-hz = /bits/ 64 <600000000>;
72 opp-microvolt = <1100000 1078000 1122000>;
73 opp-supported-hw = <0xFF 0x04>;
74 };
76 opp120-720000000 {
77 opp-hz = /bits/ 64 <720000000>;
78 opp-microvolt = <1200000 1176000 1224000>;
79 opp-supported-hw = <0xFF 0x08>;
80 };
82 oppturbo-800000000 {
83 opp-hz = /bits/ 64 <800000000>;
84 opp-microvolt = <1260000 1234800 1285200>;
85 opp-supported-hw = <0xFF 0x10>;
86 };
88 oppnitro-1000000000 {
89 opp-hz = /bits/ 64 <1000000000>;
90 opp-microvolt = <1325000 1298500 1351500>;
91 opp-supported-hw = <0xFF 0x20>;
92 };
93 };
95 gic: interrupt-controller@48241000 {
96 compatible = "arm,cortex-a9-gic";
97 interrupt-controller;
98 #interrupt-cells = <3>;
99 reg = <0x48241000 0x1000>,
100 <0x48240100 0x0100>;
101 interrupt-parent = <&gic>;
102 };
104 wakeupgen: interrupt-controller@48281000 {
105 compatible = "ti,omap4-wugen-mpu";
106 interrupt-controller;
107 #interrupt-cells = <3>;
108 reg = <0x48281000 0x1000>;
109 interrupt-parent = <&gic>;
110 };
112 scu: scu@48240000 {
113 compatible = "arm,cortex-a9-scu";
114 reg = <0x48240000 0x100>;
115 };
117 global_timer: timer@48240200 {
118 compatible = "arm,cortex-a9-global-timer";
119 reg = <0x48240200 0x100>;
120 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
121 interrupt-parent = <&gic>;
122 clocks = <&mpu_periphclk>;
123 };
125 local_timer: timer@48240600 {
126 compatible = "arm,cortex-a9-twd-timer";
127 reg = <0x48240600 0x100>;
128 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
129 interrupt-parent = <&gic>;
130 clocks = <&mpu_periphclk>;
131 };
133 l2-cache-controller@48242000 {
134 compatible = "arm,pl310-cache";
135 reg = <0x48242000 0x1000>;
136 cache-unified;
137 cache-level = <2>;
138 };
140 ocp@44000000 {
141 compatible = "ti,am4372-l3-noc", "simple-bus";
142 #address-cells = <1>;
143 #size-cells = <1>;
144 ranges;
145 ti,hwmods = "l3_main";
146 reg = <0x44000000 0x400000
147 0x44800000 0x400000>;
148 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
149 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
151 l4_wkup: l4_wkup@44c00000 {
152 compatible = "ti,am4-l4-wkup", "simple-bus";
153 #address-cells = <1>;
154 #size-cells = <1>;
155 ranges = <0 0x44c00000 0x287000>;
157 wkup_m3: wkup_m3@100000 {
158 compatible = "ti,am4372-wkup-m3";
159 reg = <0x100000 0x4000>,
160 <0x180000 0x2000>;
161 reg-names = "umem", "dmem";
162 ti,hwmods = "wkup_m3";
163 ti,pm-firmware = "am335x-pm-firmware.elf";
164 };
166 prcm: prcm@1f0000 {
167 compatible = "ti,am4-prcm", "simple-bus";
168 reg = <0x1f0000 0x11000>;
169 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
170 #address-cells = <1>;
171 #size-cells = <1>;
172 ranges = <0 0x1f0000 0x11000>;
174 prcm_clocks: clocks {
175 #address-cells = <1>;
176 #size-cells = <0>;
177 };
179 prcm_clockdomains: clockdomains {
180 };
181 };
183 scm: scm@210000 {
184 compatible = "ti,am4-scm", "simple-bus";
185 reg = <0x210000 0x4000>;
186 #address-cells = <1>;
187 #size-cells = <1>;
188 ranges = <0 0x210000 0x4000>;
190 am43xx_pinmux: pinmux@800 {
191 compatible = "ti,am437-padconf",
192 "pinctrl-single";
193 reg = <0x800 0x31c>;
194 #address-cells = <1>;
195 #size-cells = <0>;
196 #pinctrl-cells = <1>;
197 #interrupt-cells = <1>;
198 interrupt-controller;
199 pinctrl-single,register-width = <32>;
200 pinctrl-single,function-mask = <0xffffffff>;
201 };
203 scm_conf: scm_conf@0 {
204 compatible = "syscon";
205 reg = <0x0 0x800>;
206 #address-cells = <1>;
207 #size-cells = <1>;
209 scm_clocks: clocks {
210 #address-cells = <1>;
211 #size-cells = <0>;
212 };
213 };
215 wkup_m3_ipc: wkup_m3_ipc@1324 {
216 compatible = "ti,am4372-wkup-m3-ipc";
217 reg = <0x1324 0x44>;
218 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
219 ti,rproc = <&wkup_m3>;
220 mboxes = <&mailbox &mbox_wkupm3>;
221 };
223 edma_xbar: dma-router@f90 {
224 compatible = "ti,am335x-edma-crossbar";
225 reg = <0xf90 0x40>;
226 #dma-cells = <3>;
227 dma-requests = <64>;
228 dma-masters = <&edma>;
229 };
231 scm_clockdomains: clockdomains {
232 };
233 };
234 };
236 emif: emif@4c000000 {
237 compatible = "ti,emif-am4372";
238 reg = <0x4c000000 0x1000000>;
239 ti,hwmods = "emif";
240 };
242 edma: edma@49000000 {
243 compatible = "ti,edma3-tpcc";
244 ti,hwmods = "tpcc";
245 reg = <0x49000000 0x10000>;
246 reg-names = "edma3_cc";
247 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
248 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
249 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
250 interrupt-names = "edma3_ccint", "edma3_mperr",
251 "edma3_ccerrint";
252 dma-requests = <64>;
253 #dma-cells = <2>;
255 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
256 <&edma_tptc2 0>;
258 ti,edma-memcpy-channels = <58 59>;
259 };
261 edma_tptc0: tptc@49800000 {
262 compatible = "ti,edma3-tptc";
263 ti,hwmods = "tptc0";
264 reg = <0x49800000 0x100000>;
265 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
266 interrupt-names = "edma3_tcerrint";
267 };
269 edma_tptc1: tptc@49900000 {
270 compatible = "ti,edma3-tptc";
271 ti,hwmods = "tptc1";
272 reg = <0x49900000 0x100000>;
273 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
274 interrupt-names = "edma3_tcerrint";
275 };
277 edma_tptc2: tptc@49a00000 {
278 compatible = "ti,edma3-tptc";
279 ti,hwmods = "tptc2";
280 reg = <0x49a00000 0x100000>;
281 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
282 interrupt-names = "edma3_tcerrint";
283 };
285 uart0: serial@44e09000 {
286 compatible = "ti,am4372-uart","ti,omap2-uart";
287 reg = <0x44e09000 0x2000>;
288 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
289 ti,hwmods = "uart1";
290 };
292 uart1: serial@48022000 {
293 compatible = "ti,am4372-uart","ti,omap2-uart";
294 reg = <0x48022000 0x2000>;
295 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
296 ti,hwmods = "uart2";
297 status = "disabled";
298 };
300 uart2: serial@48024000 {
301 compatible = "ti,am4372-uart","ti,omap2-uart";
302 reg = <0x48024000 0x2000>;
303 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
304 ti,hwmods = "uart3";
305 status = "disabled";
306 };
308 uart3: serial@481a6000 {
309 compatible = "ti,am4372-uart","ti,omap2-uart";
310 reg = <0x481a6000 0x2000>;
311 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
312 ti,hwmods = "uart4";
313 status = "disabled";
314 };
316 uart4: serial@481a8000 {
317 compatible = "ti,am4372-uart","ti,omap2-uart";
318 reg = <0x481a8000 0x2000>;
319 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
320 ti,hwmods = "uart5";
321 status = "disabled";
322 };
324 uart5: serial@481aa000 {
325 compatible = "ti,am4372-uart","ti,omap2-uart";
326 reg = <0x481aa000 0x2000>;
327 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
328 ti,hwmods = "uart6";
329 status = "disabled";
330 };
332 mailbox: mailbox@480c8000 {
333 compatible = "ti,omap4-mailbox";
334 reg = <0x480C8000 0x200>;
335 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
336 ti,hwmods = "mailbox";
337 #mbox-cells = <1>;
338 ti,mbox-num-users = <4>;
339 ti,mbox-num-fifos = <8>;
340 mbox_wkupm3: wkup_m3 {
341 ti,mbox-send-noirq;
342 ti,mbox-tx = <0 0 0>;
343 ti,mbox-rx = <0 0 3>;
344 };
345 };
347 timer1: timer@44e31000 {
348 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
349 reg = <0x44e31000 0x400>;
350 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
351 ti,timer-alwon;
352 ti,hwmods = "timer1";
353 clocks = <&timer1_fck>;
354 clock-names = "fck";
355 };
357 timer2: timer@48040000 {
358 compatible = "ti,am4372-timer","ti,am335x-timer";
359 reg = <0x48040000 0x400>;
360 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
361 ti,hwmods = "timer2";
362 clocks = <&timer2_fck>;
363 clock-names = "fck";
364 };
366 timer3: timer@48042000 {
367 compatible = "ti,am4372-timer","ti,am335x-timer";
368 reg = <0x48042000 0x400>;
369 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
370 ti,hwmods = "timer3";
371 status = "disabled";
372 };
374 timer4: timer@48044000 {
375 compatible = "ti,am4372-timer","ti,am335x-timer";
376 reg = <0x48044000 0x400>;
377 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
378 ti,timer-pwm;
379 ti,hwmods = "timer4";
380 status = "disabled";
381 };
383 timer5: timer@48046000 {
384 compatible = "ti,am4372-timer","ti,am335x-timer";
385 reg = <0x48046000 0x400>;
386 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
387 ti,timer-pwm;
388 ti,hwmods = "timer5";
389 status = "disabled";
390 };
392 timer6: timer@48048000 {
393 compatible = "ti,am4372-timer","ti,am335x-timer";
394 reg = <0x48048000 0x400>;
395 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
396 ti,timer-pwm;
397 ti,hwmods = "timer6";
398 status = "disabled";
399 };
401 timer7: timer@4804a000 {
402 compatible = "ti,am4372-timer","ti,am335x-timer";
403 reg = <0x4804a000 0x400>;
404 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
405 ti,timer-pwm;
406 ti,hwmods = "timer7";
407 status = "disabled";
408 };
410 timer8: timer@481c1000 {
411 compatible = "ti,am4372-timer","ti,am335x-timer";
412 reg = <0x481c1000 0x400>;
413 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
414 ti,hwmods = "timer8";
415 status = "disabled";
416 };
418 timer9: timer@4833d000 {
419 compatible = "ti,am4372-timer","ti,am335x-timer";
420 reg = <0x4833d000 0x400>;
421 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
422 ti,hwmods = "timer9";
423 status = "disabled";
424 };
426 timer10: timer@4833f000 {
427 compatible = "ti,am4372-timer","ti,am335x-timer";
428 reg = <0x4833f000 0x400>;
429 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
430 ti,hwmods = "timer10";
431 status = "disabled";
432 };
434 timer11: timer@48341000 {
435 compatible = "ti,am4372-timer","ti,am335x-timer";
436 reg = <0x48341000 0x400>;
437 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
438 ti,hwmods = "timer11";
439 status = "disabled";
440 };
442 counter32k: counter@44e86000 {
443 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
444 reg = <0x44e86000 0x40>;
445 ti,hwmods = "counter_32k";
446 };
448 rtc: rtc@44e3e000 {
449 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
450 "ti,da830-rtc";
451 reg = <0x44e3e000 0x1000>;
452 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
453 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
454 ti,hwmods = "rtc";
455 clocks = <&clk_32768_ck>;
456 clock-names = "int-clk";
457 status = "disabled";
458 };
460 wdt: wdt@44e35000 {
461 compatible = "ti,am4372-wdt","ti,omap3-wdt";
462 reg = <0x44e35000 0x1000>;
463 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
464 ti,hwmods = "wd_timer2";
465 };
467 gpio0: gpio@44e07000 {
468 compatible = "ti,am4372-gpio","ti,omap4-gpio";
469 reg = <0x44e07000 0x1000>;
470 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
471 gpio-controller;
472 #gpio-cells = <2>;
473 interrupt-controller;
474 #interrupt-cells = <2>;
475 ti,hwmods = "gpio1";
476 status = "disabled";
477 };
479 gpio1: gpio@4804c000 {
480 compatible = "ti,am4372-gpio","ti,omap4-gpio";
481 reg = <0x4804c000 0x1000>;
482 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
483 gpio-controller;
484 #gpio-cells = <2>;
485 interrupt-controller;
486 #interrupt-cells = <2>;
487 ti,hwmods = "gpio2";
488 status = "disabled";
489 };
491 gpio2: gpio@481ac000 {
492 compatible = "ti,am4372-gpio","ti,omap4-gpio";
493 reg = <0x481ac000 0x1000>;
494 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
495 gpio-controller;
496 #gpio-cells = <2>;
497 interrupt-controller;
498 #interrupt-cells = <2>;
499 ti,hwmods = "gpio3";
500 status = "disabled";
501 };
503 gpio3: gpio@481ae000 {
504 compatible = "ti,am4372-gpio","ti,omap4-gpio";
505 reg = <0x481ae000 0x1000>;
506 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
507 gpio-controller;
508 #gpio-cells = <2>;
509 interrupt-controller;
510 #interrupt-cells = <2>;
511 ti,hwmods = "gpio4";
512 status = "disabled";
513 };
515 gpio4: gpio@48320000 {
516 compatible = "ti,am4372-gpio","ti,omap4-gpio";
517 reg = <0x48320000 0x1000>;
518 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
519 gpio-controller;
520 #gpio-cells = <2>;
521 interrupt-controller;
522 #interrupt-cells = <2>;
523 ti,hwmods = "gpio5";
524 status = "disabled";
525 };
527 gpio5: gpio@48322000 {
528 compatible = "ti,am4372-gpio","ti,omap4-gpio";
529 reg = <0x48322000 0x1000>;
530 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
531 gpio-controller;
532 #gpio-cells = <2>;
533 interrupt-controller;
534 #interrupt-cells = <2>;
535 ti,hwmods = "gpio6";
536 status = "disabled";
537 };
539 hwspinlock: spinlock@480ca000 {
540 compatible = "ti,omap4-hwspinlock";
541 reg = <0x480ca000 0x1000>;
542 ti,hwmods = "spinlock";
543 #hwlock-cells = <1>;
544 };
546 i2c0: i2c@44e0b000 {
547 compatible = "ti,am4372-i2c","ti,omap4-i2c";
548 reg = <0x44e0b000 0x1000>;
549 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
550 ti,hwmods = "i2c1";
551 #address-cells = <1>;
552 #size-cells = <0>;
553 status = "disabled";
554 };
556 i2c1: i2c@4802a000 {
557 compatible = "ti,am4372-i2c","ti,omap4-i2c";
558 reg = <0x4802a000 0x1000>;
559 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
560 ti,hwmods = "i2c2";
561 #address-cells = <1>;
562 #size-cells = <0>;
563 status = "disabled";
564 };
566 i2c2: i2c@4819c000 {
567 compatible = "ti,am4372-i2c","ti,omap4-i2c";
568 reg = <0x4819c000 0x1000>;
569 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
570 ti,hwmods = "i2c3";
571 #address-cells = <1>;
572 #size-cells = <0>;
573 status = "disabled";
574 };
576 spi0: spi@48030000 {
577 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
578 reg = <0x48030000 0x400>;
579 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
580 ti,hwmods = "spi0";
581 #address-cells = <1>;
582 #size-cells = <0>;
583 status = "disabled";
584 };
586 mmc1: mmc@48060000 {
587 compatible = "ti,omap4-hsmmc";
588 reg = <0x48060000 0x1000>;
589 ti,hwmods = "mmc1";
590 ti,dual-volt;
591 ti,needs-special-reset;
592 dmas = <&edma 24 0>,
593 <&edma 25 0>;
594 dma-names = "tx", "rx";
595 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
596 status = "disabled";
597 };
599 mmc2: mmc@481d8000 {
600 compatible = "ti,omap4-hsmmc";
601 reg = <0x481d8000 0x1000>;
602 ti,hwmods = "mmc2";
603 ti,needs-special-reset;
604 dmas = <&edma 2 0>,
605 <&edma 3 0>;
606 dma-names = "tx", "rx";
607 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
608 status = "disabled";
609 };
611 mmc3: mmc@47810000 {
612 compatible = "ti,omap4-hsmmc";
613 reg = <0x47810000 0x1000>;
614 ti,hwmods = "mmc3";
615 ti,needs-special-reset;
616 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
617 status = "disabled";
618 };
620 spi1: spi@481a0000 {
621 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
622 reg = <0x481a0000 0x400>;
623 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
624 ti,hwmods = "spi1";
625 #address-cells = <1>;
626 #size-cells = <0>;
627 status = "disabled";
628 };
630 spi2: spi@481a2000 {
631 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
632 reg = <0x481a2000 0x400>;
633 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
634 ti,hwmods = "spi2";
635 #address-cells = <1>;
636 #size-cells = <0>;
637 status = "disabled";
638 };
640 spi3: spi@481a4000 {
641 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
642 reg = <0x481a4000 0x400>;
643 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
644 ti,hwmods = "spi3";
645 #address-cells = <1>;
646 #size-cells = <0>;
647 status = "disabled";
648 };
650 spi4: spi@48345000 {
651 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
652 reg = <0x48345000 0x400>;
653 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
654 ti,hwmods = "spi4";
655 #address-cells = <1>;
656 #size-cells = <0>;
657 status = "disabled";
658 };
660 mac: ethernet@4a100000 {
661 compatible = "ti,am4372-cpsw","ti,cpsw";
662 reg = <0x4a100000 0x800
663 0x4a101200 0x100>;
664 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
665 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
666 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
667 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
668 #address-cells = <1>;
669 #size-cells = <1>;
670 ti,hwmods = "cpgmac0";
671 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
672 <&dpll_clksel_mac_clk>;
673 clock-names = "fck", "cpts", "50mclk";
674 assigned-clocks = <&dpll_clksel_mac_clk>;
675 assigned-clock-rates = <50000000>;
676 status = "disabled";
677 cpdma_channels = <8>;
678 ale_entries = <1024>;
679 bd_ram_size = <0x2000>;
680 mac_control = <0x20>;
681 slaves = <2>;
682 active_slave = <0>;
683 cpts_clock_mult = <0x80000000>;
684 cpts_clock_shift = <29>;
685 ranges;
686 syscon = <&scm_conf>;
688 davinci_mdio: mdio@4a101000 {
689 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
690 reg = <0x4a101000 0x100>;
691 #address-cells = <1>;
692 #size-cells = <0>;
693 ti,hwmods = "davinci_mdio";
694 bus_freq = <1000000>;
695 status = "disabled";
696 };
698 cpsw_emac0: slave@4a100200 {
699 /* Filled in by U-Boot */
700 mac-address = [ 00 00 00 00 00 00 ];
701 };
703 cpsw_emac1: slave@4a100300 {
704 /* Filled in by U-Boot */
705 mac-address = [ 00 00 00 00 00 00 ];
706 };
708 phy_sel: cpsw-phy-sel@44e10650 {
709 compatible = "ti,am43xx-cpsw-phy-sel";
710 reg= <0x44e10650 0x4>;
711 reg-names = "gmii-sel";
712 };
713 };
715 epwmss0: epwmss@48300000 {
716 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
717 reg = <0x48300000 0x10>;
718 #address-cells = <1>;
719 #size-cells = <1>;
720 ranges;
721 ti,hwmods = "epwmss0";
722 status = "disabled";
724 ecap0: ecap@48300100 {
725 compatible = "ti,am4372-ecap",
726 "ti,am3352-ecap",
727 "ti,am33xx-ecap";
728 #pwm-cells = <3>;
729 reg = <0x48300100 0x80>;
730 clocks = <&l4ls_gclk>;
731 clock-names = "fck";
732 status = "disabled";
733 };
735 ehrpwm0: pwm@48300200 {
736 compatible = "ti,am4372-ehrpwm",
737 "ti,am3352-ehrpwm",
738 "ti,am33xx-ehrpwm";
739 #pwm-cells = <3>;
740 reg = <0x48300200 0x80>;
741 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
742 clock-names = "tbclk", "fck";
743 status = "disabled";
744 };
745 };
747 epwmss1: epwmss@48302000 {
748 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
749 reg = <0x48302000 0x10>;
750 #address-cells = <1>;
751 #size-cells = <1>;
752 ranges;
753 ti,hwmods = "epwmss1";
754 status = "disabled";
756 ecap1: ecap@48302100 {
757 compatible = "ti,am4372-ecap",
758 "ti,am3352-ecap",
759 "ti,am33xx-ecap";
760 #pwm-cells = <3>;
761 reg = <0x48302100 0x80>;
762 clocks = <&l4ls_gclk>;
763 clock-names = "fck";
764 status = "disabled";
765 };
767 ehrpwm1: pwm@48302200 {
768 compatible = "ti,am4372-ehrpwm",
769 "ti,am3352-ehrpwm",
770 "ti,am33xx-ehrpwm";
771 #pwm-cells = <3>;
772 reg = <0x48302200 0x80>;
773 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
774 clock-names = "tbclk", "fck";
775 status = "disabled";
776 };
777 };
779 epwmss2: epwmss@48304000 {
780 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
781 reg = <0x48304000 0x10>;
782 #address-cells = <1>;
783 #size-cells = <1>;
784 ranges;
785 ti,hwmods = "epwmss2";
786 status = "disabled";
788 ecap2: ecap@48304100 {
789 compatible = "ti,am4372-ecap",
790 "ti,am3352-ecap",
791 "ti,am33xx-ecap";
792 #pwm-cells = <3>;
793 reg = <0x48304100 0x80>;
794 clocks = <&l4ls_gclk>;
795 clock-names = "fck";
796 status = "disabled";
797 };
799 ehrpwm2: pwm@48304200 {
800 compatible = "ti,am4372-ehrpwm",
801 "ti,am3352-ehrpwm",
802 "ti,am33xx-ehrpwm";
803 #pwm-cells = <3>;
804 reg = <0x48304200 0x80>;
805 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
806 clock-names = "tbclk", "fck";
807 status = "disabled";
808 };
809 };
811 epwmss3: epwmss@48306000 {
812 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
813 reg = <0x48306000 0x10>;
814 #address-cells = <1>;
815 #size-cells = <1>;
816 ranges;
817 ti,hwmods = "epwmss3";
818 status = "disabled";
820 ehrpwm3: pwm@48306200 {
821 compatible = "ti,am4372-ehrpwm",
822 "ti,am3352-ehrpwm",
823 "ti,am33xx-ehrpwm";
824 #pwm-cells = <3>;
825 reg = <0x48306200 0x80>;
826 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
827 clock-names = "tbclk", "fck";
828 status = "disabled";
829 };
830 };
832 epwmss4: epwmss@48308000 {
833 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
834 reg = <0x48308000 0x10>;
835 #address-cells = <1>;
836 #size-cells = <1>;
837 ranges;
838 ti,hwmods = "epwmss4";
839 status = "disabled";
841 ehrpwm4: pwm@48308200 {
842 compatible = "ti,am4372-ehrpwm",
843 "ti,am3352-ehrpwm",
844 "ti,am33xx-ehrpwm";
845 #pwm-cells = <3>;
846 reg = <0x48308200 0x80>;
847 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
848 clock-names = "tbclk", "fck";
849 status = "disabled";
850 };
851 };
853 epwmss5: epwmss@4830a000 {
854 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
855 reg = <0x4830a000 0x10>;
856 #address-cells = <1>;
857 #size-cells = <1>;
858 ranges;
859 ti,hwmods = "epwmss5";
860 status = "disabled";
862 ehrpwm5: pwm@4830a200 {
863 compatible = "ti,am4372-ehrpwm",
864 "ti,am3352-ehrpwm",
865 "ti,am33xx-ehrpwm";
866 #pwm-cells = <3>;
867 reg = <0x4830a200 0x80>;
868 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
869 clock-names = "tbclk", "fck";
870 status = "disabled";
871 };
872 };
874 tscadc: tscadc@44e0d000 {
875 compatible = "ti,am3359-tscadc";
876 reg = <0x44e0d000 0x1000>;
877 ti,hwmods = "adc_tsc";
878 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
879 clocks = <&adc_tsc_fck>;
880 clock-names = "fck";
881 status = "disabled";
882 dmas = <&edma 53 0>, <&edma 57 0>;
883 dma-names = "fifo0", "fifo1";
885 tsc {
886 compatible = "ti,am3359-tsc";
887 };
889 adc {
890 #io-channel-cells = <1>;
891 compatible = "ti,am3359-adc";
892 };
894 };
896 sham: sham@53100000 {
897 compatible = "ti,omap5-sham";
898 ti,hwmods = "sham";
899 reg = <0x53100000 0x300>;
900 dmas = <&edma 36 0>;
901 dma-names = "rx";
902 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
903 };
905 aes: aes@53501000 {
906 compatible = "ti,omap4-aes";
907 ti,hwmods = "aes";
908 reg = <0x53501000 0xa0>;
909 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
910 dmas = <&edma 6 0>,
911 <&edma 5 0>;
912 dma-names = "tx", "rx";
913 };
915 des: des@53701000 {
916 compatible = "ti,omap4-des";
917 ti,hwmods = "des";
918 reg = <0x53701000 0xa0>;
919 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
920 dmas = <&edma 34 0>,
921 <&edma 33 0>;
922 dma-names = "tx", "rx";
923 };
925 rng: rng@48310000 {
926 compatible = "ti,omap4-rng";
927 ti,hwmods = "rng";
928 reg = <0x48310000 0x2000>;
929 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
930 };
932 mcasp0: mcasp@48038000 {
933 compatible = "ti,am33xx-mcasp-audio";
934 ti,hwmods = "mcasp0";
935 reg = <0x48038000 0x2000>,
936 <0x46000000 0x400000>;
937 reg-names = "mpu", "dat";
938 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
939 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
940 interrupt-names = "tx", "rx";
941 status = "disabled";
942 dmas = <&edma 8 2>,
943 <&edma 9 2>;
944 dma-names = "tx", "rx";
945 };
947 mcasp1: mcasp@4803c000 {
948 compatible = "ti,am33xx-mcasp-audio";
949 ti,hwmods = "mcasp1";
950 reg = <0x4803C000 0x2000>,
951 <0x46400000 0x400000>;
952 reg-names = "mpu", "dat";
953 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
954 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
955 interrupt-names = "tx", "rx";
956 status = "disabled";
957 dmas = <&edma 10 2>,
958 <&edma 11 2>;
959 dma-names = "tx", "rx";
960 };
962 elm: elm@48080000 {
963 compatible = "ti,am3352-elm";
964 reg = <0x48080000 0x2000>;
965 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
966 ti,hwmods = "elm";
967 clocks = <&l4ls_gclk>;
968 clock-names = "fck";
969 status = "disabled";
970 };
972 gpmc: gpmc@50000000 {
973 compatible = "ti,am3352-gpmc";
974 ti,hwmods = "gpmc";
975 dmas = <&edma 52 0>;
976 dma-names = "rxtx";
977 clocks = <&l3s_gclk>;
978 clock-names = "fck";
979 reg = <0x50000000 0x2000>;
980 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
981 gpmc,num-cs = <7>;
982 gpmc,num-waitpins = <2>;
983 #address-cells = <2>;
984 #size-cells = <1>;
985 interrupt-controller;
986 #interrupt-cells = <2>;
987 gpio-controller;
988 #gpio-cells = <2>;
989 status = "disabled";
990 };
992 ocp2scp0: ocp2scp@483a8000 {
993 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
994 #address-cells = <1>;
995 #size-cells = <1>;
996 ranges;
997 ti,hwmods = "ocp2scp0";
999 usb2_phy1: phy@483a8000 {
1000 compatible = "ti,am437x-usb2";
1001 reg = <0x483a8000 0x8000>;
1002 syscon-phy-power = <&scm_conf 0x620>;
1003 clocks = <&usb_phy0_always_on_clk32k>,
1004 <&l4_per_clkctrl AM4_USB_OTG_SS0_CLKCTRL 8>;
1005 clock-names = "wkupclk", "refclk";
1006 #phy-cells = <0>;
1007 status = "disabled";
1008 };
1009 };
1011 ocp2scp1: ocp2scp@483e8000 {
1012 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
1013 #address-cells = <1>;
1014 #size-cells = <1>;
1015 ranges;
1016 ti,hwmods = "ocp2scp1";
1018 usb2_phy2: phy@483e8000 {
1019 compatible = "ti,am437x-usb2";
1020 reg = <0x483e8000 0x8000>;
1021 syscon-phy-power = <&scm_conf 0x628>;
1022 clocks = <&usb_phy1_always_on_clk32k>,
1023 <&l4_per_clkctrl AM4_USB_OTG_SS1_CLKCTRL 8>;
1024 clock-names = "wkupclk", "refclk";
1025 #phy-cells = <0>;
1026 status = "disabled";
1027 };
1028 };
1030 dwc3_1: omap_dwc3@48380000 {
1031 compatible = "ti,am437x-dwc3";
1032 ti,hwmods = "usb_otg_ss0";
1033 reg = <0x48380000 0x10000>;
1034 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
1035 #address-cells = <1>;
1036 #size-cells = <1>;
1037 utmi-mode = <1>;
1038 ranges;
1040 usb1: usb@48390000 {
1041 compatible = "synopsys,dwc3";
1042 reg = <0x48390000 0x10000>;
1043 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
1044 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
1045 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
1046 interrupt-names = "peripheral",
1047 "host",
1048 "otg";
1049 phys = <&usb2_phy1>;
1050 phy-names = "usb2-phy";
1051 maximum-speed = "high-speed";
1052 dr_mode = "otg";
1053 status = "disabled";
1054 snps,dis_u3_susphy_quirk;
1055 snps,dis_u2_susphy_quirk;
1056 };
1057 };
1059 dwc3_2: omap_dwc3@483c0000 {
1060 compatible = "ti,am437x-dwc3";
1061 ti,hwmods = "usb_otg_ss1";
1062 reg = <0x483c0000 0x10000>;
1063 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
1064 #address-cells = <1>;
1065 #size-cells = <1>;
1066 utmi-mode = <1>;
1067 ranges;
1069 usb2: usb@483d0000 {
1070 compatible = "synopsys,dwc3";
1071 reg = <0x483d0000 0x10000>;
1072 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
1073 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
1074 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
1075 interrupt-names = "peripheral",
1076 "host",
1077 "otg";
1078 phys = <&usb2_phy2>;
1079 phy-names = "usb2-phy";
1080 maximum-speed = "high-speed";
1081 dr_mode = "otg";
1082 status = "disabled";
1083 snps,dis_u3_susphy_quirk;
1084 snps,dis_u2_susphy_quirk;
1085 };
1086 };
1088 qspi: qspi@47900000 {
1089 compatible = "ti,am4372-qspi";
1090 reg = <0x47900000 0x100>,
1091 <0x30000000 0x4000000>;
1092 reg-names = "qspi_base", "qspi_mmap";
1093 #address-cells = <1>;
1094 #size-cells = <0>;
1095 ti,hwmods = "qspi";
1096 interrupts = <0 138 0x4>;
1097 num-cs = <4>;
1098 status = "disabled";
1099 };
1101 hdq: hdq@48347000 {
1102 compatible = "ti,am4372-hdq";
1103 reg = <0x48347000 0x1000>;
1104 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
1105 clocks = <&func_12m_clk>;
1106 clock-names = "fck";
1107 ti,hwmods = "hdq1w";
1108 status = "disabled";
1109 };
1111 dss: dss@4832a000 {
1112 compatible = "ti,omap3-dss";
1113 reg = <0x4832a000 0x200>;
1114 status = "disabled";
1115 ti,hwmods = "dss_core";
1116 clocks = <&disp_clk>;
1117 clock-names = "fck";
1118 #address-cells = <1>;
1119 #size-cells = <1>;
1120 ranges;
1122 dispc: dispc@4832a400 {
1123 compatible = "ti,omap3-dispc";
1124 reg = <0x4832a400 0x400>;
1125 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1126 ti,hwmods = "dss_dispc";
1127 clocks = <&disp_clk>;
1128 clock-names = "fck";
1129 };
1131 rfbi: rfbi@4832a800 {
1132 compatible = "ti,omap3-rfbi";
1133 reg = <0x4832a800 0x100>;
1134 ti,hwmods = "dss_rfbi";
1135 clocks = <&disp_clk>;
1136 clock-names = "fck";
1137 status = "disabled";
1138 };
1139 };
1141 ocmcram: ocmcram@40300000 {
1142 compatible = "mmio-sram";
1143 reg = <0x40300000 0x40000>; /* 256k */
1144 };
1146 dcan0: can@481cc000 {
1147 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1148 ti,hwmods = "d_can0";
1149 clocks = <&dcan0_fck>;
1150 clock-names = "fck";
1151 reg = <0x481cc000 0x2000>;
1152 syscon-raminit = <&scm_conf 0x644 0>;
1153 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1154 status = "disabled";
1155 };
1157 dcan1: can@481d0000 {
1158 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1159 ti,hwmods = "d_can1";
1160 clocks = <&dcan1_fck>;
1161 clock-names = "fck";
1162 reg = <0x481d0000 0x2000>;
1163 syscon-raminit = <&scm_conf 0x644 1>;
1164 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1165 status = "disabled";
1166 };
1168 vpfe0: vpfe@48326000 {
1169 compatible = "ti,am437x-vpfe";
1170 reg = <0x48326000 0x2000>;
1171 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1172 ti,hwmods = "vpfe0";
1173 status = "disabled";
1174 };
1176 vpfe1: vpfe@48328000 {
1177 compatible = "ti,am437x-vpfe";
1178 reg = <0x48328000 0x2000>;
1179 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1180 ti,hwmods = "vpfe1";
1181 status = "disabled";
1182 };
1183 };
1184 };
1186 #include "am43xx-clocks.dtsi"