| blob | cadde92bc6b5a16205a79feba24ceb347a551f10 |
1 /*
2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
3 */
5 /dts-v1/;
7 #include "gemini.dtsi"
8 #include <dt-bindings/input/input.h>
10 / {
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
16 memory {
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
18 device_type = "memory";
19 reg = <0x00000000 0x8000000>;
20 };
22 chosen {
23 stdout-path = "uart0:115200n8";
24 };
26 gpio_keys {
27 compatible = "gpio-keys";
28 #address-cells = <1>;
29 #size-cells = <0>;
30 button-esc {
31 debounce_interval = <50>;
32 wakeup-source;
33 linux,code = <KEY_ESC>;
34 label = "reset";
35 /* Collides with LPC_LAD[0], UART DCD, SSP 97RST */
36 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
37 };
38 button-eject {
39 debounce_interval = <50>;
40 wakeup-source;
41 linux,code = <KEY_EJECTCD>;
42 label = "unmount";
43 /* Collides with LPC LFRAME, UART RTS, SSP TXD */
44 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
45 };
46 };
48 vdisp: regulator {
49 compatible = "regulator-fixed";
50 regulator-name = "display-power";
51 regulator-min-microvolt = <3600000>;
52 regulator-max-microvolt = <3600000>;
53 /* Collides with LCD E */
54 gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
55 enable-active-high;
56 };
58 spi {
59 compatible = "spi-gpio";
60 #address-cells = <1>;
61 #size-cells = <0>;
63 /* Collides with IDE pins, that's cool (we do not use them) */
64 gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
65 gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
66 gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
67 /* Collides with pflash CE1, not so cool */
68 cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
69 num-chipselects = <1>;
71 panel: display@0 {
72 compatible = "dlink,dir-685-panel", "ilitek,ili9322";
73 reg = <0>;
74 /* 50 ns min period = 20 MHz */
75 spi-max-frequency = <20000000>;
76 spi-cpol; /* Clock active low */
77 vcc-supply = <&vdisp>;
78 iovcc-supply = <&vdisp>;
79 vci-supply = <&vdisp>;
81 port {
82 panel_in: endpoint {
83 remote-endpoint = <&display_out>;
84 };
85 };
86 };
87 };
89 leds {
90 compatible = "gpio-leds";
91 led-wps {
92 label = "dir685:blue:WPS";
93 /* Collides with ICE */
94 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
95 default-state = "on";
96 linux,default-trigger = "heartbeat";
97 };
98 /*
99 * These two LEDs are on the side of the device.
100 * For electrical reasons, both LEDs cannot be active
101 * at the same time so only blue or orange can on at
102 * one time. Enabling both makes the LED go dark.
103 * The LEDs both sit inside the unmount button and the
104 * label on the case says "unmount".
105 */
106 led-blue-hd {
107 label = "dir685:blue:HD";
108 /* Collides with LPC_SERIRQ, UART DTR, SSP FSC pins */
109 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
110 default-state = "off";
111 };
112 led-orange-hd {
113 label = "dir685:orange:HD";
114 /* Collides with LPC_LAD[2], UART DSR, SSP ECLK pins */
115 gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
116 default-state = "off";
117 };
118 };
120 /*
121 * This is a Sunon Maglev GM0502PFV2-8 cooling fan @10000 RPM.
122 * Since the platform has no temperature sensor, this is controlled
123 * from userspace by using the hard disks S.M.A.R.T. temperature
124 * sensor. It is turned on when the temperature exceeds 46 degrees
125 * and turned off when the temperatures goes below 41 degrees
126 * (celsius).
127 */
128 gpio-fan {
129 compatible = "gpio-fan";
130 /* Collides with IDE */
131 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
132 gpio-fan,speed-map = <0 0>, <10000 1>;
133 #cooling-cells = <2>;
134 };
136 /*
137 * The touchpad input is connected to a GPIO bit-banged
138 * I2C bus.
139 */
140 gpio-i2c {
141 compatible = "i2c-gpio";
142 /* Collides with ICE */
143 sda-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
144 scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
145 #address-cells = <1>;
146 #size-cells = <0>;
148 touchkeys@26 {
149 compatible = "dlink,dir685-touchkeys";
150 reg = <0x26>;
151 interrupt-parent = <&gpio0>;
152 /* Collides with NAND flash */
153 interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
154 };
155 };
157 soc {
158 flash@30000000 {
159 /*
160 * Flash access is by default disabled, because it
161 * collides with the Chip Enable signal for the display
162 * panel, that reuse the parallel flash Chip Select 1
163 * (CS1). Enabling flash makes graphics stop working.
164 *
165 * We might be able to hack around this by letting
166 * GPIO poke around in the flash controller registers.
167 */
168 /* status = "okay"; */
169 /* 32MB of flash */
170 reg = <0x30000000 0x02000000>;
172 /*
173 * This "RedBoot" is the Storlink derivative.
174 */
175 partition@0 {
176 label = "RedBoot";
177 reg = <0x00000000 0x00040000>;
178 read-only;
179 };
180 /*
181 * Between the boot loader and the rootfs is the kernel
182 * in a custom Storlink format flashed from the boot
183 * menu. The rootfs is in squashfs format.
184 */
185 partition@1800c0 {
186 label = "rootfs";
187 reg = <0x001800c0 0x01dbff40>;
188 read-only;
189 };
190 partition@1f40000 {
191 label = "upgrade";
192 reg = <0x01f40000 0x00040000>;
193 read-only;
194 };
195 partition@1f80000 {
196 label = "rgdb";
197 reg = <0x01f80000 0x00040000>;
198 read-only;
199 };
200 /*
201 * This partition contains MAC addresses for WAN,
202 * WLAN and LAN, and the country code (for wireless
203 * I guess).
204 */
205 partition@1fc0000 {
206 label = "nvram";
207 reg = <0x01fc0000 0x00020000>;
208 read-only;
209 };
210 partition@1fe0000 {
211 label = "LangPack";
212 reg = <0x01fe0000 0x00020000>;
213 read-only;
214 };
215 };
217 syscon: syscon@40000000 {
218 pinctrl {
219 /*
220 * gpio0bgrp cover line 5, 6 used by TK I2C
221 * gpio0bgrp cover line 7 used by WPS LED
222 * gpio0cgrp cover line 8, 13 used by keys
223 * and 11, 12 used by the HD LEDs
224 * gpio0egrp cover line 16 used by VDISP
225 * gpio0fgrp cover line 17 used by TK IRQ
226 * gpio0ggrp cover line 20 used by panel CS
227 * gpio0hgrp cover line 21,22 used by RTL8366RB
228 */
229 gpio0_default_pins: pinctrl-gpio0 {
230 mux {
231 function = "gpio0";
232 groups = "gpio0bgrp",
233 "gpio0cgrp",
234 "gpio0egrp",
235 "gpio0fgrp",
236 "gpio0ggrp",
237 "gpio0hgrp";
238 };
239 };
240 /*
241 * gpio1bgrp cover line 5,8,7 used by panel SPI
242 * also line 6 used by the fan
243 *
244 */
245 gpio1_default_pins: pinctrl-gpio1 {
246 mux {
247 function = "gpio1";
248 groups = "gpio1bgrp";
249 };
250 };
251 };
252 };
254 sata: sata@46000000 {
255 cortina,gemini-ata-muxmode = <0>;
256 cortina,gemini-enable-sata-bridge;
257 status = "okay";
258 };
260 gpio0: gpio@4d000000 {
261 pinctrl-names = "default";
262 pinctrl-0 = <&gpio0_default_pins>;
263 };
265 gpio1: gpio@4e000000 {
266 pinctrl-names = "default";
267 pinctrl-0 = <&gpio1_default_pins>;
268 };
270 pci@50000000 {
271 status = "okay";
272 interrupt-map-mask = <0xf800 0 0 7>;
273 interrupt-map =
274 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
275 <0x4800 0 0 2 &pci_intc 1>,
276 <0x4800 0 0 3 &pci_intc 2>,
277 <0x4800 0 0 4 &pci_intc 3>,
278 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
279 <0x5000 0 0 2 &pci_intc 2>,
280 <0x5000 0 0 3 &pci_intc 3>,
281 <0x5000 0 0 4 &pci_intc 0>,
282 <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
283 <0x5800 0 0 2 &pci_intc 3>,
284 <0x5800 0 0 3 &pci_intc 0>,
285 <0x5800 0 0 4 &pci_intc 1>,
286 <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
287 <0x6000 0 0 2 &pci_intc 0>,
288 <0x6000 0 0 3 &pci_intc 1>,
289 <0x6000 0 0 4 &pci_intc 2>;
290 };
292 ata@63000000 {
293 status = "okay";
294 };
296 display-controller@6a000000 {
297 status = "okay";
299 port@0 {
300 reg = <0>;
301 display_out: endpoint {
302 remote-endpoint = <&panel_in>;
303 };
304 };
305 };
306 };
307 };