arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi

   1 /*
   2  * Copyright 2015 Boundary Devices, Inc.
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License
  11  *     version 2 as published by the Free Software Foundation.
  12  *
  13  *     This file is distributed in the hope that it will be useful,
  14  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *     GNU General Public License for more details.
  17  *
  18  * Or, alternatively,
  19  *
  20  *  b) Permission is hereby granted, free of charge, to any person
  21  *     obtaining a copy of this software and associated documentation
  22  *     files (the "Software"), to deal in the Software without
  23  *     restriction, including without limitation the rights to use,
  24  *     copy, modify, merge, publish, distribute, sublicense, and/or
  25  *     sell copies of the Software, and to permit persons to whom the
  26  *     Software is furnished to do so, subject to the following
  27  *     conditions:
  28  *
  29  *     The above copyright notice and this permission notice shall be
  30  *     included in all copies or substantial portions of the Software.
  31  *
  32  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  33  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  34  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  35  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  36  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  37  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  38  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  39  *     OTHER DEALINGS IN THE SOFTWARE.
  40  */
  41 #include <dt-bindings/gpio/gpio.h>
  42 #include <dt-bindings/input/input.h>
  43
  44 / {
  45         chosen {
  46                 stdout-path = &uart2;
  47         };
  48
  49         memory {
  50                 reg = <0x10000000 0x20000000>;
  51         };
  52
  53         regulators {
  54                 compatible = "simple-bus";
  55                 #address-cells = <1>;
  56                 #size-cells = <0>;
  57
  58                 reg_2p5v: regulator@0 {
  59                         compatible = "regulator-fixed";
  60                         reg = <0>;
  61                         regulator-name = "2P5V";
  62                         regulator-min-microvolt = <2500000>;
  63                         regulator-max-microvolt = <2500000>;
  64                         regulator-always-on;
  65                 };
  66
  67                 reg_3p3v: regulator@1 {
  68                         compatible = "regulator-fixed";
  69                         reg = <1>;
  70                         regulator-name = "3P3V";
  71                         regulator-min-microvolt = <3300000>;
  72                         regulator-max-microvolt = <3300000>;
  73                         regulator-always-on;
  74                 };
  75
  76                 reg_usb_otg_vbus: regulator@2 {
  77                         compatible = "regulator-fixed";
  78                         reg = <2>;
  79                         regulator-name = "usb_otg_vbus";
  80                         regulator-min-microvolt = <5000000>;
  81                         regulator-max-microvolt = <5000000>;
  82                         gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  83                         enable-active-high;
  84                 };
  85
  86                 reg_wlan_vmmc: regulator@3 {
  87                         compatible = "regulator-fixed";
  88                         reg = <3>;
  89                         pinctrl-names = "default";
  90                         pinctrl-0 = <&pinctrl_wlan_vmmc>;
  91                         regulator-name = "reg_wlan_vmmc";
  92                         regulator-min-microvolt = <1800000>;
  93                         regulator-max-microvolt = <1800000>;
  94                         gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>;
  95                         startup-delay-us = <70000>;
  96                         enable-active-high;
  97                 };
  98         };
  99
 100         gpio-keys {
 101                 compatible = "gpio-keys";
 102                 pinctrl-names = "default";
 103                 pinctrl-0 = <&pinctrl_gpio_keys>;
 104
 105                 home {
 106                         label = "Home";
 107                         gpios = <&gpio7 13 IRQ_TYPE_LEVEL_LOW>;
 108                         linux,code = <102>;
 109                 };
 110
 111                 back {
 112                         label = "Back";
 113                         gpios = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>;
 114                         linux,code = <158>;
 115                 };
 116         };
 117
 118         leds {
 119                 compatible = "gpio-leds";
 120                 pinctrl-names = "default";
 121                 pinctrl-0 = <&pinctrl_leds>;
 122
 123                 j14-pin1 {
 124                         gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
 125                         retain-state-suspended;
 126                         default-state = "off";
 127                 };
 128
 129                 j14-pin3 {
 130                         gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 131                         retain-state-suspended;
 132                         default-state = "off";
 133                 };
 134
 135                 j14-pins8-9 {
 136                         gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
 137                         retain-state-suspended;
 138                         default-state = "off";
 139                 };
 140
 141                 j46-pin2 {
 142                         gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
 143                         retain-state-suspended;
 144                         default-state = "off";
 145                 };
 146
 147                 j46-pin3 {
 148                         gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
 149                         retain-state-suspended;
 150                         default-state = "off";
 151                 };
 152         };
 153
 154         backlight-lcd {
 155                 compatible = "pwm-backlight";
 156                 pwms = <&pwm1 0 5000000>;
 157                 brightness-levels = <0 4 8 16 32 64 128 255>;
 158                 default-brightness-level = <7>;
 159                 power-supply = <&reg_3p3v>;
 160                 status = "okay";
 161         };
 162
 163         backlight_lvds0: backlight-lvds0 {
 164                 compatible = "pwm-backlight";
 165                 pwms = <&pwm4 0 5000000>;
 166                 brightness-levels = <0 4 8 16 32 64 128 255>;
 167                 default-brightness-level = <7>;
 168                 power-supply = <&reg_3p3v>;
 169                 status = "okay";
 170         };
 171
 172         panel-lvds0 {
 173                 compatible = "hannstar,hsd100pxn1";
 174                 backlight = <&backlight_lvds0>;
 175
 176                 port {
 177                         panel_in_lvds0: endpoint {
 178                                 remote-endpoint = <&lvds0_out>;
 179                         };
 180                 };
 181         };
 182
 183         sound {
 184                 compatible = "fsl,imx6dl-nit6xlite-sgtl5000",
 185                              "fsl,imx-audio-sgtl5000";
 186                 model = "imx6dl-nit6xlite-sgtl5000";
 187                 ssi-controller = <&ssi1>;
 188                 audio-codec = <&codec>;
 189                 audio-routing =
 190                         "MIC_IN", "Mic Jack",
 191                         "Mic Jack", "Mic Bias",
 192                         "Headphone Jack", "HP_OUT";
 193                 mux-int-port = <1>;
 194                 mux-ext-port = <3>;
 195         };
 196 };
 197
 198 &audmux {
 199         pinctrl-names = "default";
 200         pinctrl-0 = <&pinctrl_audmux>;
 201         status = "okay";
 202 };
 203
 204 &clks {
 205         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 206                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 207         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 208                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 209 };
 210
 211 &ecspi1 {
 212         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 213         pinctrl-names = "default";
 214         pinctrl-0 = <&pinctrl_ecspi1>;
 215         status = "okay";
 216
 217         flash: m25p80@0 {
 218                 compatible = "microchip,sst25vf016b";
 219                 spi-max-frequency = <20000000>;
 220                 reg = <0>;
 221         };
 222 };
 223
 224 &fec {
 225         pinctrl-names = "default";
 226         pinctrl-0 = <&pinctrl_enet>;
 227         phy-mode = "rgmii";
 228         phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
 229         txen-skew-ps = <0>;
 230         txc-skew-ps = <3000>;
 231         rxdv-skew-ps = <0>;
 232         rxc-skew-ps = <3000>;
 233         rxd0-skew-ps = <0>;
 234         rxd1-skew-ps = <0>;
 235         rxd2-skew-ps = <0>;
 236         rxd3-skew-ps = <0>;
 237         txd0-skew-ps = <0>;
 238         txd1-skew-ps = <0>;
 239         txd2-skew-ps = <0>;
 240         txd3-skew-ps = <0>;
 241         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 242                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 243         fsl,err006687-workaround-present;
 244         status = "okay";
 245 };
 246
 247 &hdmi {
 248         ddc-i2c-bus = <&i2c2>;
 249         status = "okay";
 250 };
 251
 252 &i2c1 {
 253         clock-frequency = <100000>;
 254         pinctrl-names = "default";
 255         pinctrl-0 = <&pinctrl_i2c1>;
 256         status = "okay";
 257
 258         codec: sgtl5000@a {
 259                 compatible = "fsl,sgtl5000";
 260                 pinctrl-names = "default";
 261                 pinctrl-0 = <&pinctrl_sgtl5000>;
 262                 reg = <0x0a>;
 263                 clocks = <&clks IMX6QDL_CLK_CKO>;
 264                 VDDA-supply = <&reg_2p5v>;
 265                 VDDIO-supply = <&reg_3p3v>;
 266         };
 267 };
 268
 269 &i2c2 {
 270         clock-frequency = <100000>;
 271         pinctrl-names = "default";
 272         pinctrl-0 = <&pinctrl_i2c2>;
 273         status = "okay";
 274 };
 275
 276 &i2c3 {
 277         clock-frequency = <100000>;
 278         pinctrl-names = "default";
 279         pinctrl-0 = <&pinctrl_i2c3>;
 280         status = "okay";
 281
 282         touchscreen@4 {
 283                 compatible = "eeti,egalax_ts";
 284                 reg = <0x04>;
 285                 interrupt-parent = <&gpio1>;
 286                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 287                 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
 288         };
 289
 290         touchscreen@38 {
 291                 compatible = "edt,edt-ft5x06";
 292                 reg = <0x38>;
 293                 interrupt-parent = <&gpio1>;
 294                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 295         };
 296
 297         rtc@6f {
 298                 compatible = "isil,isl1208";
 299                 pinctrl-names = "default";
 300                 pinctrl-0 = <&pinctrl_rtc>;
 301                 reg = <0x6f>;
 302                 interrupts-extended = <&gpio2 26 IRQ_TYPE_LEVEL_LOW>;
 303         };
 304 };
 305
 306 &iomuxc {
 307         pinctrl-names = "default";
 308         pinctrl-0 = <&pinctrl_j10>;
 309         pinctrl-1 = <&pinctrl_j28>;
 310
 311         imx6dl-nit6xlite {
 312                 pinctrl_audmux: audmuxgrp {
 313                         fsl,pins = <
 314                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 315                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 316                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 317                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 318                         >;
 319                 };
 320
 321                 pinctrl_ecspi1: ecspi1grp {
 322                         fsl,pins = <
 323                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 324                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 325                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 326                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19          0x000b1
 327                         >;
 328                 };
 329
 330                 pinctrl_enet: enetgrp {
 331                         fsl,pins = <
 332                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 333                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 334                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
 335                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
 336                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
 337                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
 338                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
 339                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
 340                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 341                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 342                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 343                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 344                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 345                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 346                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 347                                 /* Phy reset */
 348                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x0f0b0
 349                                 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0
 350                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 351                         >;
 352                 };
 353
 354                 pinctrl_gpio_keys: gpio-keysgrp {
 355                         fsl,pins = <
 356                                 /* Home Button: J14 pin 5 */
 357                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 358                                 /* Back Button: J14 pin 7 */
 359                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 360                         >;
 361                 };
 362
 363                 pinctrl_i2c1: i2c1grp {
 364                         fsl,pins = <
 365                                 MX6QDL_PAD_EIM_D21__I2C1_SCL    0x4001b8b1
 366                                 MX6QDL_PAD_EIM_D28__I2C1_SDA    0x4001b8b1
 367                         >;
 368                 };
 369
 370                 pinctrl_i2c2: i2c2grp {
 371                         fsl,pins = <
 372                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b8b1
 373                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b8b1
 374                         >;
 375                 };
 376
 377                 pinctrl_i2c3: i2c3grp {
 378                         fsl,pins = <
 379                                 MX6QDL_PAD_GPIO_5__I2C3_SCL     0x4001b8b1
 380                                 MX6QDL_PAD_GPIO_16__I2C3_SDA    0x4001b8b1
 381                                 /* Touch IRQ: J7 pin 4 */
 382                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09   0x1b0b0
 383                                 /* tcs2004 IRQ */
 384                                 MX6QDL_PAD_EIM_LBA__GPIO2_IO27  0x1b0b0
 385                                 /* tsc2004 reset */
 386                                 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x0b0b0
 387                         >;
 388                 };
 389
 390                 pinctrl_j10: j10grp {
 391                         fsl,pins = <
 392                                 /* Broadcom WiFi module pins */
 393                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00         0x1b0b0
 394                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 395                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 396                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 397                                 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09       0x0b0b0
 398                                 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14        0x1b0b0
 399                                 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT      0x000b0
 400                         >;
 401                 };
 402
 403                 pinctrl_j28: j28grp {
 404                         fsl,pins = <
 405                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b0
 406                         >;
 407                 };
 408
 409                 pinctrl_leds: ledsgrp {
 410                         fsl,pins = <
 411                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x0b0b0
 412                                 MX6QDL_PAD_GPIO_3__GPIO1_IO03           0x0b0b0
 413                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29          0x030b0
 414                                 MX6QDL_PAD_GPIO_7__GPIO1_IO07           0x0b0b0
 415                                 MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0b0b0
 416                         >;
 417                 };
 418
 419                 pinctrl_pwm1: pwm1grp {
 420                         fsl,pins = <
 421                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
 422                         >;
 423                 };
 424
 425                 pinctrl_pwm3: pwm3grp {
 426                         fsl,pins = <
 427                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
 428                         >;
 429                 };
 430
 431                 pinctrl_pwm4: pwm4grp {
 432                         fsl,pins = <
 433                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
 434                         >;
 435                 };
 436
 437                 pinctrl_wlan_vmmc: wlan-vmmcgrp {
 438                         fsl,pins = <
 439                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07        0x030b0
 440                         >;
 441                 };
 442
 443                 pinctrl_rtc: rtcgrp {
 444                         fsl,pins = <
 445                                 MX6QDL_PAD_EIM_RW__GPIO2_IO26           0x1b0b0
 446                         >;
 447                 };
 448
 449                 pinctrl_sgtl5000: sgtl5000grp {
 450                         fsl,pins = <
 451                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x000b0
 452                                 MX6QDL_PAD_EIM_A25__GPIO5_IO02          0x1b0b0
 453                         >;
 454                 };
 455
 456                 pinctrl_uart1: uart1grp {
 457                         fsl,pins = <
 458                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 459                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 460                         >;
 461                 };
 462
 463                 pinctrl_uart2: uart2grp {
 464                         fsl,pins = <
 465                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 466                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 467                         >;
 468                 };
 469
 470                 pinctrl_uart3: uart3grp {
 471                         fsl,pins = <
 472                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 473                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 474                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
 475                                 MX6QDL_PAD_EIM_D31__UART3_RTS_B         0x1b0b1
 476                         >;
 477                 };
 478
 479                 pinctrl_usbotg: usbotggrp {
 480                         fsl,pins = <
 481                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 482                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC         0x1b0b0
 483                                 /* power enable, high active */
 484                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x000b0
 485                         >;
 486                 };
 487
 488                 pinctrl_usdhc2: usdhc2grp {
 489                         fsl,pins = <
 490                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 491                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 492                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 493                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 494                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 495                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 496                         >;
 497                 };
 498
 499                 pinctrl_usdhc3: usdhc3grp {
 500                         fsl,pins = <
 501                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 502                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 503                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 504                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 505                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 506                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 507                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x1b0b0
 508                         >;
 509                 };
 510         };
 511 };
 512
 513 &ldb {
 514         status = "okay";
 515
 516         lvds-channel@0 {
 517                 status = "okay";
 518
 519                 port@4 {
 520                         reg = <4>;
 521
 522                         lvds0_out: endpoint {
 523                                 remote-endpoint = <&panel_in_lvds0>;
 524                         };
 525                 };
 526         };
 527 };
 528
 529 &pcie {
 530         status = "okay";
 531 };
 532
 533 &pwm1 {
 534         pinctrl-names = "default";
 535         pinctrl-0 = <&pinctrl_pwm1>;
 536         status = "okay";
 537 };
 538
 539 &pwm3 {
 540         pinctrl-names = "default";
 541         pinctrl-0 = <&pinctrl_pwm3>;
 542         status = "okay";
 543 };
 544
 545 &pwm4 {
 546         pinctrl-names = "default";
 547         pinctrl-0 = <&pinctrl_pwm4>;
 548         status = "okay";
 549 };
 550
 551 &ssi1 {
 552         status = "okay";
 553 };
 554
 555 &uart1 {
 556         pinctrl-names = "default";
 557         pinctrl-0 = <&pinctrl_uart1>;
 558         status = "okay";
 559 };
 560
 561 &uart2 {
 562         pinctrl-names = "default";
 563         pinctrl-0 = <&pinctrl_uart2>;
 564         status = "okay";
 565 };
 566
 567 &uart3 {
 568         pinctrl-names = "default";
 569         pinctrl-0 = <&pinctrl_uart3>;
 570         uart-has-rtscts;
 571         status = "okay";
 572 };
 573
 574 &usbh1 {
 575         status = "okay";
 576 };
 577
 578 &usbotg {
 579         vbus-supply = <&reg_usb_otg_vbus>;
 580         pinctrl-names = "default";
 581         pinctrl-0 = <&pinctrl_usbotg>;
 582         disable-over-current;
 583         status = "okay";
 584 };
 585
 586 &usdhc2 {
 587         pinctrl-names = "default";
 588         pinctrl-0 = <&pinctrl_usdhc2>;
 589         bus-width = <4>;
 590         non-removable;
 591         vmmc-supply = <&reg_3p3v>;
 592         vqmmc-supply = <&reg_wlan_vmmc>;
 593         vqmmc-1-8-v;
 594         ocr-limit = <0x180>;     /* 1.65v - 2.1v */
 595         cap-power-off-card;
 596         keep-power-in-suspend;
 597         status = "okay";
 598 };
 599
 600 &usdhc3 {
 601         pinctrl-names = "default";
 602         pinctrl-0 = <&pinctrl_usdhc3>;
 603         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 604         vmmc-supply = <&reg_3p3v>;
 605         status = "okay";
 606 };