arch/arm/boot/dts/keystone-k2e.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Keystone 2 Edison soc device tree
   4  *
   5  * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
   6  */
   7
   8 #include <dt-bindings/reset/ti-syscon.h>
   9
  10 / {
  11         compatible = "ti,k2e", "ti,keystone";
  12         model = "Texas Instruments Keystone 2 Edison SoC";
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 interrupt-parent = <&gic>;
  19
  20                 cpu@0 {
  21                         compatible = "arm,cortex-a15";
  22                         device_type = "cpu";
  23                         reg = <0>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "arm,cortex-a15";
  28                         device_type = "cpu";
  29                         reg = <1>;
  30                 };
  31
  32                 cpu@2 {
  33                         compatible = "arm,cortex-a15";
  34                         device_type = "cpu";
  35                         reg = <2>;
  36                 };
  37
  38                 cpu@3 {
  39                         compatible = "arm,cortex-a15";
  40                         device_type = "cpu";
  41                         reg = <3>;
  42                 };
  43         };
  44
  45         aliases {
  46                 rproc0 = &dsp0;
  47         };
  48 };
  49
  50 &soc0 {
  51                 /include/ "keystone-k2e-clocks.dtsi"
  52
  53                 usb: usb@2680000 {
  54                         interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
  55                         dwc3@2690000 {
  56                                 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
  57                         };
  58                 };
  59
  60                 usb1_phy: usb_phy@2620750 {
  61                         compatible = "ti,keystone-usbphy";
  62                         #address-cells = <1>;
  63                         #size-cells = <1>;
  64                         reg = <0x2620750 24>;
  65                         status = "disabled";
  66                 };
  67
  68                 keystone_usb1: usb@25000000 {
  69                         compatible = "ti,keystone-dwc3";
  70                         #address-cells = <1>;
  71                         #size-cells = <1>;
  72                         reg = <0x25000000 0x10000>;
  73                         clocks = <&clkusb1>;
  74                         clock-names = "usb";
  75                         interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
  76                         ranges;
  77                         dma-coherent;
  78                         dma-ranges;
  79                         status = "disabled";
  80
  81                         usb1: dwc3@25010000 {
  82                                 compatible = "synopsys,dwc3";
  83                                 reg = <0x25010000 0x70000>;
  84                                 interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
  85                                 usb-phy = <&usb1_phy>, <&usb1_phy>;
  86                         };
  87                 };
  88
  89                 msm_ram: msmram@c000000 {
  90                         compatible = "mmio-sram";
  91                         reg = <0x0c000000 0x200000>;
  92                         ranges = <0x0 0x0c000000 0x200000>;
  93                         #address-cells = <1>;
  94                         #size-cells = <1>;
  95
  96                         sram-bm@1f0000 {
  97                                 reg = <0x001f0000 0x8000>;
  98                         };
  99                 };
 100
 101                 psc: power-sleep-controller@2350000 {
 102                         pscrst: reset-controller {
 103                                 compatible = "ti,k2e-pscrst", "ti,syscon-reset";
 104                                 #reset-cells = <1>;
 105
 106                                 ti,reset-bits = <
 107                                         0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
 108                                 >;
 109                         };
 110                 };
 111
 112                 dspgpio0: keystone_dsp_gpio@2620240 {
 113                         compatible = "ti,keystone-dsp-gpio";
 114                         gpio-controller;
 115                         #gpio-cells = <2>;
 116                         gpio,syscon-dev = <&devctrl 0x240>;
 117                 };
 118
 119                 dsp0: dsp@10800000 {
 120                         compatible = "ti,k2e-dsp";
 121                         reg = <0x10800000 0x00080000>,
 122                               <0x10e00000 0x00008000>,
 123                               <0x10f00000 0x00008000>;
 124                         reg-names = "l2sram", "l1pram", "l1dram";
 125                         clocks = <&clkgem0>;
 126                         ti,syscon-dev = <&devctrl 0x844>;
 127                         resets = <&pscrst 0>;
 128                         interrupt-parent = <&kirq0>;
 129                         interrupts = <0 8>;
 130                         interrupt-names = "vring", "exception";
 131                         kick-gpios = <&dspgpio0 27 0>;
 132                         status = "disabled";
 133                 };
 134
 135                 pcie1: pcie@21020000 {
 136                         compatible = "ti,keystone-pcie","snps,dw-pcie";
 137                         clocks = <&clkpcie1>;
 138                         clock-names = "pcie";
 139                         #address-cells = <3>;
 140                         #size-cells = <2>;
 141                         reg =  <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>;
 142                         ranges = <0x82000000 0 0x60000000 0x60000000
 143                                   0 0x10000000>;
 144
 145                         status = "disabled";
 146                         device_type = "pci";
 147                         num-lanes = <2>;
 148                         bus-range = <0x00 0xff>;
 149
 150                         /* error interrupt */
 151                         interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>;
 152                         #interrupt-cells = <1>;
 153                         interrupt-map-mask = <0 0 0 7>;
 154                         interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */
 155                                         <0 0 0 2 &pcie_intc1 1>, /* INT B */
 156                                         <0 0 0 3 &pcie_intc1 2>, /* INT C */
 157                                         <0 0 0 4 &pcie_intc1 3>; /* INT D */
 158
 159                         pcie_msi_intc1: msi-interrupt-controller {
 160                                 interrupt-controller;
 161                                 #interrupt-cells = <1>;
 162                                 interrupt-parent = <&gic>;
 163                                 interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
 164                                         <GIC_SPI 378 IRQ_TYPE_EDGE_RISING>,
 165                                         <GIC_SPI 379 IRQ_TYPE_EDGE_RISING>,
 166                                         <GIC_SPI 380 IRQ_TYPE_EDGE_RISING>,
 167                                         <GIC_SPI 381 IRQ_TYPE_EDGE_RISING>,
 168                                         <GIC_SPI 382 IRQ_TYPE_EDGE_RISING>,
 169                                         <GIC_SPI 383 IRQ_TYPE_EDGE_RISING>,
 170                                         <GIC_SPI 384 IRQ_TYPE_EDGE_RISING>;
 171                         };
 172
 173                         pcie_intc1: legacy-interrupt-controller {
 174                                 interrupt-controller;
 175                                 #interrupt-cells = <1>;
 176                                 interrupt-parent = <&gic>;
 177                                 interrupts = <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
 178                                         <GIC_SPI 374 IRQ_TYPE_EDGE_RISING>,
 179                                         <GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
 180                                         <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
 181                         };
 182                 };
 183
 184                 mdio: mdio@24200f00 {
 185                         compatible      = "ti,keystone_mdio", "ti,davinci_mdio";
 186                         #address-cells = <1>;
 187                         #size-cells = <0>;
 188                         reg = <0x24200f00 0x100>;
 189                         status = "disabled";
 190                         clocks = <&clkcpgmac>;
 191                         clock-names = "fck";
 192                         bus_freq        = <2500000>;
 193                 };
 194                 /include/ "keystone-k2e-netcp.dtsi"
 195 };