| blob | d12df6f2ff0922994429c4e398da189cdda876fd |
1 /*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a7795-sysc.h>
15 #define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
17 / {
18 compatible = "renesas,r8a7795";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
30 i2c7 = &i2c_dvfs;
31 };
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
37 a57_0: cpu@0 {
38 compatible = "arm,cortex-a57", "arm,armv8";
39 reg = <0x0>;
40 device_type = "cpu";
41 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
42 next-level-cache = <&L2_CA57>;
43 enable-method = "psci";
44 };
46 a57_1: cpu@1 {
47 compatible = "arm,cortex-a57","arm,armv8";
48 reg = <0x1>;
49 device_type = "cpu";
50 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
51 next-level-cache = <&L2_CA57>;
52 enable-method = "psci";
53 };
55 a57_2: cpu@2 {
56 compatible = "arm,cortex-a57","arm,armv8";
57 reg = <0x2>;
58 device_type = "cpu";
59 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
60 next-level-cache = <&L2_CA57>;
61 enable-method = "psci";
62 };
64 a57_3: cpu@3 {
65 compatible = "arm,cortex-a57","arm,armv8";
66 reg = <0x3>;
67 device_type = "cpu";
68 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
69 next-level-cache = <&L2_CA57>;
70 enable-method = "psci";
71 };
73 a53_0: cpu@100 {
74 compatible = "arm,cortex-a53", "arm,armv8";
75 reg = <0x100>;
76 device_type = "cpu";
77 power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
78 next-level-cache = <&L2_CA53>;
79 enable-method = "psci";
80 };
82 a53_1: cpu@101 {
83 compatible = "arm,cortex-a53","arm,armv8";
84 reg = <0x101>;
85 device_type = "cpu";
86 power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
87 next-level-cache = <&L2_CA53>;
88 enable-method = "psci";
89 };
91 a53_2: cpu@102 {
92 compatible = "arm,cortex-a53","arm,armv8";
93 reg = <0x102>;
94 device_type = "cpu";
95 power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
96 next-level-cache = <&L2_CA53>;
97 enable-method = "psci";
98 };
100 a53_3: cpu@103 {
101 compatible = "arm,cortex-a53","arm,armv8";
102 reg = <0x103>;
103 device_type = "cpu";
104 power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
105 next-level-cache = <&L2_CA53>;
106 enable-method = "psci";
107 };
109 L2_CA57: cache-controller-0 {
110 compatible = "cache";
111 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
112 cache-unified;
113 cache-level = <2>;
114 };
116 L2_CA53: cache-controller-1 {
117 compatible = "cache";
118 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
119 cache-unified;
120 cache-level = <2>;
121 };
122 };
124 extal_clk: extal {
125 compatible = "fixed-clock";
126 #clock-cells = <0>;
127 /* This value must be overridden by the board */
128 clock-frequency = <0>;
129 };
131 extalr_clk: extalr {
132 compatible = "fixed-clock";
133 #clock-cells = <0>;
134 /* This value must be overridden by the board */
135 clock-frequency = <0>;
136 };
138 /*
139 * The external audio clocks are configured as 0 Hz fixed frequency
140 * clocks by default.
141 * Boards that provide audio clocks should override them.
142 */
143 audio_clk_a: audio_clk_a {
144 compatible = "fixed-clock";
145 #clock-cells = <0>;
146 clock-frequency = <0>;
147 };
149 audio_clk_b: audio_clk_b {
150 compatible = "fixed-clock";
151 #clock-cells = <0>;
152 clock-frequency = <0>;
153 };
155 audio_clk_c: audio_clk_c {
156 compatible = "fixed-clock";
157 #clock-cells = <0>;
158 clock-frequency = <0>;
159 };
161 /* External CAN clock - to be overridden by boards that provide it */
162 can_clk: can {
163 compatible = "fixed-clock";
164 #clock-cells = <0>;
165 clock-frequency = <0>;
166 };
168 /* External SCIF clock - to be overridden by boards that provide it */
169 scif_clk: scif {
170 compatible = "fixed-clock";
171 #clock-cells = <0>;
172 clock-frequency = <0>;
173 };
175 /* External PCIe clock - can be overridden by the board */
176 pcie_bus_clk: pcie_bus {
177 compatible = "fixed-clock";
178 #clock-cells = <0>;
179 clock-frequency = <0>;
180 };
182 pmu_a57 {
183 compatible = "arm,cortex-a57-pmu";
184 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
185 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
186 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
187 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
188 interrupt-affinity = <&a57_0>,
189 <&a57_1>,
190 <&a57_2>,
191 <&a57_3>;
192 };
194 pmu_a53 {
195 compatible = "arm,cortex-a53-pmu";
196 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
197 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
198 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
199 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
200 interrupt-affinity = <&a53_0>,
201 <&a53_1>,
202 <&a53_2>,
203 <&a53_3>;
204 };
206 psci {
207 compatible = "arm,psci-1.0", "arm,psci-0.2";
208 method = "smc";
209 };
211 soc: soc {
212 compatible = "simple-bus";
213 interrupt-parent = <&gic>;
215 #address-cells = <2>;
216 #size-cells = <2>;
217 ranges;
219 gic: interrupt-controller@f1010000 {
220 compatible = "arm,gic-400";
221 #interrupt-cells = <3>;
222 #address-cells = <0>;
223 interrupt-controller;
224 reg = <0x0 0xf1010000 0 0x1000>,
225 <0x0 0xf1020000 0 0x20000>,
226 <0x0 0xf1040000 0 0x20000>,
227 <0x0 0xf1060000 0 0x20000>;
228 interrupts = <GIC_PPI 9
229 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
230 clocks = <&cpg CPG_MOD 408>;
231 clock-names = "clk";
232 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
233 resets = <&cpg 408>;
234 };
236 wdt0: watchdog@e6020000 {
237 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
238 reg = <0 0xe6020000 0 0x0c>;
239 clocks = <&cpg CPG_MOD 402>;
240 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
241 resets = <&cpg 402>;
242 status = "disabled";
243 };
245 gpio0: gpio@e6050000 {
246 compatible = "renesas,gpio-r8a7795",
247 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6050000 0 0x50>;
249 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>;
251 gpio-controller;
252 gpio-ranges = <&pfc 0 0 16>;
253 #interrupt-cells = <2>;
254 interrupt-controller;
255 clocks = <&cpg CPG_MOD 912>;
256 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
257 resets = <&cpg 912>;
258 };
260 gpio1: gpio@e6051000 {
261 compatible = "renesas,gpio-r8a7795",
262 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6051000 0 0x50>;
264 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>;
266 gpio-controller;
267 gpio-ranges = <&pfc 0 32 29>;
268 #interrupt-cells = <2>;
269 interrupt-controller;
270 clocks = <&cpg CPG_MOD 911>;
271 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
272 resets = <&cpg 911>;
273 };
275 gpio2: gpio@e6052000 {
276 compatible = "renesas,gpio-r8a7795",
277 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6052000 0 0x50>;
279 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>;
281 gpio-controller;
282 gpio-ranges = <&pfc 0 64 15>;
283 #interrupt-cells = <2>;
284 interrupt-controller;
285 clocks = <&cpg CPG_MOD 910>;
286 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
287 resets = <&cpg 910>;
288 };
290 gpio3: gpio@e6053000 {
291 compatible = "renesas,gpio-r8a7795",
292 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6053000 0 0x50>;
294 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>;
296 gpio-controller;
297 gpio-ranges = <&pfc 0 96 16>;
298 #interrupt-cells = <2>;
299 interrupt-controller;
300 clocks = <&cpg CPG_MOD 909>;
301 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
302 resets = <&cpg 909>;
303 };
305 gpio4: gpio@e6054000 {
306 compatible = "renesas,gpio-r8a7795",
307 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6054000 0 0x50>;
309 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>;
311 gpio-controller;
312 gpio-ranges = <&pfc 0 128 18>;
313 #interrupt-cells = <2>;
314 interrupt-controller;
315 clocks = <&cpg CPG_MOD 908>;
316 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
317 resets = <&cpg 908>;
318 };
320 gpio5: gpio@e6055000 {
321 compatible = "renesas,gpio-r8a7795",
322 "renesas,rcar-gen3-gpio";
323 reg = <0 0xe6055000 0 0x50>;
324 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
325 #gpio-cells = <2>;
326 gpio-controller;
327 gpio-ranges = <&pfc 0 160 26>;
328 #interrupt-cells = <2>;
329 interrupt-controller;
330 clocks = <&cpg CPG_MOD 907>;
331 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
332 resets = <&cpg 907>;
333 };
335 gpio6: gpio@e6055400 {
336 compatible = "renesas,gpio-r8a7795",
337 "renesas,rcar-gen3-gpio";
338 reg = <0 0xe6055400 0 0x50>;
339 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
340 #gpio-cells = <2>;
341 gpio-controller;
342 gpio-ranges = <&pfc 0 192 32>;
343 #interrupt-cells = <2>;
344 interrupt-controller;
345 clocks = <&cpg CPG_MOD 906>;
346 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
347 resets = <&cpg 906>;
348 };
350 gpio7: gpio@e6055800 {
351 compatible = "renesas,gpio-r8a7795",
352 "renesas,rcar-gen3-gpio";
353 reg = <0 0xe6055800 0 0x50>;
354 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
355 #gpio-cells = <2>;
356 gpio-controller;
357 gpio-ranges = <&pfc 0 224 4>;
358 #interrupt-cells = <2>;
359 interrupt-controller;
360 clocks = <&cpg CPG_MOD 905>;
361 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
362 resets = <&cpg 905>;
363 };
365 cpg: clock-controller@e6150000 {
366 compatible = "renesas,r8a7795-cpg-mssr";
367 reg = <0 0xe6150000 0 0x1000>;
368 clocks = <&extal_clk>, <&extalr_clk>;
369 clock-names = "extal", "extalr";
370 #clock-cells = <2>;
371 #power-domain-cells = <0>;
372 #reset-cells = <1>;
373 };
375 rst: reset-controller@e6160000 {
376 compatible = "renesas,r8a7795-rst";
377 reg = <0 0xe6160000 0 0x0200>;
378 };
380 prr: chipid@fff00044 {
381 compatible = "renesas,prr";
382 reg = <0 0xfff00044 0 4>;
383 };
385 sysc: system-controller@e6180000 {
386 compatible = "renesas,r8a7795-sysc";
387 reg = <0 0xe6180000 0 0x0400>;
388 #power-domain-cells = <1>;
389 };
391 pfc: pin-controller@e6060000 {
392 compatible = "renesas,pfc-r8a7795";
393 reg = <0 0xe6060000 0 0x50c>;
394 };
396 intc_ex: interrupt-controller@e61c0000 {
397 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
398 #interrupt-cells = <2>;
399 interrupt-controller;
400 reg = <0 0xe61c0000 0 0x200>;
401 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
402 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
404 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
405 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
406 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 407>;
408 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
409 resets = <&cpg 407>;
410 };
412 ipmmu_vi0: mmu@febd0000 {
413 compatible = "renesas,ipmmu-r8a7795";
414 reg = <0 0xfebd0000 0 0x1000>;
415 renesas,ipmmu-main = <&ipmmu_mm 14>;
416 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
417 #iommu-cells = <1>;
418 };
420 ipmmu_vi1: mmu@febe0000 {
421 compatible = "renesas,ipmmu-r8a7795";
422 reg = <0 0xfebe0000 0 0x1000>;
423 renesas,ipmmu-main = <&ipmmu_mm 15>;
424 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
425 #iommu-cells = <1>;
426 status = "disabled";
427 };
429 ipmmu_vp0: mmu@fe990000 {
430 compatible = "renesas,ipmmu-r8a7795";
431 reg = <0 0xfe990000 0 0x1000>;
432 renesas,ipmmu-main = <&ipmmu_mm 16>;
433 power-domains = <&sysc R8A7795_PD_A3VP>;
434 #iommu-cells = <1>;
435 status = "disabled";
436 };
438 ipmmu_vp1: mmu@fe980000 {
439 compatible = "renesas,ipmmu-r8a7795";
440 reg = <0 0xfe980000 0 0x1000>;
441 renesas,ipmmu-main = <&ipmmu_mm 17>;
442 power-domains = <&sysc R8A7795_PD_A3VP>;
443 #iommu-cells = <1>;
444 };
446 ipmmu_vc0: mmu@fe6b0000 {
447 compatible = "renesas,ipmmu-r8a7795";
448 reg = <0 0xfe6b0000 0 0x1000>;
449 renesas,ipmmu-main = <&ipmmu_mm 12>;
450 power-domains = <&sysc R8A7795_PD_A3VC>;
451 #iommu-cells = <1>;
452 status = "disabled";
453 };
455 ipmmu_vc1: mmu@fe6f0000 {
456 compatible = "renesas,ipmmu-r8a7795";
457 reg = <0 0xfe6f0000 0 0x1000>;
458 renesas,ipmmu-main = <&ipmmu_mm 13>;
459 power-domains = <&sysc R8A7795_PD_A3VC>;
460 #iommu-cells = <1>;
461 status = "disabled";
462 };
464 ipmmu_pv0: mmu@fd800000 {
465 compatible = "renesas,ipmmu-r8a7795";
466 reg = <0 0xfd800000 0 0x1000>;
467 renesas,ipmmu-main = <&ipmmu_mm 6>;
468 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
469 #iommu-cells = <1>;
470 status = "disabled";
471 };
473 ipmmu_pv2: mmu@fd960000 {
474 compatible = "renesas,ipmmu-r8a7795";
475 reg = <0 0xfd960000 0 0x1000>;
476 renesas,ipmmu-main = <&ipmmu_mm 8>;
477 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
478 #iommu-cells = <1>;
479 status = "disabled";
480 };
482 ipmmu_pv3: mmu@fd970000 {
483 compatible = "renesas,ipmmu-r8a7795";
484 reg = <0 0xfd970000 0 0x1000>;
485 renesas,ipmmu-main = <&ipmmu_mm 9>;
486 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
487 #iommu-cells = <1>;
488 status = "disabled";
489 };
491 ipmmu_ir: mmu@ff8b0000 {
492 compatible = "renesas,ipmmu-r8a7795";
493 reg = <0 0xff8b0000 0 0x1000>;
494 renesas,ipmmu-main = <&ipmmu_mm 3>;
495 power-domains = <&sysc R8A7795_PD_A3IR>;
496 #iommu-cells = <1>;
497 status = "disabled";
498 };
500 ipmmu_hc: mmu@e6570000 {
501 compatible = "renesas,ipmmu-r8a7795";
502 reg = <0 0xe6570000 0 0x1000>;
503 renesas,ipmmu-main = <&ipmmu_mm 2>;
504 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
505 #iommu-cells = <1>;
506 status = "disabled";
507 };
509 ipmmu_rt: mmu@ffc80000 {
510 compatible = "renesas,ipmmu-r8a7795";
511 reg = <0 0xffc80000 0 0x1000>;
512 renesas,ipmmu-main = <&ipmmu_mm 10>;
513 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
514 #iommu-cells = <1>;
515 status = "disabled";
516 };
518 ipmmu_mp0: mmu@ec670000 {
519 compatible = "renesas,ipmmu-r8a7795";
520 reg = <0 0xec670000 0 0x1000>;
521 renesas,ipmmu-main = <&ipmmu_mm 4>;
522 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
523 #iommu-cells = <1>;
524 status = "disabled";
525 };
527 ipmmu_ds0: mmu@e6740000 {
528 compatible = "renesas,ipmmu-r8a7795";
529 reg = <0 0xe6740000 0 0x1000>;
530 renesas,ipmmu-main = <&ipmmu_mm 0>;
531 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
532 #iommu-cells = <1>;
533 };
535 ipmmu_ds1: mmu@e7740000 {
536 compatible = "renesas,ipmmu-r8a7795";
537 reg = <0 0xe7740000 0 0x1000>;
538 renesas,ipmmu-main = <&ipmmu_mm 1>;
539 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
540 #iommu-cells = <1>;
541 };
543 ipmmu_mm: mmu@e67b0000 {
544 compatible = "renesas,ipmmu-r8a7795";
545 reg = <0 0xe67b0000 0 0x1000>;
546 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
547 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
548 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
549 #iommu-cells = <1>;
550 };
552 dmac0: dma-controller@e6700000 {
553 compatible = "renesas,dmac-r8a7795",
554 "renesas,rcar-dmac";
555 reg = <0 0xe6700000 0 0x10000>;
556 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
557 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
558 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
559 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
560 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
561 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
562 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
563 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
564 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
565 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
566 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
567 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
568 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
569 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
570 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
571 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
572 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
573 interrupt-names = "error",
574 "ch0", "ch1", "ch2", "ch3",
575 "ch4", "ch5", "ch6", "ch7",
576 "ch8", "ch9", "ch10", "ch11",
577 "ch12", "ch13", "ch14", "ch15";
578 clocks = <&cpg CPG_MOD 219>;
579 clock-names = "fck";
580 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
581 resets = <&cpg 219>;
582 #dma-cells = <1>;
583 dma-channels = <16>;
584 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
585 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
586 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
587 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
588 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
589 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
590 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
591 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
592 };
594 dmac1: dma-controller@e7300000 {
595 compatible = "renesas,dmac-r8a7795",
596 "renesas,rcar-dmac";
597 reg = <0 0xe7300000 0 0x10000>;
598 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
599 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
600 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
601 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
602 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
603 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
604 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
605 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
606 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
607 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
608 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
609 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
610 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
611 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
612 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
613 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
614 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
615 interrupt-names = "error",
616 "ch0", "ch1", "ch2", "ch3",
617 "ch4", "ch5", "ch6", "ch7",
618 "ch8", "ch9", "ch10", "ch11",
619 "ch12", "ch13", "ch14", "ch15";
620 clocks = <&cpg CPG_MOD 218>;
621 clock-names = "fck";
622 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
623 resets = <&cpg 218>;
624 #dma-cells = <1>;
625 dma-channels = <16>;
626 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
627 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
628 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
629 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
630 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
631 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
632 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
633 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
634 };
636 dmac2: dma-controller@e7310000 {
637 compatible = "renesas,dmac-r8a7795",
638 "renesas,rcar-dmac";
639 reg = <0 0xe7310000 0 0x10000>;
640 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
641 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
642 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
643 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
644 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
645 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
646 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
647 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
648 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
649 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
650 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
651 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
652 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
653 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
654 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
655 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
656 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
657 interrupt-names = "error",
658 "ch0", "ch1", "ch2", "ch3",
659 "ch4", "ch5", "ch6", "ch7",
660 "ch8", "ch9", "ch10", "ch11",
661 "ch12", "ch13", "ch14", "ch15";
662 clocks = <&cpg CPG_MOD 217>;
663 clock-names = "fck";
664 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
665 resets = <&cpg 217>;
666 #dma-cells = <1>;
667 dma-channels = <16>;
668 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
669 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
670 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
671 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
672 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
673 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
674 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
675 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
676 };
678 audma0: dma-controller@ec700000 {
679 compatible = "renesas,dmac-r8a7795",
680 "renesas,rcar-dmac";
681 reg = <0 0xec700000 0 0x10000>;
682 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
683 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
684 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
685 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
686 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
687 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
688 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
689 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
690 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
691 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
692 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
693 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
694 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
695 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
696 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
697 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
698 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
699 interrupt-names = "error",
700 "ch0", "ch1", "ch2", "ch3",
701 "ch4", "ch5", "ch6", "ch7",
702 "ch8", "ch9", "ch10", "ch11",
703 "ch12", "ch13", "ch14", "ch15";
704 clocks = <&cpg CPG_MOD 502>;
705 clock-names = "fck";
706 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
707 resets = <&cpg 502>;
708 #dma-cells = <1>;
709 dma-channels = <16>;
710 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
711 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
712 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
713 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
714 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
715 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
716 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
717 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
718 };
720 audma1: dma-controller@ec720000 {
721 compatible = "renesas,dmac-r8a7795",
722 "renesas,rcar-dmac";
723 reg = <0 0xec720000 0 0x10000>;
724 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
725 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
726 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
727 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
728 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
729 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
730 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
731 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
732 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
733 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
734 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
735 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
736 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
737 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
738 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
739 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
740 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
741 interrupt-names = "error",
742 "ch0", "ch1", "ch2", "ch3",
743 "ch4", "ch5", "ch6", "ch7",
744 "ch8", "ch9", "ch10", "ch11",
745 "ch12", "ch13", "ch14", "ch15";
746 clocks = <&cpg CPG_MOD 501>;
747 clock-names = "fck";
748 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
749 resets = <&cpg 501>;
750 #dma-cells = <1>;
751 dma-channels = <16>;
752 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
753 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
754 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
755 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
756 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
757 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
758 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
759 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
760 };
762 avb: ethernet@e6800000 {
763 compatible = "renesas,etheravb-r8a7795",
764 "renesas,etheravb-rcar-gen3";
765 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
766 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
767 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
768 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
769 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
771 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
772 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
774 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
775 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
776 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
777 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
778 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
779 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
780 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
781 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
782 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
783 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
784 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
785 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
786 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
787 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
788 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
789 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
790 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
791 interrupt-names = "ch0", "ch1", "ch2", "ch3",
792 "ch4", "ch5", "ch6", "ch7",
793 "ch8", "ch9", "ch10", "ch11",
794 "ch12", "ch13", "ch14", "ch15",
795 "ch16", "ch17", "ch18", "ch19",
796 "ch20", "ch21", "ch22", "ch23",
797 "ch24";
798 clocks = <&cpg CPG_MOD 812>;
799 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
800 resets = <&cpg 812>;
801 phy-mode = "rgmii-txid";
802 iommus = <&ipmmu_ds0 16>;
803 #address-cells = <1>;
804 #size-cells = <0>;
805 status = "disabled";
806 };
808 can0: can@e6c30000 {
809 compatible = "renesas,can-r8a7795",
810 "renesas,rcar-gen3-can";
811 reg = <0 0xe6c30000 0 0x1000>;
812 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
813 clocks = <&cpg CPG_MOD 916>,
814 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
815 <&can_clk>;
816 clock-names = "clkp1", "clkp2", "can_clk";
817 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
818 assigned-clock-rates = <40000000>;
819 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
820 resets = <&cpg 916>;
821 status = "disabled";
822 };
824 can1: can@e6c38000 {
825 compatible = "renesas,can-r8a7795",
826 "renesas,rcar-gen3-can";
827 reg = <0 0xe6c38000 0 0x1000>;
828 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&cpg CPG_MOD 915>,
830 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
831 <&can_clk>;
832 clock-names = "clkp1", "clkp2", "can_clk";
833 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
834 assigned-clock-rates = <40000000>;
835 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
836 resets = <&cpg 915>;
837 status = "disabled";
838 };
840 canfd: can@e66c0000 {
841 compatible = "renesas,r8a7795-canfd",
842 "renesas,rcar-gen3-canfd";
843 reg = <0 0xe66c0000 0 0x8000>;
844 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
846 clocks = <&cpg CPG_MOD 914>,
847 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
848 <&can_clk>;
849 clock-names = "fck", "canfd", "can_clk";
850 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
851 assigned-clock-rates = <40000000>;
852 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
853 resets = <&cpg 914>;
854 status = "disabled";
856 channel0 {
857 status = "disabled";
858 };
860 channel1 {
861 status = "disabled";
862 };
863 };
865 drif00: rif@e6f40000 {
866 compatible = "renesas,r8a7795-drif",
867 "renesas,rcar-gen3-drif";
868 reg = <0 0xe6f40000 0 0x64>;
869 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
870 clocks = <&cpg CPG_MOD 515>;
871 clock-names = "fck";
872 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
873 dma-names = "rx", "rx";
874 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
875 resets = <&cpg 515>;
876 renesas,bonding = <&drif01>;
877 status = "disabled";
878 };
880 drif01: rif@e6f50000 {
881 compatible = "renesas,r8a7795-drif",
882 "renesas,rcar-gen3-drif";
883 reg = <0 0xe6f50000 0 0x64>;
884 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
885 clocks = <&cpg CPG_MOD 514>;
886 clock-names = "fck";
887 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
888 dma-names = "rx", "rx";
889 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
890 resets = <&cpg 514>;
891 renesas,bonding = <&drif00>;
892 status = "disabled";
893 };
895 drif10: rif@e6f60000 {
896 compatible = "renesas,r8a7795-drif",
897 "renesas,rcar-gen3-drif";
898 reg = <0 0xe6f60000 0 0x64>;
899 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
900 clocks = <&cpg CPG_MOD 513>;
901 clock-names = "fck";
902 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
903 dma-names = "rx", "rx";
904 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
905 resets = <&cpg 513>;
906 renesas,bonding = <&drif11>;
907 status = "disabled";
908 };
910 drif11: rif@e6f70000 {
911 compatible = "renesas,r8a7795-drif",
912 "renesas,rcar-gen3-drif";
913 reg = <0 0xe6f70000 0 0x64>;
914 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
915 clocks = <&cpg CPG_MOD 512>;
916 clock-names = "fck";
917 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
918 dma-names = "rx", "rx";
919 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
920 resets = <&cpg 512>;
921 renesas,bonding = <&drif10>;
922 status = "disabled";
923 };
925 drif20: rif@e6f80000 {
926 compatible = "renesas,r8a7795-drif",
927 "renesas,rcar-gen3-drif";
928 reg = <0 0xe6f80000 0 0x64>;
929 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
930 clocks = <&cpg CPG_MOD 511>;
931 clock-names = "fck";
932 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
933 dma-names = "rx", "rx";
934 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
935 resets = <&cpg 511>;
936 renesas,bonding = <&drif21>;
937 status = "disabled";
938 };
940 drif21: rif@e6f90000 {
941 compatible = "renesas,r8a7795-drif",
942 "renesas,rcar-gen3-drif";
943 reg = <0 0xe6f90000 0 0x64>;
944 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
945 clocks = <&cpg CPG_MOD 510>;
946 clock-names = "fck";
947 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
948 dma-names = "rx", "rx";
949 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
950 resets = <&cpg 510>;
951 renesas,bonding = <&drif20>;
952 status = "disabled";
953 };
955 drif30: rif@e6fa0000 {
956 compatible = "renesas,r8a7795-drif",
957 "renesas,rcar-gen3-drif";
958 reg = <0 0xe6fa0000 0 0x64>;
959 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
960 clocks = <&cpg CPG_MOD 509>;
961 clock-names = "fck";
962 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
963 dma-names = "rx", "rx";
964 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
965 resets = <&cpg 509>;
966 renesas,bonding = <&drif31>;
967 status = "disabled";
968 };
970 drif31: rif@e6fb0000 {
971 compatible = "renesas,r8a7795-drif",
972 "renesas,rcar-gen3-drif";
973 reg = <0 0xe6fb0000 0 0x64>;
974 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
975 clocks = <&cpg CPG_MOD 508>;
976 clock-names = "fck";
977 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
978 dma-names = "rx", "rx";
979 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
980 resets = <&cpg 508>;
981 renesas,bonding = <&drif30>;
982 status = "disabled";
983 };
985 hscif0: serial@e6540000 {
986 compatible = "renesas,hscif-r8a7795",
987 "renesas,rcar-gen3-hscif",
988 "renesas,hscif";
989 reg = <0 0xe6540000 0 96>;
990 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
991 clocks = <&cpg CPG_MOD 520>,
992 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
993 <&scif_clk>;
994 clock-names = "fck", "brg_int", "scif_clk";
995 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
996 dma-names = "tx", "rx";
997 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
998 resets = <&cpg 520>;
999 status = "disabled";
1000 };
1002 hscif1: serial@e6550000 {
1003 compatible = "renesas,hscif-r8a7795",
1004 "renesas,rcar-gen3-hscif",
1005 "renesas,hscif";
1006 reg = <0 0xe6550000 0 96>;
1007 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
1008 clocks = <&cpg CPG_MOD 519>,
1009 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1010 <&scif_clk>;
1011 clock-names = "fck", "brg_int", "scif_clk";
1012 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
1013 dma-names = "tx", "rx";
1014 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1015 resets = <&cpg 519>;
1016 status = "disabled";
1017 };
1019 hscif2: serial@e6560000 {
1020 compatible = "renesas,hscif-r8a7795",
1021 "renesas,rcar-gen3-hscif",
1022 "renesas,hscif";
1023 reg = <0 0xe6560000 0 96>;
1024 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
1025 clocks = <&cpg CPG_MOD 518>,
1026 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1027 <&scif_clk>;
1028 clock-names = "fck", "brg_int", "scif_clk";
1029 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
1030 dma-names = "tx", "rx";
1031 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1032 resets = <&cpg 518>;
1033 status = "disabled";
1034 };
1036 hscif3: serial@e66a0000 {
1037 compatible = "renesas,hscif-r8a7795",
1038 "renesas,rcar-gen3-hscif",
1039 "renesas,hscif";
1040 reg = <0 0xe66a0000 0 96>;
1041 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
1042 clocks = <&cpg CPG_MOD 517>,
1043 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1044 <&scif_clk>;
1045 clock-names = "fck", "brg_int", "scif_clk";
1046 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
1047 dma-names = "tx", "rx";
1048 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1049 resets = <&cpg 517>;
1050 status = "disabled";
1051 };
1053 hscif4: serial@e66b0000 {
1054 compatible = "renesas,hscif-r8a7795",
1055 "renesas,rcar-gen3-hscif",
1056 "renesas,hscif";
1057 reg = <0 0xe66b0000 0 96>;
1058 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
1059 clocks = <&cpg CPG_MOD 516>,
1060 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1061 <&scif_clk>;
1062 clock-names = "fck", "brg_int", "scif_clk";
1063 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
1064 dma-names = "tx", "rx";
1065 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1066 resets = <&cpg 516>;
1067 status = "disabled";
1068 };
1070 msiof0: spi@e6e90000 {
1071 compatible = "renesas,msiof-r8a7795",
1072 "renesas,rcar-gen3-msiof";
1073 reg = <0 0xe6e90000 0 0x0064>;
1074 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1075 clocks = <&cpg CPG_MOD 211>;
1076 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1077 <&dmac2 0x41>, <&dmac2 0x40>;
1078 dma-names = "tx", "rx", "tx", "rx";
1079 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1080 resets = <&cpg 211>;
1081 #address-cells = <1>;
1082 #size-cells = <0>;
1083 status = "disabled";
1084 };
1086 msiof1: spi@e6ea0000 {
1087 compatible = "renesas,msiof-r8a7795",
1088 "renesas,rcar-gen3-msiof";
1089 reg = <0 0xe6ea0000 0 0x0064>;
1090 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1091 clocks = <&cpg CPG_MOD 210>;
1092 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1093 <&dmac2 0x43>, <&dmac2 0x42>;
1094 dma-names = "tx", "rx", "tx", "rx";
1095 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1096 resets = <&cpg 210>;
1097 #address-cells = <1>;
1098 #size-cells = <0>;
1099 status = "disabled";
1100 };
1102 msiof2: spi@e6c00000 {
1103 compatible = "renesas,msiof-r8a7795",
1104 "renesas,rcar-gen3-msiof";
1105 reg = <0 0xe6c00000 0 0x0064>;
1106 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1107 clocks = <&cpg CPG_MOD 209>;
1108 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1109 dma-names = "tx", "rx";
1110 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1111 resets = <&cpg 209>;
1112 #address-cells = <1>;
1113 #size-cells = <0>;
1114 status = "disabled";
1115 };
1117 msiof3: spi@e6c10000 {
1118 compatible = "renesas,msiof-r8a7795",
1119 "renesas,rcar-gen3-msiof";
1120 reg = <0 0xe6c10000 0 0x0064>;
1121 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1122 clocks = <&cpg CPG_MOD 208>;
1123 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1124 dma-names = "tx", "rx";
1125 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1126 resets = <&cpg 208>;
1127 #address-cells = <1>;
1128 #size-cells = <0>;
1129 status = "disabled";
1130 };
1132 scif0: serial@e6e60000 {
1133 compatible = "renesas,scif-r8a7795",
1134 "renesas,rcar-gen3-scif", "renesas,scif";
1135 reg = <0 0xe6e60000 0 64>;
1136 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1137 clocks = <&cpg CPG_MOD 207>,
1138 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1139 <&scif_clk>;
1140 clock-names = "fck", "brg_int", "scif_clk";
1141 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
1142 dma-names = "tx", "rx";
1143 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1144 resets = <&cpg 207>;
1145 status = "disabled";
1146 };
1148 scif1: serial@e6e68000 {
1149 compatible = "renesas,scif-r8a7795",
1150 "renesas,rcar-gen3-scif", "renesas,scif";
1151 reg = <0 0xe6e68000 0 64>;
1152 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1153 clocks = <&cpg CPG_MOD 206>,
1154 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1155 <&scif_clk>;
1156 clock-names = "fck", "brg_int", "scif_clk";
1157 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
1158 dma-names = "tx", "rx";
1159 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1160 resets = <&cpg 206>;
1161 status = "disabled";
1162 };
1164 scif2: serial@e6e88000 {
1165 compatible = "renesas,scif-r8a7795",
1166 "renesas,rcar-gen3-scif", "renesas,scif";
1167 reg = <0 0xe6e88000 0 64>;
1168 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1169 clocks = <&cpg CPG_MOD 310>,
1170 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1171 <&scif_clk>;
1172 clock-names = "fck", "brg_int", "scif_clk";
1173 dmas = <&dmac1 0x13>, <&dmac1 0x12>;
1174 dma-names = "tx", "rx";
1175 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1176 resets = <&cpg 310>;
1177 status = "disabled";
1178 };
1180 scif3: serial@e6c50000 {
1181 compatible = "renesas,scif-r8a7795",
1182 "renesas,rcar-gen3-scif", "renesas,scif";
1183 reg = <0 0xe6c50000 0 64>;
1184 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1185 clocks = <&cpg CPG_MOD 204>,
1186 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1187 <&scif_clk>;
1188 clock-names = "fck", "brg_int", "scif_clk";
1189 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1190 dma-names = "tx", "rx";
1191 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1192 resets = <&cpg 204>;
1193 status = "disabled";
1194 };
1196 scif4: serial@e6c40000 {
1197 compatible = "renesas,scif-r8a7795",
1198 "renesas,rcar-gen3-scif", "renesas,scif";
1199 reg = <0 0xe6c40000 0 64>;
1200 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1201 clocks = <&cpg CPG_MOD 203>,
1202 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1203 <&scif_clk>;
1204 clock-names = "fck", "brg_int", "scif_clk";
1205 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1206 dma-names = "tx", "rx";
1207 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1208 resets = <&cpg 203>;
1209 status = "disabled";
1210 };
1212 scif5: serial@e6f30000 {
1213 compatible = "renesas,scif-r8a7795",
1214 "renesas,rcar-gen3-scif", "renesas,scif";
1215 reg = <0 0xe6f30000 0 64>;
1216 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1217 clocks = <&cpg CPG_MOD 202>,
1218 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1219 <&scif_clk>;
1220 clock-names = "fck", "brg_int", "scif_clk";
1221 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
1222 dma-names = "tx", "rx";
1223 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1224 resets = <&cpg 202>;
1225 status = "disabled";
1226 };
1228 i2c_dvfs: i2c@e60b0000 {
1229 #address-cells = <1>;
1230 #size-cells = <0>;
1231 compatible = "renesas,iic-r8a7795",
1232 "renesas,rcar-gen3-iic",
1233 "renesas,rmobile-iic";
1234 reg = <0 0xe60b0000 0 0x425>;
1235 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
1236 clocks = <&cpg CPG_MOD 926>;
1237 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1238 resets = <&cpg 926>;
1239 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
1240 dma-names = "tx", "rx";
1241 status = "disabled";
1242 };
1244 i2c0: i2c@e6500000 {
1245 #address-cells = <1>;
1246 #size-cells = <0>;
1247 compatible = "renesas,i2c-r8a7795",
1248 "renesas,rcar-gen3-i2c";
1249 reg = <0 0xe6500000 0 0x40>;
1250 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
1251 clocks = <&cpg CPG_MOD 931>;
1252 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1253 resets = <&cpg 931>;
1254 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
1255 dma-names = "tx", "rx";
1256 i2c-scl-internal-delay-ns = <110>;
1257 status = "disabled";
1258 };
1260 i2c1: i2c@e6508000 {
1261 #address-cells = <1>;
1262 #size-cells = <0>;
1263 compatible = "renesas,i2c-r8a7795",
1264 "renesas,rcar-gen3-i2c";
1265 reg = <0 0xe6508000 0 0x40>;
1266 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
1267 clocks = <&cpg CPG_MOD 930>;
1268 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1269 resets = <&cpg 930>;
1270 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
1271 dma-names = "tx", "rx";
1272 i2c-scl-internal-delay-ns = <6>;
1273 status = "disabled";
1274 };
1276 i2c2: i2c@e6510000 {
1277 #address-cells = <1>;
1278 #size-cells = <0>;
1279 compatible = "renesas,i2c-r8a7795",
1280 "renesas,rcar-gen3-i2c";
1281 reg = <0 0xe6510000 0 0x40>;
1282 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
1283 clocks = <&cpg CPG_MOD 929>;
1284 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1285 resets = <&cpg 929>;
1286 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
1287 dma-names = "tx", "rx";
1288 i2c-scl-internal-delay-ns = <6>;
1289 status = "disabled";
1290 };
1292 i2c3: i2c@e66d0000 {
1293 #address-cells = <1>;
1294 #size-cells = <0>;
1295 compatible = "renesas,i2c-r8a7795",
1296 "renesas,rcar-gen3-i2c";
1297 reg = <0 0xe66d0000 0 0x40>;
1298 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
1299 clocks = <&cpg CPG_MOD 928>;
1300 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1301 resets = <&cpg 928>;
1302 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
1303 dma-names = "tx", "rx";
1304 i2c-scl-internal-delay-ns = <110>;
1305 status = "disabled";
1306 };
1308 i2c4: i2c@e66d8000 {
1309 #address-cells = <1>;
1310 #size-cells = <0>;
1311 compatible = "renesas,i2c-r8a7795",
1312 "renesas,rcar-gen3-i2c";
1313 reg = <0 0xe66d8000 0 0x40>;
1314 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
1315 clocks = <&cpg CPG_MOD 927>;
1316 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1317 resets = <&cpg 927>;
1318 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
1319 dma-names = "tx", "rx";
1320 i2c-scl-internal-delay-ns = <110>;
1321 status = "disabled";
1322 };
1324 i2c5: i2c@e66e0000 {
1325 #address-cells = <1>;
1326 #size-cells = <0>;
1327 compatible = "renesas,i2c-r8a7795",
1328 "renesas,rcar-gen3-i2c";
1329 reg = <0 0xe66e0000 0 0x40>;
1330 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
1331 clocks = <&cpg CPG_MOD 919>;
1332 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1333 resets = <&cpg 919>;
1334 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
1335 dma-names = "tx", "rx";
1336 i2c-scl-internal-delay-ns = <110>;
1337 status = "disabled";
1338 };
1340 i2c6: i2c@e66e8000 {
1341 #address-cells = <1>;
1342 #size-cells = <0>;
1343 compatible = "renesas,i2c-r8a7795",
1344 "renesas,rcar-gen3-i2c";
1345 reg = <0 0xe66e8000 0 0x40>;
1346 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1347 clocks = <&cpg CPG_MOD 918>;
1348 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1349 resets = <&cpg 918>;
1350 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
1351 dma-names = "tx", "rx";
1352 i2c-scl-internal-delay-ns = <6>;
1353 status = "disabled";
1354 };
1356 pwm0: pwm@e6e30000 {
1357 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1358 reg = <0 0xe6e30000 0 0x8>;
1359 clocks = <&cpg CPG_MOD 523>;
1360 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1361 resets = <&cpg 523>;
1362 #pwm-cells = <2>;
1363 status = "disabled";
1364 };
1366 pwm1: pwm@e6e31000 {
1367 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1368 reg = <0 0xe6e31000 0 0x8>;
1369 clocks = <&cpg CPG_MOD 523>;
1370 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1371 resets = <&cpg 523>;
1372 #pwm-cells = <2>;
1373 status = "disabled";
1374 };
1376 pwm2: pwm@e6e32000 {
1377 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1378 reg = <0 0xe6e32000 0 0x8>;
1379 clocks = <&cpg CPG_MOD 523>;
1380 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1381 resets = <&cpg 523>;
1382 #pwm-cells = <2>;
1383 status = "disabled";
1384 };
1386 pwm3: pwm@e6e33000 {
1387 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1388 reg = <0 0xe6e33000 0 0x8>;
1389 clocks = <&cpg CPG_MOD 523>;
1390 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1391 resets = <&cpg 523>;
1392 #pwm-cells = <2>;
1393 status = "disabled";
1394 };
1396 pwm4: pwm@e6e34000 {
1397 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1398 reg = <0 0xe6e34000 0 0x8>;
1399 clocks = <&cpg CPG_MOD 523>;
1400 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1401 resets = <&cpg 523>;
1402 #pwm-cells = <2>;
1403 status = "disabled";
1404 };
1406 pwm5: pwm@e6e35000 {
1407 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1408 reg = <0 0xe6e35000 0 0x8>;
1409 clocks = <&cpg CPG_MOD 523>;
1410 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1411 resets = <&cpg 523>;
1412 #pwm-cells = <2>;
1413 status = "disabled";
1414 };
1416 pwm6: pwm@e6e36000 {
1417 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1418 reg = <0 0xe6e36000 0 0x8>;
1419 clocks = <&cpg CPG_MOD 523>;
1420 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1421 resets = <&cpg 523>;
1422 #pwm-cells = <2>;
1423 status = "disabled";
1424 };
1426 rcar_sound: sound@ec500000 {
1427 /*
1428 * #sound-dai-cells is required
1429 *
1430 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1431 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1432 */
1433 /*
1434 * #clock-cells is required for audio_clkout0/1/2/3
1435 *
1436 * clkout : #clock-cells = <0>; <&rcar_sound>;
1437 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1438 */
1439 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1440 reg = <0 0xec500000 0 0x1000>, /* SCU */
1441 <0 0xec5a0000 0 0x100>, /* ADG */
1442 <0 0xec540000 0 0x1000>, /* SSIU */
1443 <0 0xec541000 0 0x280>, /* SSI */
1444 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1445 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1447 clocks = <&cpg CPG_MOD 1005>,
1448 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1449 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1450 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1451 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1452 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1453 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1454 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1455 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1456 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1457 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1458 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1459 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1460 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1461 <&audio_clk_a>, <&audio_clk_b>,
1462 <&audio_clk_c>,
1463 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1464 clock-names = "ssi-all",
1465 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1466 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1467 "ssi.1", "ssi.0",
1468 "src.9", "src.8", "src.7", "src.6",
1469 "src.5", "src.4", "src.3", "src.2",
1470 "src.1", "src.0",
1471 "mix.1", "mix.0",
1472 "ctu.1", "ctu.0",
1473 "dvc.0", "dvc.1",
1474 "clk_a", "clk_b", "clk_c", "clk_i";
1475 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1476 resets = <&cpg 1005>,
1477 <&cpg 1006>, <&cpg 1007>,
1478 <&cpg 1008>, <&cpg 1009>,
1479 <&cpg 1010>, <&cpg 1011>,
1480 <&cpg 1012>, <&cpg 1013>,
1481 <&cpg 1014>, <&cpg 1015>;
1482 reset-names = "ssi-all",
1483 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1484 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1485 "ssi.1", "ssi.0";
1486 status = "disabled";
1488 rcar_sound,dvc {
1489 dvc0: dvc-0 {
1490 dmas = <&audma1 0xbc>;
1491 dma-names = "tx";
1492 };
1493 dvc1: dvc-1 {
1494 dmas = <&audma1 0xbe>;
1495 dma-names = "tx";
1496 };
1497 };
1499 rcar_sound,mix {
1500 mix0: mix-0 { };
1501 mix1: mix-1 { };
1502 };
1504 rcar_sound,ctu {
1505 ctu00: ctu-0 { };
1506 ctu01: ctu-1 { };
1507 ctu02: ctu-2 { };
1508 ctu03: ctu-3 { };
1509 ctu10: ctu-4 { };
1510 ctu11: ctu-5 { };
1511 ctu12: ctu-6 { };
1512 ctu13: ctu-7 { };
1513 };
1515 rcar_sound,src {
1516 src0: src-0 {
1517 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1518 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1519 dma-names = "rx", "tx";
1520 };
1521 src1: src-1 {
1522 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1523 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1524 dma-names = "rx", "tx";
1525 };
1526 src2: src-2 {
1527 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1528 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1529 dma-names = "rx", "tx";
1530 };
1531 src3: src-3 {
1532 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1533 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1534 dma-names = "rx", "tx";
1535 };
1536 src4: src-4 {
1537 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1538 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1539 dma-names = "rx", "tx";
1540 };
1541 src5: src-5 {
1542 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1543 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1544 dma-names = "rx", "tx";
1545 };
1546 src6: src-6 {
1547 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1548 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1549 dma-names = "rx", "tx";
1550 };
1551 src7: src-7 {
1552 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1553 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1554 dma-names = "rx", "tx";
1555 };
1556 src8: src-8 {
1557 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1558 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1559 dma-names = "rx", "tx";
1560 };
1561 src9: src-9 {
1562 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1563 dmas = <&audma0 0x97>, <&audma1 0xba>;
1564 dma-names = "rx", "tx";
1565 };
1566 };
1568 rcar_sound,ssi {
1569 ssi0: ssi-0 {
1570 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1571 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1572 dma-names = "rx", "tx", "rxu", "txu";
1573 };
1574 ssi1: ssi-1 {
1575 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1576 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1577 dma-names = "rx", "tx", "rxu", "txu";
1578 };
1579 ssi2: ssi-2 {
1580 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1581 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1582 dma-names = "rx", "tx", "rxu", "txu";
1583 };
1584 ssi3: ssi-3 {
1585 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1586 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1587 dma-names = "rx", "tx", "rxu", "txu";
1588 };
1589 ssi4: ssi-4 {
1590 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1591 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1592 dma-names = "rx", "tx", "rxu", "txu";
1593 };
1594 ssi5: ssi-5 {
1595 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1596 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1597 dma-names = "rx", "tx", "rxu", "txu";
1598 };
1599 ssi6: ssi-6 {
1600 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1601 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1602 dma-names = "rx", "tx", "rxu", "txu";
1603 };
1604 ssi7: ssi-7 {
1605 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1606 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1607 dma-names = "rx", "tx", "rxu", "txu";
1608 };
1609 ssi8: ssi-8 {
1610 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1611 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1612 dma-names = "rx", "tx", "rxu", "txu";
1613 };
1614 ssi9: ssi-9 {
1615 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1616 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1617 dma-names = "rx", "tx", "rxu", "txu";
1618 };
1619 };
1620 };
1622 sata: sata@ee300000 {
1623 compatible = "renesas,sata-r8a7795",
1624 "renesas,rcar-gen3-sata";
1625 reg = <0 0xee300000 0 0x200000>;
1626 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1627 clocks = <&cpg CPG_MOD 815>;
1628 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1629 resets = <&cpg 815>;
1630 status = "disabled";
1631 iommus = <&ipmmu_hc 2>;
1632 };
1634 usb3_phy0: usb-phy@e65ee000 {
1635 compatible = "renesas,r8a7795-usb3-phy",
1636 "renesas,rcar-gen3-usb3-phy";
1637 reg = <0 0xe65ee000 0 0x90>;
1638 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
1639 <&usb_extal_clk>;
1640 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
1641 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1642 resets = <&cpg 328>;
1643 #phy-cells = <0>;
1644 status = "disabled";
1645 };
1647 xhci0: usb@ee000000 {
1648 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1649 reg = <0 0xee000000 0 0xc00>;
1650 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1651 clocks = <&cpg CPG_MOD 328>;
1652 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1653 resets = <&cpg 328>;
1654 status = "disabled";
1655 };
1657 usb3_peri0: usb@ee020000 {
1658 compatible = "renesas,r8a7795-usb3-peri",
1659 "renesas,rcar-gen3-usb3-peri";
1660 reg = <0 0xee020000 0 0x400>;
1661 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1662 clocks = <&cpg CPG_MOD 328>;
1663 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1664 resets = <&cpg 328>;
1665 status = "disabled";
1666 };
1668 usb_dmac0: dma-controller@e65a0000 {
1669 compatible = "renesas,r8a7795-usb-dmac",
1670 "renesas,usb-dmac";
1671 reg = <0 0xe65a0000 0 0x100>;
1672 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1673 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1674 interrupt-names = "ch0", "ch1";
1675 clocks = <&cpg CPG_MOD 330>;
1676 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1677 resets = <&cpg 330>;
1678 #dma-cells = <1>;
1679 dma-channels = <2>;
1680 };
1682 usb_dmac1: dma-controller@e65b0000 {
1683 compatible = "renesas,r8a7795-usb-dmac",
1684 "renesas,usb-dmac";
1685 reg = <0 0xe65b0000 0 0x100>;
1686 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1687 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1688 interrupt-names = "ch0", "ch1";
1689 clocks = <&cpg CPG_MOD 331>;
1690 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1691 resets = <&cpg 331>;
1692 #dma-cells = <1>;
1693 dma-channels = <2>;
1694 };
1696 usb_dmac2: dma-controller@e6460000 {
1697 compatible = "renesas,r8a7795-usb-dmac",
1698 "renesas,usb-dmac";
1699 reg = <0 0xe6460000 0 0x100>;
1700 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
1701 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1702 interrupt-names = "ch0", "ch1";
1703 clocks = <&cpg CPG_MOD 326>;
1704 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1705 resets = <&cpg 326>;
1706 #dma-cells = <1>;
1707 dma-channels = <2>;
1708 };
1710 usb_dmac3: dma-controller@e6470000 {
1711 compatible = "renesas,r8a7795-usb-dmac",
1712 "renesas,usb-dmac";
1713 reg = <0 0xe6470000 0 0x100>;
1714 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
1715 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1716 interrupt-names = "ch0", "ch1";
1717 clocks = <&cpg CPG_MOD 329>;
1718 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1719 resets = <&cpg 329>;
1720 #dma-cells = <1>;
1721 dma-channels = <2>;
1722 };
1724 sdhi0: sd@ee100000 {
1725 compatible = "renesas,sdhi-r8a7795",
1726 "renesas,rcar-gen3-sdhi";
1727 reg = <0 0xee100000 0 0x2000>;
1728 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1729 clocks = <&cpg CPG_MOD 314>;
1730 max-frequency = <200000000>;
1731 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1732 resets = <&cpg 314>;
1733 status = "disabled";
1734 };
1736 sdhi1: sd@ee120000 {
1737 compatible = "renesas,sdhi-r8a7795",
1738 "renesas,rcar-gen3-sdhi";
1739 reg = <0 0xee120000 0 0x2000>;
1740 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1741 clocks = <&cpg CPG_MOD 313>;
1742 max-frequency = <200000000>;
1743 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1744 resets = <&cpg 313>;
1745 status = "disabled";
1746 };
1748 sdhi2: sd@ee140000 {
1749 compatible = "renesas,sdhi-r8a7795",
1750 "renesas,rcar-gen3-sdhi";
1751 reg = <0 0xee140000 0 0x2000>;
1752 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1753 clocks = <&cpg CPG_MOD 312>;
1754 max-frequency = <200000000>;
1755 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1756 resets = <&cpg 312>;
1757 status = "disabled";
1758 };
1760 sdhi3: sd@ee160000 {
1761 compatible = "renesas,sdhi-r8a7795",
1762 "renesas,rcar-gen3-sdhi";
1763 reg = <0 0xee160000 0 0x2000>;
1764 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1765 clocks = <&cpg CPG_MOD 311>;
1766 max-frequency = <200000000>;
1767 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1768 resets = <&cpg 311>;
1769 status = "disabled";
1770 };
1772 usb2_phy0: usb-phy@ee080200 {
1773 compatible = "renesas,usb2-phy-r8a7795",
1774 "renesas,rcar-gen3-usb2-phy";
1775 reg = <0 0xee080200 0 0x700>;
1776 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1777 clocks = <&cpg CPG_MOD 703>;
1778 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1779 resets = <&cpg 703>;
1780 #phy-cells = <0>;
1781 status = "disabled";
1782 };
1784 usb2_phy1: usb-phy@ee0a0200 {
1785 compatible = "renesas,usb2-phy-r8a7795",
1786 "renesas,rcar-gen3-usb2-phy";
1787 reg = <0 0xee0a0200 0 0x700>;
1788 clocks = <&cpg CPG_MOD 702>;
1789 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1790 resets = <&cpg 702>;
1791 #phy-cells = <0>;
1792 status = "disabled";
1793 };
1795 usb2_phy2: usb-phy@ee0c0200 {
1796 compatible = "renesas,usb2-phy-r8a7795",
1797 "renesas,rcar-gen3-usb2-phy";
1798 reg = <0 0xee0c0200 0 0x700>;
1799 clocks = <&cpg CPG_MOD 701>;
1800 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1801 resets = <&cpg 701>;
1802 #phy-cells = <0>;
1803 status = "disabled";
1804 };
1806 usb2_phy3: usb-phy@ee0e0200 {
1807 compatible = "renesas,usb2-phy-r8a7795",
1808 "renesas,rcar-gen3-usb2-phy";
1809 reg = <0 0xee0e0200 0 0x700>;
1810 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1811 clocks = <&cpg CPG_MOD 700>;
1812 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1813 resets = <&cpg 700>;
1814 #phy-cells = <0>;
1815 status = "disabled";
1816 };
1818 ehci0: usb@ee080100 {
1819 compatible = "generic-ehci";
1820 reg = <0 0xee080100 0 0x100>;
1821 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1822 clocks = <&cpg CPG_MOD 703>;
1823 phys = <&usb2_phy0>;
1824 phy-names = "usb";
1825 companion = <&ohci0>;
1826 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1827 resets = <&cpg 703>;
1828 status = "disabled";
1829 };
1831 ehci1: usb@ee0a0100 {
1832 compatible = "generic-ehci";
1833 reg = <0 0xee0a0100 0 0x100>;
1834 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1835 clocks = <&cpg CPG_MOD 702>;
1836 phys = <&usb2_phy1>;
1837 phy-names = "usb";
1838 companion = <&ohci1>;
1839 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1840 resets = <&cpg 702>;
1841 status = "disabled";
1842 };
1844 ehci2: usb@ee0c0100 {
1845 compatible = "generic-ehci";
1846 reg = <0 0xee0c0100 0 0x100>;
1847 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1848 clocks = <&cpg CPG_MOD 701>;
1849 phys = <&usb2_phy2>;
1850 phy-names = "usb";
1851 companion = <&ohci2>;
1852 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1853 resets = <&cpg 701>;
1854 status = "disabled";
1855 };
1857 ehci3: usb@ee0e0100 {
1858 compatible = "generic-ehci";
1859 reg = <0 0xee0e0100 0 0x100>;
1860 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1861 clocks = <&cpg CPG_MOD 700>;
1862 phys = <&usb2_phy3>;
1863 phy-names = "usb";
1864 companion = <&ohci3>;
1865 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1866 resets = <&cpg 700>;
1867 status = "disabled";
1868 };
1870 ohci0: usb@ee080000 {
1871 compatible = "generic-ohci";
1872 reg = <0 0xee080000 0 0x100>;
1873 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1874 clocks = <&cpg CPG_MOD 703>;
1875 phys = <&usb2_phy0>;
1876 phy-names = "usb";
1877 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1878 resets = <&cpg 703>;
1879 status = "disabled";
1880 };
1882 ohci1: usb@ee0a0000 {
1883 compatible = "generic-ohci";
1884 reg = <0 0xee0a0000 0 0x100>;
1885 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1886 clocks = <&cpg CPG_MOD 702>;
1887 phys = <&usb2_phy1>;
1888 phy-names = "usb";
1889 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1890 resets = <&cpg 702>;
1891 status = "disabled";
1892 };
1894 ohci2: usb@ee0c0000 {
1895 compatible = "generic-ohci";
1896 reg = <0 0xee0c0000 0 0x100>;
1897 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1898 clocks = <&cpg CPG_MOD 701>;
1899 phys = <&usb2_phy2>;
1900 phy-names = "usb";
1901 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1902 resets = <&cpg 701>;
1903 status = "disabled";
1904 };
1906 ohci3: usb@ee0e0000 {
1907 compatible = "generic-ohci";
1908 reg = <0 0xee0e0000 0 0x100>;
1909 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1910 clocks = <&cpg CPG_MOD 700>;
1911 phys = <&usb2_phy3>;
1912 phy-names = "usb";
1913 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1914 resets = <&cpg 700>;
1915 status = "disabled";
1916 };
1918 hsusb: usb@e6590000 {
1919 compatible = "renesas,usbhs-r8a7795",
1920 "renesas,rcar-gen3-usbhs";
1921 reg = <0 0xe6590000 0 0x100>;
1922 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1923 clocks = <&cpg CPG_MOD 704>;
1924 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1925 <&usb_dmac1 0>, <&usb_dmac1 1>;
1926 dma-names = "ch0", "ch1", "ch2", "ch3";
1927 renesas,buswait = <11>;
1928 phys = <&usb2_phy0>;
1929 phy-names = "usb";
1930 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1931 resets = <&cpg 704>;
1932 status = "disabled";
1933 };
1935 hsusb3: usb@e659c000 {
1936 compatible = "renesas,usbhs-r8a7795",
1937 "renesas,rcar-gen3-usbhs";
1938 reg = <0 0xe659c000 0 0x100>;
1939 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1940 clocks = <&cpg CPG_MOD 705>;
1941 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
1942 <&usb_dmac3 0>, <&usb_dmac3 1>;
1943 dma-names = "ch0", "ch1", "ch2", "ch3";
1944 renesas,buswait = <11>;
1945 phys = <&usb2_phy3>;
1946 phy-names = "usb";
1947 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1948 resets = <&cpg 705>;
1949 status = "disabled";
1950 };
1952 pciec0: pcie@fe000000 {
1953 compatible = "renesas,pcie-r8a7795",
1954 "renesas,pcie-rcar-gen3";
1955 reg = <0 0xfe000000 0 0x80000>;
1956 #address-cells = <3>;
1957 #size-cells = <2>;
1958 bus-range = <0x00 0xff>;
1959 device_type = "pci";
1960 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1961 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1962 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1963 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1964 /* Map all possible DDR as inbound ranges */
1965 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1966 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1967 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1968 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1969 #interrupt-cells = <1>;
1970 interrupt-map-mask = <0 0 0 0>;
1971 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1972 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1973 clock-names = "pcie", "pcie_bus";
1974 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1975 resets = <&cpg 319>;
1976 status = "disabled";
1977 };
1979 pciec1: pcie@ee800000 {
1980 compatible = "renesas,pcie-r8a7795",
1981 "renesas,pcie-rcar-gen3";
1982 reg = <0 0xee800000 0 0x80000>;
1983 #address-cells = <3>;
1984 #size-cells = <2>;
1985 bus-range = <0x00 0xff>;
1986 device_type = "pci";
1987 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1988 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1989 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1990 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1991 /* Map all possible DDR as inbound ranges */
1992 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1993 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1994 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1995 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1996 #interrupt-cells = <1>;
1997 interrupt-map-mask = <0 0 0 0>;
1998 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1999 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2000 clock-names = "pcie", "pcie_bus";
2001 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2002 resets = <&cpg 318>;
2003 status = "disabled";
2004 };
2006 imr-lx4@fe860000 {
2007 compatible = "renesas,r8a7795-imr-lx4",
2008 "renesas,imr-lx4";
2009 reg = <0 0xfe860000 0 0x2000>;
2010 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2011 clocks = <&cpg CPG_MOD 823>;
2012 power-domains = <&sysc R8A7795_PD_A3VC>;
2013 resets = <&cpg 823>;
2014 };
2016 imr-lx4@fe870000 {
2017 compatible = "renesas,r8a7795-imr-lx4",
2018 "renesas,imr-lx4";
2019 reg = <0 0xfe870000 0 0x2000>;
2020 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2021 clocks = <&cpg CPG_MOD 822>;
2022 power-domains = <&sysc R8A7795_PD_A3VC>;
2023 resets = <&cpg 822>;
2024 };
2026 imr-lx4@fe880000 {
2027 compatible = "renesas,r8a7795-imr-lx4",
2028 "renesas,imr-lx4";
2029 reg = <0 0xfe880000 0 0x2000>;
2030 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2031 clocks = <&cpg CPG_MOD 821>;
2032 power-domains = <&sysc R8A7795_PD_A3VC>;
2033 resets = <&cpg 821>;
2034 };
2036 imr-lx4@fe890000 {
2037 compatible = "renesas,r8a7795-imr-lx4",
2038 "renesas,imr-lx4";
2039 reg = <0 0xfe890000 0 0x2000>;
2040 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2041 clocks = <&cpg CPG_MOD 820>;
2042 power-domains = <&sysc R8A7795_PD_A3VC>;
2043 resets = <&cpg 820>;
2044 };
2046 vspbc: vsp@fe920000 {
2047 compatible = "renesas,vsp2";
2048 reg = <0 0xfe920000 0 0x8000>;
2049 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2050 clocks = <&cpg CPG_MOD 624>;
2051 power-domains = <&sysc R8A7795_PD_A3VP>;
2052 resets = <&cpg 624>;
2054 renesas,fcp = <&fcpvb1>;
2055 };
2057 fcpvb1: fcp@fe92f000 {
2058 compatible = "renesas,fcpv";
2059 reg = <0 0xfe92f000 0 0x200>;
2060 clocks = <&cpg CPG_MOD 606>;
2061 power-domains = <&sysc R8A7795_PD_A3VP>;
2062 resets = <&cpg 606>;
2063 iommus = <&ipmmu_vp1 7>;
2064 };
2066 fcpf0: fcp@fe950000 {
2067 compatible = "renesas,fcpf";
2068 reg = <0 0xfe950000 0 0x200>;
2069 clocks = <&cpg CPG_MOD 615>;
2070 power-domains = <&sysc R8A7795_PD_A3VP>;
2071 resets = <&cpg 615>;
2072 iommus = <&ipmmu_vp0 0>;
2073 };
2075 fcpf1: fcp@fe951000 {
2076 compatible = "renesas,fcpf";
2077 reg = <0 0xfe951000 0 0x200>;
2078 clocks = <&cpg CPG_MOD 614>;
2079 power-domains = <&sysc R8A7795_PD_A3VP>;
2080 resets = <&cpg 614>;
2081 iommus = <&ipmmu_vp1 1>;
2082 };
2084 vspbd: vsp@fe960000 {
2085 compatible = "renesas,vsp2";
2086 reg = <0 0xfe960000 0 0x8000>;
2087 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2088 clocks = <&cpg CPG_MOD 626>;
2089 power-domains = <&sysc R8A7795_PD_A3VP>;
2090 resets = <&cpg 626>;
2092 renesas,fcp = <&fcpvb0>;
2093 };
2095 fcpvb0: fcp@fe96f000 {
2096 compatible = "renesas,fcpv";
2097 reg = <0 0xfe96f000 0 0x200>;
2098 clocks = <&cpg CPG_MOD 607>;
2099 power-domains = <&sysc R8A7795_PD_A3VP>;
2100 resets = <&cpg 607>;
2101 iommus = <&ipmmu_vp0 5>;
2102 };
2104 vspi0: vsp@fe9a0000 {
2105 compatible = "renesas,vsp2";
2106 reg = <0 0xfe9a0000 0 0x8000>;
2107 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2108 clocks = <&cpg CPG_MOD 631>;
2109 power-domains = <&sysc R8A7795_PD_A3VP>;
2110 resets = <&cpg 631>;
2112 renesas,fcp = <&fcpvi0>;
2113 };
2115 fcpvi0: fcp@fe9af000 {
2116 compatible = "renesas,fcpv";
2117 reg = <0 0xfe9af000 0 0x200>;
2118 clocks = <&cpg CPG_MOD 611>;
2119 power-domains = <&sysc R8A7795_PD_A3VP>;
2120 resets = <&cpg 611>;
2121 iommus = <&ipmmu_vp0 8>;
2122 };
2124 vspi1: vsp@fe9b0000 {
2125 compatible = "renesas,vsp2";
2126 reg = <0 0xfe9b0000 0 0x8000>;
2127 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2128 clocks = <&cpg CPG_MOD 630>;
2129 power-domains = <&sysc R8A7795_PD_A3VP>;
2130 resets = <&cpg 630>;
2132 renesas,fcp = <&fcpvi1>;
2133 };
2135 fcpvi1: fcp@fe9bf000 {
2136 compatible = "renesas,fcpv";
2137 reg = <0 0xfe9bf000 0 0x200>;
2138 clocks = <&cpg CPG_MOD 610>;
2139 power-domains = <&sysc R8A7795_PD_A3VP>;
2140 resets = <&cpg 610>;
2141 iommus = <&ipmmu_vp1 9>;
2142 };
2144 vspd0: vsp@fea20000 {
2145 compatible = "renesas,vsp2";
2146 reg = <0 0xfea20000 0 0x4000>;
2147 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2148 clocks = <&cpg CPG_MOD 623>;
2149 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2150 resets = <&cpg 623>;
2152 renesas,fcp = <&fcpvd0>;
2153 };
2155 fcpvd0: fcp@fea27000 {
2156 compatible = "renesas,fcpv";
2157 reg = <0 0xfea27000 0 0x200>;
2158 clocks = <&cpg CPG_MOD 603>;
2159 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2160 resets = <&cpg 603>;
2161 iommus = <&ipmmu_vi0 8>;
2162 };
2164 vspd1: vsp@fea28000 {
2165 compatible = "renesas,vsp2";
2166 reg = <0 0xfea28000 0 0x4000>;
2167 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2168 clocks = <&cpg CPG_MOD 622>;
2169 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2170 resets = <&cpg 622>;
2172 renesas,fcp = <&fcpvd1>;
2173 };
2175 fcpvd1: fcp@fea2f000 {
2176 compatible = "renesas,fcpv";
2177 reg = <0 0xfea2f000 0 0x200>;
2178 clocks = <&cpg CPG_MOD 602>;
2179 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2180 resets = <&cpg 602>;
2181 iommus = <&ipmmu_vi0 9>;
2182 };
2184 vspd2: vsp@fea30000 {
2185 compatible = "renesas,vsp2";
2186 reg = <0 0xfea30000 0 0x4000>;
2187 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2188 clocks = <&cpg CPG_MOD 621>;
2189 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2190 resets = <&cpg 621>;
2192 renesas,fcp = <&fcpvd2>;
2193 };
2195 fcpvd2: fcp@fea37000 {
2196 compatible = "renesas,fcpv";
2197 reg = <0 0xfea37000 0 0x200>;
2198 clocks = <&cpg CPG_MOD 601>;
2199 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2200 resets = <&cpg 601>;
2201 iommus = <&ipmmu_vi1 10>;
2202 };
2204 fdp1@fe940000 {
2205 compatible = "renesas,fdp1";
2206 reg = <0 0xfe940000 0 0x2400>;
2207 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2208 clocks = <&cpg CPG_MOD 119>;
2209 power-domains = <&sysc R8A7795_PD_A3VP>;
2210 resets = <&cpg 119>;
2211 renesas,fcp = <&fcpf0>;
2212 };
2214 fdp1@fe944000 {
2215 compatible = "renesas,fdp1";
2216 reg = <0 0xfe944000 0 0x2400>;
2217 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2218 clocks = <&cpg CPG_MOD 118>;
2219 power-domains = <&sysc R8A7795_PD_A3VP>;
2220 resets = <&cpg 118>;
2221 renesas,fcp = <&fcpf1>;
2222 };
2224 hdmi0: hdmi@fead0000 {
2225 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2226 reg = <0 0xfead0000 0 0x10000>;
2227 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2228 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2229 clock-names = "iahb", "isfr";
2230 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2231 resets = <&cpg 729>;
2232 status = "disabled";
2234 ports {
2235 #address-cells = <1>;
2236 #size-cells = <0>;
2237 port@0 {
2238 reg = <0>;
2239 dw_hdmi0_in: endpoint {
2240 remote-endpoint = <&du_out_hdmi0>;
2241 };
2242 };
2243 port@1 {
2244 reg = <1>;
2245 };
2246 };
2247 };
2249 hdmi1: hdmi@feae0000 {
2250 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2251 reg = <0 0xfeae0000 0 0x10000>;
2252 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
2253 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2254 clock-names = "iahb", "isfr";
2255 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2256 resets = <&cpg 728>;
2257 status = "disabled";
2259 ports {
2260 #address-cells = <1>;
2261 #size-cells = <0>;
2262 port@0 {
2263 reg = <0>;
2264 dw_hdmi1_in: endpoint {
2265 remote-endpoint = <&du_out_hdmi1>;
2266 };
2267 };
2268 port@1 {
2269 reg = <1>;
2270 };
2271 };
2272 };
2274 du: display@feb00000 {
2275 compatible = "renesas,du-r8a7795";
2276 reg = <0 0xfeb00000 0 0x80000>,
2277 <0 0xfeb90000 0 0x14>;
2278 reg-names = "du", "lvds.0";
2279 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2280 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2281 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
2282 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2283 clocks = <&cpg CPG_MOD 724>,
2284 <&cpg CPG_MOD 723>,
2285 <&cpg CPG_MOD 722>,
2286 <&cpg CPG_MOD 721>,
2287 <&cpg CPG_MOD 727>;
2288 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
2289 vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
2290 status = "disabled";
2292 ports {
2293 #address-cells = <1>;
2294 #size-cells = <0>;
2296 port@0 {
2297 reg = <0>;
2298 du_out_rgb: endpoint {
2299 };
2300 };
2301 port@1 {
2302 reg = <1>;
2303 du_out_hdmi0: endpoint {
2304 remote-endpoint = <&dw_hdmi0_in>;
2305 };
2306 };
2307 port@2 {
2308 reg = <2>;
2309 du_out_hdmi1: endpoint {
2310 remote-endpoint = <&dw_hdmi1_in>;
2311 };
2312 };
2313 port@3 {
2314 reg = <3>;
2315 du_out_lvds0: endpoint {
2316 };
2317 };
2318 };
2319 };
2321 tsc: thermal@e6198000 {
2322 compatible = "renesas,r8a7795-thermal";
2323 reg = <0 0xe6198000 0 0x68>,
2324 <0 0xe61a0000 0 0x5c>,
2325 <0 0xe61a8000 0 0x5c>;
2326 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
2327 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
2328 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
2329 clocks = <&cpg CPG_MOD 522>;
2330 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2331 resets = <&cpg 522>;
2332 #thermal-sensor-cells = <1>;
2333 status = "okay";
2334 };
2335 };
2337 timer {
2338 compatible = "arm,armv8-timer";
2339 interrupts-extended = <&gic GIC_PPI 13
2340 (GIC_CPU_MASK_SIMPLE(8) |
2341 IRQ_TYPE_LEVEL_LOW)>,
2342 <&gic GIC_PPI 14
2343 (GIC_CPU_MASK_SIMPLE(8) |
2344 IRQ_TYPE_LEVEL_LOW)>,
2345 <&gic GIC_PPI 11
2346 (GIC_CPU_MASK_SIMPLE(8) |
2347 IRQ_TYPE_LEVEL_LOW)>,
2348 <&gic GIC_PPI 10
2349 (GIC_CPU_MASK_SIMPLE(8) |
2350 IRQ_TYPE_LEVEL_LOW)>;
2351 };
2353 thermal-zones {
2354 sensor_thermal1: sensor-thermal1 {
2355 polling-delay-passive = <250>;
2356 polling-delay = <1000>;
2357 thermal-sensors = <&tsc 0>;
2359 trips {
2360 sensor1_crit: sensor1-crit {
2361 temperature = <120000>;
2362 hysteresis = <2000>;
2363 type = "critical";
2364 };
2365 };
2366 };
2368 sensor_thermal2: sensor-thermal2 {
2369 polling-delay-passive = <250>;
2370 polling-delay = <1000>;
2371 thermal-sensors = <&tsc 1>;
2373 trips {
2374 sensor2_crit: sensor2-crit {
2375 temperature = <120000>;
2376 hysteresis = <2000>;
2377 type = "critical";
2378 };
2379 };
2380 };
2382 sensor_thermal3: sensor-thermal3 {
2383 polling-delay-passive = <250>;
2384 polling-delay = <1000>;
2385 thermal-sensors = <&tsc 2>;
2387 trips {
2388 sensor3_crit: sensor3-crit {
2389 temperature = <120000>;
2390 hysteresis = <2000>;
2391 type = "critical";
2392 };
2393 };
2394 };
2395 };
2397 /* External USB clocks - can be overridden by the board */
2398 usb3s0_clk: usb3s0 {
2399 compatible = "fixed-clock";
2400 #clock-cells = <0>;
2401 clock-frequency = <0>;
2402 };
2404 usb_extal_clk: usb_extal {
2405 compatible = "fixed-clock";
2406 #clock-cells = <0>;
2407 clock-frequency = <0>;
2408 };
2409 };