2 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/pwm/pwm.h>
44 #include "rk3399.dtsi"
45 #include "rk3399-opp.dtsi"
49 compatible = "gpio-leds";
50 pinctrl-names = "default";
51 pinctrl-0 = <&led_pin_module>;
55 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
56 linux,default-trigger = "heartbeat";
62 * Overwrite the opp-table for CPUB as this board uses a different
63 * regulator (FAN53555) that only allows 10mV steps and therefore
64 * can't reach the operation point target voltages from rk3399-opp.dtsi
66 /delete-node/ opp-table1;
67 cluster1_opp: opp-table1 {
68 compatible = "operating-points-v2";
72 opp-hz = /bits/ 64 <408000000>;
73 opp-microvolt = <800000>;
74 clock-latency-ns = <40000>;
77 opp-hz = /bits/ 64 <600000000>;
78 opp-microvolt = <800000>;
81 opp-hz = /bits/ 64 <816000000>;
82 opp-microvolt = <830000>;
86 opp-hz = /bits/ 64 <1008000000>;
87 opp-microvolt = <880000>;
90 opp-hz = /bits/ 64 <1200000000>;
91 opp-microvolt = <950000>;
94 opp-hz = /bits/ 64 <1416000000>;
95 opp-microvolt = <1030000>;
98 opp-hz = /bits/ 64 <1608000000>;
99 opp-microvolt = <1100000>;
102 opp-hz = /bits/ 64 <1800000000>;
103 opp-microvolt = <1200000>;
106 opp-hz = /bits/ 64 <1992000000>;
107 opp-microvolt = <1230000>;
112 clkin_gmac: external-gmac-clock {
113 compatible = "fixed-clock";
114 clock-frequency = <125000000>;
115 clock-output-names = "clkin_gmac";
119 vcc1v2_phy: vcc1v2-phy {
120 compatible = "regulator-fixed";
121 regulator-name = "vcc1v2_phy";
124 regulator-min-microvolt = <1200000>;
125 regulator-max-microvolt = <1200000>;
126 vin-supply = <&vcc5v0_sys>;
129 vcc3v3_sys: vcc3v3-sys {
130 compatible = "regulator-fixed";
131 regulator-name = "vcc3v3_sys";
134 regulator-min-microvolt = <3300000>;
135 regulator-max-microvolt = <3300000>;
136 vin-supply = <&vcc5v0_sys>;
139 vcc5v0_host: vcc5v0-host-regulator {
140 compatible = "regulator-fixed";
141 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
143 pinctrl-names = "default";
144 pinctrl-0 = <&vcc5v0_host_en>;
145 regulator-name = "vcc5v0_host";
147 vin-supply = <&vcc5v0_sys>;
150 vcc5v0_sys: vcc5v0-sys {
151 compatible = "regulator-fixed";
152 regulator-name = "vcc5v0_sys";
155 regulator-min-microvolt = <5000000>;
156 regulator-max-microvolt = <5000000>;
161 cpu-supply = <&vdd_cpu_b>;
165 cpu-supply = <&vdd_cpu_b>;
169 cpu-supply = <&vdd_cpu_l>;
173 cpu-supply = <&vdd_cpu_l>;
177 cpu-supply = <&vdd_cpu_l>;
181 cpu-supply = <&vdd_cpu_l>;
189 assigned-clocks = <&cru SCLK_RMII_SRC>;
190 assigned-clock-parents = <&clkin_gmac>;
191 clock_in_out = "input";
192 phy-supply = <&vcc1v2_phy>;
194 pinctrl-names = "default";
195 pinctrl-0 = <&rgmii_pins>;
196 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
197 snps,reset-active-low;
198 snps,reset-delays-us = <0 10000 50000>;
206 i2c-scl-rising-time-ns = <168>;
207 i2c-scl-falling-time-ns = <4>;
208 clock-frequency = <400000>;
211 compatible = "rockchip,rk808";
213 interrupt-parent = <&gpio1>;
214 interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
216 clock-output-names = "xin32k", "rk808-clkout2";
217 pinctrl-names = "default";
218 pinctrl-0 = <&pmic_int_l>;
219 rockchip,system-power-controller;
222 vcc1-supply = <&vcc5v0_sys>;
223 vcc2-supply = <&vcc5v0_sys>;
224 vcc3-supply = <&vcc5v0_sys>;
225 vcc4-supply = <&vcc5v0_sys>;
226 vcc6-supply = <&vcc5v0_sys>;
227 vcc7-supply = <&vcc5v0_sys>;
228 vcc8-supply = <&vcc3v3_sys>;
229 vcc9-supply = <&vcc5v0_sys>;
230 vcc10-supply = <&vcc5v0_sys>;
231 vcc11-supply = <&vcc5v0_sys>;
232 vcc12-supply = <&vcc3v3_sys>;
233 vddio-supply = <&vcc1v8_pmu>;
236 vdd_center: DCDC_REG1 {
237 regulator-name = "vdd_center";
238 regulator-min-microvolt = <750000>;
239 regulator-max-microvolt = <1350000>;
240 regulator-ramp-delay = <6001>;
243 regulator-state-mem {
244 regulator-off-in-suspend;
248 vdd_cpu_l: DCDC_REG2 {
249 regulator-name = "vdd_cpu_l";
250 regulator-min-microvolt = <750000>;
251 regulator-max-microvolt = <1350000>;
252 regulator-ramp-delay = <6001>;
255 regulator-state-mem {
256 regulator-off-in-suspend;
261 regulator-name = "vcc_ddr";
264 regulator-state-mem {
265 regulator-on-in-suspend;
270 regulator-name = "vcc_1v8";
271 regulator-min-microvolt = <1800000>;
272 regulator-max-microvolt = <1800000>;
275 regulator-state-mem {
276 regulator-on-in-suspend;
277 regulator-suspend-microvolt = <1800000>;
282 regulator-name = "vcc_ldo1";
283 regulator-min-microvolt = <1800000>;
284 regulator-max-microvolt = <1800000>;
286 regulator-state-mem {
287 regulator-off-in-suspend;
291 vcc1v8_hdmi: LDO_REG2 {
292 regulator-name = "vcc1v8_hdmi";
293 regulator-min-microvolt = <1800000>;
294 regulator-max-microvolt = <1800000>;
297 regulator-state-mem {
298 regulator-off-in-suspend;
302 vcc1v8_pmu: LDO_REG3 {
303 regulator-name = "vcc1v8_pmu";
304 regulator-min-microvolt = <1800000>;
305 regulator-max-microvolt = <1800000>;
308 regulator-state-mem {
309 regulator-on-in-suspend;
310 regulator-suspend-microvolt = <1800000>;
315 regulator-name = "vcc_sd";
316 regulator-min-microvolt = <1800000>;
317 regulator-max-microvolt = <3000000>;
320 regulator-state-mem {
321 regulator-on-in-suspend;
322 regulator-suspend-microvolt = <3000000>;
327 regulator-name = "vcc_ldo5";
328 regulator-min-microvolt = <3000000>;
329 regulator-max-microvolt = <3000000>;
331 regulator-state-mem {
332 regulator-off-in-suspend;
337 regulator-name = "vcc_ldo6";
338 regulator-min-microvolt = <1500000>;
339 regulator-max-microvolt = <1500000>;
341 regulator-state-mem {
342 regulator-off-in-suspend;
346 vcc0v9_hdmi: LDO_REG7 {
347 regulator-name = "vcc0v9_hdmi";
348 regulator-min-microvolt = <900000>;
349 regulator-max-microvolt = <900000>;
352 regulator-state-mem {
353 regulator-off-in-suspend;
357 vcc_efuse: LDO_REG8 {
358 regulator-name = "vcc_efuse";
359 regulator-min-microvolt = <1800000>;
360 regulator-max-microvolt = <1800000>;
363 regulator-state-mem {
364 regulator-off-in-suspend;
368 vcc3v3_s3: SWITCH_REG1 {
369 regulator-name = "vcc3v3_s3";
372 regulator-state-mem {
373 regulator-off-in-suspend;
377 vcc3v3_s0: SWITCH_REG2 {
378 regulator-name = "vcc3v3_s0";
381 regulator-state-mem {
382 regulator-off-in-suspend;
388 vdd_gpu: regulator@60 {
389 compatible = "fcs,fan53555";
391 fcs,suspend-voltage-selector = <1>;
392 regulator-name = "vdd_gpu";
393 regulator-min-microvolt = <600000>;
394 regulator-max-microvolt = <1230000>;
395 regulator-ramp-delay = <1000>;
398 vin-supply = <&vcc5v0_sys>;
404 clock-frequency = <400000>;
407 compatible = "ti,amc6821";
409 cooling-min-state = <0>;
410 cooling-max-state = <9>;
411 #cooling-cells = <2>;
415 compatible = "isil,isl1208";
422 clock-frequency = <400000>;
424 vdd_cpu_b: regulator@60 {
425 compatible = "fcs,fan53555";
427 vin-supply = <&vcc5v0_sys>;
428 regulator-name = "vdd_cpu_b";
429 regulator-min-microvolt = <600000>;
430 regulator-max-microvolt = <1230000>;
431 regulator-ramp-delay = <1000>;
432 fcs,suspend-voltage-selector = <1>;
440 bt656-supply = <&vcc_1v8>;
441 audio-supply = <&vcc_1v8>;
442 sdmmc-supply = <&vcc_sd>;
443 gpio1830-supply = <&vcc_1v8>;
448 pmu1830-supply = <&vcc_1v8>;
457 i2c8_xfer_a: i2c8-xfer {
459 <RK_GPIO1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>,
460 <RK_GPIO1 RK_PC5 RK_FUNC_1 &pcfg_pull_up>;
465 led_pin_module: led-module-gpio {
467 <RK_GPIO2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
472 pmic_int_l: pmic-int-l {
474 <RK_GPIO1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
479 vcc5v0_host_en: vcc5v0-host-en {
481 <RK_GPIO4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
489 mmc-hs400-enhanced-strobe;
502 compatible = "jedec,spi-nor";
504 spi-max-frequency = <50000000>;
511 u2phy1_otg: otg-port {
515 u2phy1_host: host-port {
516 phy-supply = <&vcc5v0_host>;