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x86/oprofile: Fix bogus GCC-8 warning in nmi_setup()
[cris-mirror.git] / arch / arm64 / net / bpf_jit_comp.c
blob1d4f1da7c58f8d51371947523e91649915e4320d
1 /*
2 * BPF JIT compiler for ARM64
3 *
4 * Copyright (C) 2014-2016 Zi Shen Lim <zlim.lnx@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19 #define pr_fmt(fmt) "bpf_jit: " fmt
20
21 #include <linux/bpf.h>
22 #include <linux/filter.h>
23 #include <linux/printk.h>
24 #include <linux/skbuff.h>
25 #include <linux/slab.h>
26
27 #include <asm/byteorder.h>
28 #include <asm/cacheflush.h>
29 #include <asm/debug-monitors.h>
30 #include <asm/set_memory.h>
31
32 #include "bpf_jit.h"
33
34 #define TMP_REG_1 (MAX_BPF_JIT_REG + 0)
35 #define TMP_REG_2 (MAX_BPF_JIT_REG + 1)
36 #define TCALL_CNT (MAX_BPF_JIT_REG + 2)
37 #define TMP_REG_3 (MAX_BPF_JIT_REG + 3)
38
39 /* Map BPF registers to A64 registers */
40 static const int bpf2a64[] = {
41 /* return value from in-kernel function, and exit value from eBPF */
42 [BPF_REG_0] = A64_R(7),
43 /* arguments from eBPF program to in-kernel function */
44 [BPF_REG_1] = A64_R(0),
45 [BPF_REG_2] = A64_R(1),
46 [BPF_REG_3] = A64_R(2),
47 [BPF_REG_4] = A64_R(3),
48 [BPF_REG_5] = A64_R(4),
49 /* callee saved registers that in-kernel function will preserve */
50 [BPF_REG_6] = A64_R(19),
51 [BPF_REG_7] = A64_R(20),
52 [BPF_REG_8] = A64_R(21),
53 [BPF_REG_9] = A64_R(22),
54 /* read-only frame pointer to access stack */
55 [BPF_REG_FP] = A64_R(25),
56 /* temporary registers for internal BPF JIT */
57 [TMP_REG_1] = A64_R(10),
58 [TMP_REG_2] = A64_R(11),
59 [TMP_REG_3] = A64_R(12),
60 /* tail_call_cnt */
61 [TCALL_CNT] = A64_R(26),
62 /* temporary register for blinding constants */
63 [BPF_REG_AX] = A64_R(9),
64 };
65
66 struct jit_ctx {
67 const struct bpf_prog *prog;
68 int idx;
69 int epilogue_offset;
70 int *offset;
71 __le32 *image;
72 u32 stack_size;
73 };
74
75 static inline void emit(const u32 insn, struct jit_ctx *ctx)
76 {
77 if (ctx->image != NULL)
78 ctx->image[ctx->idx] = cpu_to_le32(insn);
79
80 ctx->idx++;
81 }
82
83 static inline void emit_a64_mov_i64(const int reg, const u64 val,
84 struct jit_ctx *ctx)
85 {
86 u64 tmp = val;
87 int shift = 0;
88
89 emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx);
90 tmp >>= 16;
91 shift += 16;
92 while (tmp) {
93 if (tmp & 0xffff)
94 emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);
95 tmp >>= 16;
96 shift += 16;
97 }
98 }
99
100 static inline void emit_addr_mov_i64(const int reg, const u64 val,
101 struct jit_ctx *ctx)
102 {
103 u64 tmp = val;
104 int shift = 0;
105
106 emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx);
107 for (;shift < 48;) {
108 tmp >>= 16;
109 shift += 16;
110 emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);
111 }
112 }
113
114 static inline void emit_a64_mov_i(const int is64, const int reg,
115 const s32 val, struct jit_ctx *ctx)
116 {
117 u16 hi = val >> 16;
118 u16 lo = val & 0xffff;
119
120 if (hi & 0x8000) {
121 if (hi == 0xffff) {
122 emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx);
123 } else {
124 emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx);
125 emit(A64_MOVK(is64, reg, lo, 0), ctx);
126 }
127 } else {
128 emit(A64_MOVZ(is64, reg, lo, 0), ctx);
129 if (hi)
130 emit(A64_MOVK(is64, reg, hi, 16), ctx);
131 }
132 }
133
134 static inline int bpf2a64_offset(int bpf_to, int bpf_from,
135 const struct jit_ctx *ctx)
136 {
137 int to = ctx->offset[bpf_to];
138 /* -1 to account for the Branch instruction */
139 int from = ctx->offset[bpf_from] - 1;
140
141 return to - from;
142 }
143
144 static void jit_fill_hole(void *area, unsigned int size)
145 {
146 __le32 *ptr;
147 /* We are guaranteed to have aligned memory. */
148 for (ptr = area; size >= sizeof(u32); size -= sizeof(u32))
149 *ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT);
150 }
151
152 static inline int epilogue_offset(const struct jit_ctx *ctx)
153 {
154 int to = ctx->epilogue_offset;
155 int from = ctx->idx;
156
157 return to - from;
158 }
159
160 /* Stack must be multiples of 16B */
161 #define STACK_ALIGN(sz) (((sz) + 15) & ~15)
162
163 /* Tail call offset to jump into */
164 #define PROLOGUE_OFFSET 7
165
166 static int build_prologue(struct jit_ctx *ctx)
167 {
168 const struct bpf_prog *prog = ctx->prog;
169 const u8 r6 = bpf2a64[BPF_REG_6];
170 const u8 r7 = bpf2a64[BPF_REG_7];
171 const u8 r8 = bpf2a64[BPF_REG_8];
172 const u8 r9 = bpf2a64[BPF_REG_9];
173 const u8 fp = bpf2a64[BPF_REG_FP];
174 const u8 tcc = bpf2a64[TCALL_CNT];
175 const int idx0 = ctx->idx;
176 int cur_offset;
177
178 /*
179 * BPF prog stack layout
180 *
181 * high
182 * original A64_SP => 0:+-----+ BPF prologue
183 * |FP/LR|
184 * current A64_FP => -16:+-----+
185 * | ... | callee saved registers
186 * BPF fp register => -64:+-----+ <= (BPF_FP)
187 * | |
188 * | ... | BPF prog stack
189 * | |
190 * +-----+ <= (BPF_FP - prog->aux->stack_depth)
191 * |RSVD | JIT scratchpad
192 * current A64_SP => +-----+ <= (BPF_FP - ctx->stack_size)
193 * | |
194 * | ... | Function call stack
195 * | |
196 * +-----+
197 * low
198 *
199 */
200
201 /* Save FP and LR registers to stay align with ARM64 AAPCS */
202 emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
203 emit(A64_MOV(1, A64_FP, A64_SP), ctx);
204
205 /* Save callee-saved registers */
206 emit(A64_PUSH(r6, r7, A64_SP), ctx);
207 emit(A64_PUSH(r8, r9, A64_SP), ctx);
208 emit(A64_PUSH(fp, tcc, A64_SP), ctx);
209
210 /* Set up BPF prog stack base register */
211 emit(A64_MOV(1, fp, A64_SP), ctx);
212
213 /* Initialize tail_call_cnt */
214 emit(A64_MOVZ(1, tcc, 0, 0), ctx);
215
216 cur_offset = ctx->idx - idx0;
217 if (cur_offset != PROLOGUE_OFFSET) {
218 pr_err_once("PROLOGUE_OFFSET = %d, expected %d!\n",
219 cur_offset, PROLOGUE_OFFSET);
220 return -1;
221 }
222
223 /* 4 byte extra for skb_copy_bits buffer */
224 ctx->stack_size = prog->aux->stack_depth + 4;
225 ctx->stack_size = STACK_ALIGN(ctx->stack_size);
226
227 /* Set up function call stack */
228 emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
229 return 0;
230 }
231
232 static int out_offset = -1; /* initialized on the first pass of build_body() */
233 static int emit_bpf_tail_call(struct jit_ctx *ctx)
234 {
235 /* bpf_tail_call(void *prog_ctx, struct bpf_array *array, u64 index) */
236 const u8 r2 = bpf2a64[BPF_REG_2];
237 const u8 r3 = bpf2a64[BPF_REG_3];
238
239 const u8 tmp = bpf2a64[TMP_REG_1];
240 const u8 prg = bpf2a64[TMP_REG_2];
241 const u8 tcc = bpf2a64[TCALL_CNT];
242 const int idx0 = ctx->idx;
243 #define cur_offset (ctx->idx - idx0)
244 #define jmp_offset (out_offset - (cur_offset))
245 size_t off;
246
247 /* if (index >= array->map.max_entries)
248 * goto out;
249 */
250 off = offsetof(struct bpf_array, map.max_entries);
251 emit_a64_mov_i64(tmp, off, ctx);
252 emit(A64_LDR32(tmp, r2, tmp), ctx);
253 emit(A64_CMP(0, r3, tmp), ctx);
254 emit(A64_B_(A64_COND_GE, jmp_offset), ctx);
255
256 /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
257 * goto out;
258 * tail_call_cnt++;
259 */
260 emit_a64_mov_i64(tmp, MAX_TAIL_CALL_CNT, ctx);
261 emit(A64_CMP(1, tcc, tmp), ctx);
262 emit(A64_B_(A64_COND_GT, jmp_offset), ctx);
263 emit(A64_ADD_I(1, tcc, tcc, 1), ctx);
264
265 /* prog = array->ptrs[index];
266 * if (prog == NULL)
267 * goto out;
268 */
269 off = offsetof(struct bpf_array, ptrs);
270 emit_a64_mov_i64(tmp, off, ctx);
271 emit(A64_ADD(1, tmp, r2, tmp), ctx);
272 emit(A64_LSL(1, prg, r3, 3), ctx);
273 emit(A64_LDR64(prg, tmp, prg), ctx);
274 emit(A64_CBZ(1, prg, jmp_offset), ctx);
275
276 /* goto *(prog->bpf_func + prologue_offset); */
277 off = offsetof(struct bpf_prog, bpf_func);
278 emit_a64_mov_i64(tmp, off, ctx);
279 emit(A64_LDR64(tmp, prg, tmp), ctx);
280 emit(A64_ADD_I(1, tmp, tmp, sizeof(u32) * PROLOGUE_OFFSET), ctx);
281 emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
282 emit(A64_BR(tmp), ctx);
283
284 /* out: */
285 if (out_offset == -1)
286 out_offset = cur_offset;
287 if (cur_offset != out_offset) {
288 pr_err_once("tail_call out_offset = %d, expected %d!\n",
289 cur_offset, out_offset);
290 return -1;
291 }
292 return 0;
293 #undef cur_offset
294 #undef jmp_offset
295 }
296
297 static void build_epilogue(struct jit_ctx *ctx)
298 {
299 const u8 r0 = bpf2a64[BPF_REG_0];
300 const u8 r6 = bpf2a64[BPF_REG_6];
301 const u8 r7 = bpf2a64[BPF_REG_7];
302 const u8 r8 = bpf2a64[BPF_REG_8];
303 const u8 r9 = bpf2a64[BPF_REG_9];
304 const u8 fp = bpf2a64[BPF_REG_FP];
305
306 /* We're done with BPF stack */
307 emit(A64_ADD_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
308
309 /* Restore fs (x25) and x26 */
310 emit(A64_POP(fp, A64_R(26), A64_SP), ctx);
311
312 /* Restore callee-saved register */
313 emit(A64_POP(r8, r9, A64_SP), ctx);
314 emit(A64_POP(r6, r7, A64_SP), ctx);
315
316 /* Restore FP/LR registers */
317 emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
318
319 /* Set return value */
320 emit(A64_MOV(1, A64_R(0), r0), ctx);
321
322 emit(A64_RET(A64_LR), ctx);
323 }
324
325 /* JITs an eBPF instruction.
326 * Returns:
327 * 0 - successfully JITed an 8-byte eBPF instruction.
328 * >0 - successfully JITed a 16-byte eBPF instruction.
329 * <0 - failed to JIT.
330 */
331 static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
332 {
333 const u8 code = insn->code;
334 const u8 dst = bpf2a64[insn->dst_reg];
335 const u8 src = bpf2a64[insn->src_reg];
336 const u8 tmp = bpf2a64[TMP_REG_1];
337 const u8 tmp2 = bpf2a64[TMP_REG_2];
338 const u8 tmp3 = bpf2a64[TMP_REG_3];
339 const s16 off = insn->off;
340 const s32 imm = insn->imm;
341 const int i = insn - ctx->prog->insnsi;
342 const bool is64 = BPF_CLASS(code) == BPF_ALU64;
343 const bool isdw = BPF_SIZE(code) == BPF_DW;
344 u8 jmp_cond;
345 s32 jmp_offset;
346
347 #define check_imm(bits, imm) do { \
348 if ((((imm) > 0) && ((imm) >> (bits))) || \
349 (((imm) < 0) && (~(imm) >> (bits)))) { \
350 pr_info("[%2d] imm=%d(0x%x) out of range\n", \
351 i, imm, imm); \
352 return -EINVAL; \
353 } \
354 } while (0)
355 #define check_imm19(imm) check_imm(19, imm)
356 #define check_imm26(imm) check_imm(26, imm)
357
358 switch (code) {
359 /* dst = src */
360 case BPF_ALU | BPF_MOV | BPF_X:
361 case BPF_ALU64 | BPF_MOV | BPF_X:
362 emit(A64_MOV(is64, dst, src), ctx);
363 break;
364 /* dst = dst OP src */
365 case BPF_ALU | BPF_ADD | BPF_X:
366 case BPF_ALU64 | BPF_ADD | BPF_X:
367 emit(A64_ADD(is64, dst, dst, src), ctx);
368 break;
369 case BPF_ALU | BPF_SUB | BPF_X:
370 case BPF_ALU64 | BPF_SUB | BPF_X:
371 emit(A64_SUB(is64, dst, dst, src), ctx);
372 break;
373 case BPF_ALU | BPF_AND | BPF_X:
374 case BPF_ALU64 | BPF_AND | BPF_X:
375 emit(A64_AND(is64, dst, dst, src), ctx);
376 break;
377 case BPF_ALU | BPF_OR | BPF_X:
378 case BPF_ALU64 | BPF_OR | BPF_X:
379 emit(A64_ORR(is64, dst, dst, src), ctx);
380 break;
381 case BPF_ALU | BPF_XOR | BPF_X:
382 case BPF_ALU64 | BPF_XOR | BPF_X:
383 emit(A64_EOR(is64, dst, dst, src), ctx);
384 break;
385 case BPF_ALU | BPF_MUL | BPF_X:
386 case BPF_ALU64 | BPF_MUL | BPF_X:
387 emit(A64_MUL(is64, dst, dst, src), ctx);
388 break;
389 case BPF_ALU | BPF_DIV | BPF_X:
390 case BPF_ALU64 | BPF_DIV | BPF_X:
391 case BPF_ALU | BPF_MOD | BPF_X:
392 case BPF_ALU64 | BPF_MOD | BPF_X:
393 switch (BPF_OP(code)) {
394 case BPF_DIV:
395 emit(A64_UDIV(is64, dst, dst, src), ctx);
396 break;
397 case BPF_MOD:
398 emit(A64_UDIV(is64, tmp, dst, src), ctx);
399 emit(A64_MUL(is64, tmp, tmp, src), ctx);
400 emit(A64_SUB(is64, dst, dst, tmp), ctx);
401 break;
402 }
403 break;
404 case BPF_ALU | BPF_LSH | BPF_X:
405 case BPF_ALU64 | BPF_LSH | BPF_X:
406 emit(A64_LSLV(is64, dst, dst, src), ctx);
407 break;
408 case BPF_ALU | BPF_RSH | BPF_X:
409 case BPF_ALU64 | BPF_RSH | BPF_X:
410 emit(A64_LSRV(is64, dst, dst, src), ctx);
411 break;
412 case BPF_ALU | BPF_ARSH | BPF_X:
413 case BPF_ALU64 | BPF_ARSH | BPF_X:
414 emit(A64_ASRV(is64, dst, dst, src), ctx);
415 break;
416 /* dst = -dst */
417 case BPF_ALU | BPF_NEG:
418 case BPF_ALU64 | BPF_NEG:
419 emit(A64_NEG(is64, dst, dst), ctx);
420 break;
421 /* dst = BSWAP##imm(dst) */
422 case BPF_ALU | BPF_END | BPF_FROM_LE:
423 case BPF_ALU | BPF_END | BPF_FROM_BE:
424 #ifdef CONFIG_CPU_BIG_ENDIAN
425 if (BPF_SRC(code) == BPF_FROM_BE)
426 goto emit_bswap_uxt;
427 #else /* !CONFIG_CPU_BIG_ENDIAN */
428 if (BPF_SRC(code) == BPF_FROM_LE)
429 goto emit_bswap_uxt;
430 #endif
431 switch (imm) {
432 case 16:
433 emit(A64_REV16(is64, dst, dst), ctx);
434 /* zero-extend 16 bits into 64 bits */
435 emit(A64_UXTH(is64, dst, dst), ctx);
436 break;
437 case 32:
438 emit(A64_REV32(is64, dst, dst), ctx);
439 /* upper 32 bits already cleared */
440 break;
441 case 64:
442 emit(A64_REV64(dst, dst), ctx);
443 break;
444 }
445 break;
446 emit_bswap_uxt:
447 switch (imm) {
448 case 16:
449 /* zero-extend 16 bits into 64 bits */
450 emit(A64_UXTH(is64, dst, dst), ctx);
451 break;
452 case 32:
453 /* zero-extend 32 bits into 64 bits */
454 emit(A64_UXTW(is64, dst, dst), ctx);
455 break;
456 case 64:
457 /* nop */
458 break;
459 }
460 break;
461 /* dst = imm */
462 case BPF_ALU | BPF_MOV | BPF_K:
463 case BPF_ALU64 | BPF_MOV | BPF_K:
464 emit_a64_mov_i(is64, dst, imm, ctx);
465 break;
466 /* dst = dst OP imm */
467 case BPF_ALU | BPF_ADD | BPF_K:
468 case BPF_ALU64 | BPF_ADD | BPF_K:
469 emit_a64_mov_i(is64, tmp, imm, ctx);
470 emit(A64_ADD(is64, dst, dst, tmp), ctx);
471 break;
472 case BPF_ALU | BPF_SUB | BPF_K:
473 case BPF_ALU64 | BPF_SUB | BPF_K:
474 emit_a64_mov_i(is64, tmp, imm, ctx);
475 emit(A64_SUB(is64, dst, dst, tmp), ctx);
476 break;
477 case BPF_ALU | BPF_AND | BPF_K:
478 case BPF_ALU64 | BPF_AND | BPF_K:
479 emit_a64_mov_i(is64, tmp, imm, ctx);
480 emit(A64_AND(is64, dst, dst, tmp), ctx);
481 break;
482 case BPF_ALU | BPF_OR | BPF_K:
483 case BPF_ALU64 | BPF_OR | BPF_K:
484 emit_a64_mov_i(is64, tmp, imm, ctx);
485 emit(A64_ORR(is64, dst, dst, tmp), ctx);
486 break;
487 case BPF_ALU | BPF_XOR | BPF_K:
488 case BPF_ALU64 | BPF_XOR | BPF_K:
489 emit_a64_mov_i(is64, tmp, imm, ctx);
490 emit(A64_EOR(is64, dst, dst, tmp), ctx);
491 break;
492 case BPF_ALU | BPF_MUL | BPF_K:
493 case BPF_ALU64 | BPF_MUL | BPF_K:
494 emit_a64_mov_i(is64, tmp, imm, ctx);
495 emit(A64_MUL(is64, dst, dst, tmp), ctx);
496 break;
497 case BPF_ALU | BPF_DIV | BPF_K:
498 case BPF_ALU64 | BPF_DIV | BPF_K:
499 emit_a64_mov_i(is64, tmp, imm, ctx);
500 emit(A64_UDIV(is64, dst, dst, tmp), ctx);
501 break;
502 case BPF_ALU | BPF_MOD | BPF_K:
503 case BPF_ALU64 | BPF_MOD | BPF_K:
504 emit_a64_mov_i(is64, tmp2, imm, ctx);
505 emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);
506 emit(A64_MUL(is64, tmp, tmp, tmp2), ctx);
507 emit(A64_SUB(is64, dst, dst, tmp), ctx);
508 break;
509 case BPF_ALU | BPF_LSH | BPF_K:
510 case BPF_ALU64 | BPF_LSH | BPF_K:
511 emit(A64_LSL(is64, dst, dst, imm), ctx);
512 break;
513 case BPF_ALU | BPF_RSH | BPF_K:
514 case BPF_ALU64 | BPF_RSH | BPF_K:
515 emit(A64_LSR(is64, dst, dst, imm), ctx);
516 break;
517 case BPF_ALU | BPF_ARSH | BPF_K:
518 case BPF_ALU64 | BPF_ARSH | BPF_K:
519 emit(A64_ASR(is64, dst, dst, imm), ctx);
520 break;
521
522 /* JUMP off */
523 case BPF_JMP | BPF_JA:
524 jmp_offset = bpf2a64_offset(i + off, i, ctx);
525 check_imm26(jmp_offset);
526 emit(A64_B(jmp_offset), ctx);
527 break;
528 /* IF (dst COND src) JUMP off */
529 case BPF_JMP | BPF_JEQ | BPF_X:
530 case BPF_JMP | BPF_JGT | BPF_X:
531 case BPF_JMP | BPF_JLT | BPF_X:
532 case BPF_JMP | BPF_JGE | BPF_X:
533 case BPF_JMP | BPF_JLE | BPF_X:
534 case BPF_JMP | BPF_JNE | BPF_X:
535 case BPF_JMP | BPF_JSGT | BPF_X:
536 case BPF_JMP | BPF_JSLT | BPF_X:
537 case BPF_JMP | BPF_JSGE | BPF_X:
538 case BPF_JMP | BPF_JSLE | BPF_X:
539 emit(A64_CMP(1, dst, src), ctx);
540 emit_cond_jmp:
541 jmp_offset = bpf2a64_offset(i + off, i, ctx);
542 check_imm19(jmp_offset);
543 switch (BPF_OP(code)) {
544 case BPF_JEQ:
545 jmp_cond = A64_COND_EQ;
546 break;
547 case BPF_JGT:
548 jmp_cond = A64_COND_HI;
549 break;
550 case BPF_JLT:
551 jmp_cond = A64_COND_CC;
552 break;
553 case BPF_JGE:
554 jmp_cond = A64_COND_CS;
555 break;
556 case BPF_JLE:
557 jmp_cond = A64_COND_LS;
558 break;
559 case BPF_JSET:
560 case BPF_JNE:
561 jmp_cond = A64_COND_NE;
562 break;
563 case BPF_JSGT:
564 jmp_cond = A64_COND_GT;
565 break;
566 case BPF_JSLT:
567 jmp_cond = A64_COND_LT;
568 break;
569 case BPF_JSGE:
570 jmp_cond = A64_COND_GE;
571 break;
572 case BPF_JSLE:
573 jmp_cond = A64_COND_LE;
574 break;
575 default:
576 return -EFAULT;
577 }
578 emit(A64_B_(jmp_cond, jmp_offset), ctx);
579 break;
580 case BPF_JMP | BPF_JSET | BPF_X:
581 emit(A64_TST(1, dst, src), ctx);
582 goto emit_cond_jmp;
583 /* IF (dst COND imm) JUMP off */
584 case BPF_JMP | BPF_JEQ | BPF_K:
585 case BPF_JMP | BPF_JGT | BPF_K:
586 case BPF_JMP | BPF_JLT | BPF_K:
587 case BPF_JMP | BPF_JGE | BPF_K:
588 case BPF_JMP | BPF_JLE | BPF_K:
589 case BPF_JMP | BPF_JNE | BPF_K:
590 case BPF_JMP | BPF_JSGT | BPF_K:
591 case BPF_JMP | BPF_JSLT | BPF_K:
592 case BPF_JMP | BPF_JSGE | BPF_K:
593 case BPF_JMP | BPF_JSLE | BPF_K:
594 emit_a64_mov_i(1, tmp, imm, ctx);
595 emit(A64_CMP(1, dst, tmp), ctx);
596 goto emit_cond_jmp;
597 case BPF_JMP | BPF_JSET | BPF_K:
598 emit_a64_mov_i(1, tmp, imm, ctx);
599 emit(A64_TST(1, dst, tmp), ctx);
600 goto emit_cond_jmp;
601 /* function call */
602 case BPF_JMP | BPF_CALL:
603 {
604 const u8 r0 = bpf2a64[BPF_REG_0];
605 const u64 func = (u64)__bpf_call_base + imm;
606
607 if (ctx->prog->is_func)
608 emit_addr_mov_i64(tmp, func, ctx);
609 else
610 emit_a64_mov_i64(tmp, func, ctx);
611 emit(A64_BLR(tmp), ctx);
612 emit(A64_MOV(1, r0, A64_R(0)), ctx);
613 break;
614 }
615 /* tail call */
616 case BPF_JMP | BPF_TAIL_CALL:
617 if (emit_bpf_tail_call(ctx))
618 return -EFAULT;
619 break;
620 /* function return */
621 case BPF_JMP | BPF_EXIT:
622 /* Optimization: when last instruction is EXIT,
623 simply fallthrough to epilogue. */
624 if (i == ctx->prog->len - 1)
625 break;
626 jmp_offset = epilogue_offset(ctx);
627 check_imm26(jmp_offset);
628 emit(A64_B(jmp_offset), ctx);
629 break;
630
631 /* dst = imm64 */
632 case BPF_LD | BPF_IMM | BPF_DW:
633 {
634 const struct bpf_insn insn1 = insn[1];
635 u64 imm64;
636
637 imm64 = (u64)insn1.imm << 32 | (u32)imm;
638 emit_a64_mov_i64(dst, imm64, ctx);
639
640 return 1;
641 }
642
643 /* LDX: dst = *(size *)(src + off) */
644 case BPF_LDX | BPF_MEM | BPF_W:
645 case BPF_LDX | BPF_MEM | BPF_H:
646 case BPF_LDX | BPF_MEM | BPF_B:
647 case BPF_LDX | BPF_MEM | BPF_DW:
648 emit_a64_mov_i(1, tmp, off, ctx);
649 switch (BPF_SIZE(code)) {
650 case BPF_W:
651 emit(A64_LDR32(dst, src, tmp), ctx);
652 break;
653 case BPF_H:
654 emit(A64_LDRH(dst, src, tmp), ctx);
655 break;
656 case BPF_B:
657 emit(A64_LDRB(dst, src, tmp), ctx);
658 break;
659 case BPF_DW:
660 emit(A64_LDR64(dst, src, tmp), ctx);
661 break;
662 }
663 break;
664
665 /* ST: *(size *)(dst + off) = imm */
666 case BPF_ST | BPF_MEM | BPF_W:
667 case BPF_ST | BPF_MEM | BPF_H:
668 case BPF_ST | BPF_MEM | BPF_B:
669 case BPF_ST | BPF_MEM | BPF_DW:
670 /* Load imm to a register then store it */
671 emit_a64_mov_i(1, tmp2, off, ctx);
672 emit_a64_mov_i(1, tmp, imm, ctx);
673 switch (BPF_SIZE(code)) {
674 case BPF_W:
675 emit(A64_STR32(tmp, dst, tmp2), ctx);
676 break;
677 case BPF_H:
678 emit(A64_STRH(tmp, dst, tmp2), ctx);
679 break;
680 case BPF_B:
681 emit(A64_STRB(tmp, dst, tmp2), ctx);
682 break;
683 case BPF_DW:
684 emit(A64_STR64(tmp, dst, tmp2), ctx);
685 break;
686 }
687 break;
688
689 /* STX: *(size *)(dst + off) = src */
690 case BPF_STX | BPF_MEM | BPF_W:
691 case BPF_STX | BPF_MEM | BPF_H:
692 case BPF_STX | BPF_MEM | BPF_B:
693 case BPF_STX | BPF_MEM | BPF_DW:
694 emit_a64_mov_i(1, tmp, off, ctx);
695 switch (BPF_SIZE(code)) {
696 case BPF_W:
697 emit(A64_STR32(src, dst, tmp), ctx);
698 break;
699 case BPF_H:
700 emit(A64_STRH(src, dst, tmp), ctx);
701 break;
702 case BPF_B:
703 emit(A64_STRB(src, dst, tmp), ctx);
704 break;
705 case BPF_DW:
706 emit(A64_STR64(src, dst, tmp), ctx);
707 break;
708 }
709 break;
710 /* STX XADD: lock *(u32 *)(dst + off) += src */
711 case BPF_STX | BPF_XADD | BPF_W:
712 /* STX XADD: lock *(u64 *)(dst + off) += src */
713 case BPF_STX | BPF_XADD | BPF_DW:
714 emit_a64_mov_i(1, tmp, off, ctx);
715 emit(A64_ADD(1, tmp, tmp, dst), ctx);
716 emit(A64_PRFM(tmp, PST, L1, STRM), ctx);
717 emit(A64_LDXR(isdw, tmp2, tmp), ctx);
718 emit(A64_ADD(isdw, tmp2, tmp2, src), ctx);
719 emit(A64_STXR(isdw, tmp2, tmp, tmp3), ctx);
720 jmp_offset = -3;
721 check_imm19(jmp_offset);
722 emit(A64_CBNZ(0, tmp3, jmp_offset), ctx);
723 break;
724
725 /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + imm)) */
726 case BPF_LD | BPF_ABS | BPF_W:
727 case BPF_LD | BPF_ABS | BPF_H:
728 case BPF_LD | BPF_ABS | BPF_B:
729 /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + src + imm)) */
730 case BPF_LD | BPF_IND | BPF_W:
731 case BPF_LD | BPF_IND | BPF_H:
732 case BPF_LD | BPF_IND | BPF_B:
733 {
734 const u8 r0 = bpf2a64[BPF_REG_0]; /* r0 = return value */
735 const u8 r6 = bpf2a64[BPF_REG_6]; /* r6 = pointer to sk_buff */
736 const u8 fp = bpf2a64[BPF_REG_FP];
737 const u8 r1 = bpf2a64[BPF_REG_1]; /* r1: struct sk_buff *skb */
738 const u8 r2 = bpf2a64[BPF_REG_2]; /* r2: int k */
739 const u8 r3 = bpf2a64[BPF_REG_3]; /* r3: unsigned int size */
740 const u8 r4 = bpf2a64[BPF_REG_4]; /* r4: void *buffer */
741 const u8 r5 = bpf2a64[BPF_REG_5]; /* r5: void *(*func)(...) */
742 int size;
743
744 emit(A64_MOV(1, r1, r6), ctx);
745 emit_a64_mov_i(0, r2, imm, ctx);
746 if (BPF_MODE(code) == BPF_IND)
747 emit(A64_ADD(0, r2, r2, src), ctx);
748 switch (BPF_SIZE(code)) {
749 case BPF_W:
750 size = 4;
751 break;
752 case BPF_H:
753 size = 2;
754 break;
755 case BPF_B:
756 size = 1;
757 break;
758 default:
759 return -EINVAL;
760 }
761 emit_a64_mov_i64(r3, size, ctx);
762 emit(A64_SUB_I(1, r4, fp, ctx->stack_size), ctx);
763 emit_a64_mov_i64(r5, (unsigned long)bpf_load_pointer, ctx);
764 emit(A64_BLR(r5), ctx);
765 emit(A64_MOV(1, r0, A64_R(0)), ctx);
766
767 jmp_offset = epilogue_offset(ctx);
768 check_imm19(jmp_offset);
769 emit(A64_CBZ(1, r0, jmp_offset), ctx);
770 emit(A64_MOV(1, r5, r0), ctx);
771 switch (BPF_SIZE(code)) {
772 case BPF_W:
773 emit(A64_LDR32(r0, r5, A64_ZR), ctx);
774 #ifndef CONFIG_CPU_BIG_ENDIAN
775 emit(A64_REV32(0, r0, r0), ctx);
776 #endif
777 break;
778 case BPF_H:
779 emit(A64_LDRH(r0, r5, A64_ZR), ctx);
780 #ifndef CONFIG_CPU_BIG_ENDIAN
781 emit(A64_REV16(0, r0, r0), ctx);
782 #endif
783 break;
784 case BPF_B:
785 emit(A64_LDRB(r0, r5, A64_ZR), ctx);
786 break;
787 }
788 break;
789 }
790 default:
791 pr_err_once("unknown opcode %02x\n", code);
792 return -EINVAL;
793 }
794
795 return 0;
796 }
797
798 static int build_body(struct jit_ctx *ctx)
799 {
800 const struct bpf_prog *prog = ctx->prog;
801 int i;
802
803 for (i = 0; i < prog->len; i++) {
804 const struct bpf_insn *insn = &prog->insnsi[i];
805 int ret;
806
807 ret = build_insn(insn, ctx);
808 if (ret > 0) {
809 i++;
810 if (ctx->image == NULL)
811 ctx->offset[i] = ctx->idx;
812 continue;
813 }
814 if (ctx->image == NULL)
815 ctx->offset[i] = ctx->idx;
816 if (ret)
817 return ret;
818 }
819
820 return 0;
821 }
822
823 static int validate_code(struct jit_ctx *ctx)
824 {
825 int i;
826
827 for (i = 0; i < ctx->idx; i++) {
828 u32 a64_insn = le32_to_cpu(ctx->image[i]);
829
830 if (a64_insn == AARCH64_BREAK_FAULT)
831 return -1;
832 }
833
834 return 0;
835 }
836
837 static inline void bpf_flush_icache(void *start, void *end)
838 {
839 flush_icache_range((unsigned long)start, (unsigned long)end);
840 }
841
842 struct arm64_jit_data {
843 struct bpf_binary_header *header;
844 u8 *image;
845 struct jit_ctx ctx;
846 };
847
848 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
849 {
850 struct bpf_prog *tmp, *orig_prog = prog;
851 struct bpf_binary_header *header;
852 struct arm64_jit_data *jit_data;
853 bool tmp_blinded = false;
854 bool extra_pass = false;
855 struct jit_ctx ctx;
856 int image_size;
857 u8 *image_ptr;
858
859 if (!prog->jit_requested)
860 return orig_prog;
861
862 tmp = bpf_jit_blind_constants(prog);
863 /* If blinding was requested and we failed during blinding,
864 * we must fall back to the interpreter.
865 */
866 if (IS_ERR(tmp))
867 return orig_prog;
868 if (tmp != prog) {
869 tmp_blinded = true;
870 prog = tmp;
871 }
872
873 jit_data = prog->aux->jit_data;
874 if (!jit_data) {
875 jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);
876 if (!jit_data) {
877 prog = orig_prog;
878 goto out;
879 }
880 prog->aux->jit_data = jit_data;
881 }
882 if (jit_data->ctx.offset) {
883 ctx = jit_data->ctx;
884 image_ptr = jit_data->image;
885 header = jit_data->header;
886 extra_pass = true;
887 image_size = sizeof(u32) * ctx.idx;
888 goto skip_init_ctx;
889 }
890 memset(&ctx, 0, sizeof(ctx));
891 ctx.prog = prog;
892
893 ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL);
894 if (ctx.offset == NULL) {
895 prog = orig_prog;
896 goto out_off;
897 }
898
899 /* 1. Initial fake pass to compute ctx->idx. */
900
901 /* Fake pass to fill in ctx->offset. */
902 if (build_body(&ctx)) {
903 prog = orig_prog;
904 goto out_off;
905 }
906
907 if (build_prologue(&ctx)) {
908 prog = orig_prog;
909 goto out_off;
910 }
911
912 ctx.epilogue_offset = ctx.idx;
913 build_epilogue(&ctx);
914
915 /* Now we know the actual image size. */
916 image_size = sizeof(u32) * ctx.idx;
917 header = bpf_jit_binary_alloc(image_size, &image_ptr,
918 sizeof(u32), jit_fill_hole);
919 if (header == NULL) {
920 prog = orig_prog;
921 goto out_off;
922 }
923
924 /* 2. Now, the actual pass. */
925
926 ctx.image = (__le32 *)image_ptr;
927 skip_init_ctx:
928 ctx.idx = 0;
929
930 build_prologue(&ctx);
931
932 if (build_body(&ctx)) {
933 bpf_jit_binary_free(header);
934 prog = orig_prog;
935 goto out_off;
936 }
937
938 build_epilogue(&ctx);
939
940 /* 3. Extra pass to validate JITed code. */
941 if (validate_code(&ctx)) {
942 bpf_jit_binary_free(header);
943 prog = orig_prog;
944 goto out_off;
945 }
946
947 /* And we're done. */
948 if (bpf_jit_enable > 1)
949 bpf_jit_dump(prog->len, image_size, 2, ctx.image);
950
951 bpf_flush_icache(header, ctx.image + ctx.idx);
952
953 if (!prog->is_func || extra_pass) {
954 if (extra_pass && ctx.idx != jit_data->ctx.idx) {
955 pr_err_once("multi-func JIT bug %d != %d\n",
956 ctx.idx, jit_data->ctx.idx);
957 bpf_jit_binary_free(header);
958 prog->bpf_func = NULL;
959 prog->jited = 0;
960 goto out_off;
961 }
962 bpf_jit_binary_lock_ro(header);
963 } else {
964 jit_data->ctx = ctx;
965 jit_data->image = image_ptr;
966 jit_data->header = header;
967 }
968 prog->bpf_func = (void *)ctx.image;
969 prog->jited = 1;
970 prog->jited_len = image_size;
971
972 if (!prog->is_func || extra_pass) {
973 out_off:
974 kfree(ctx.offset);
975 kfree(jit_data);
976 prog->aux->jit_data = NULL;
977 }
978 out:
979 if (tmp_blinded)
980 bpf_jit_prog_release_other(prog, prog == orig_prog ?
981 tmp : orig_prog);
982 return prog;
983 }
CRIS linux kernel tree