2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
15 #include <linux/sched.h>
16 #include <linux/sched/debug.h>
17 #include <linux/sched/task.h>
18 #include <linux/sched/task_stack.h>
19 #include <linux/preempt.h>
20 #include <linux/module.h>
22 #include <linux/kprobes.h>
23 #include <linux/elfcore.h>
24 #include <linux/tick.h>
25 #include <linux/init.h>
27 #include <linux/compat.h>
28 #include <linux/nmi.h>
29 #include <linux/syscalls.h>
30 #include <linux/kernel.h>
31 #include <linux/tracehook.h>
32 #include <linux/signal.h>
33 #include <linux/delay.h>
34 #include <linux/context_tracking.h>
35 #include <asm/stack.h>
36 #include <asm/switch_to.h>
37 #include <asm/homecache.h>
38 #include <asm/syscalls.h>
39 #include <asm/traps.h>
40 #include <asm/setup.h>
41 #include <linux/uaccess.h>
42 #ifdef CONFIG_HARDWALL
43 #include <asm/hardwall.h>
45 #include <arch/chip.h>
47 #include <arch/sim_def.h>
50 * Use the (x86) "idle=poll" option to prefer low latency when leaving the
51 * idle loop over low power while in the idle loop, e.g. if we have
52 * one thread per core and we want to get threads out of futex waits fast.
54 static int __init
idle_setup(char *str
)
59 if (!strcmp(str
, "poll")) {
60 pr_info("using polling idle threads\n");
61 cpu_idle_poll_ctrl(true);
63 } else if (!strcmp(str
, "halt")) {
68 early_param("idle", idle_setup
);
70 void arch_cpu_idle(void)
72 __this_cpu_write(irq_stat
.idle_timestamp
, jiffies
);
77 * Release a thread_info structure
79 void arch_release_thread_stack(unsigned long *stack
)
81 struct thread_info
*info
= (void *)stack
;
82 struct single_step_state
*step_state
= info
->step_state
;
87 * FIXME: we don't munmap step_state->buffer
88 * because the mm_struct for this process (info->task->mm)
89 * has already been zeroed in exit_mm(). Keeping a
90 * reference to it here seems like a bad move, so this
91 * means we can't munmap() the buffer, and therefore if we
92 * ptrace multiple threads in a process, we will slowly
93 * leak user memory. (Note that as soon as the last
94 * thread in a process dies, we will reclaim all user
95 * memory including single-step buffers in the usual way.)
96 * We should either assign a kernel VA to this buffer
97 * somehow, or we should associate the buffer(s) with the
98 * mm itself so we can clean them up that way.
104 static void save_arch_state(struct thread_struct
*t
);
106 int copy_thread(unsigned long clone_flags
, unsigned long sp
,
107 unsigned long arg
, struct task_struct
*p
)
109 struct pt_regs
*childregs
= task_pt_regs(p
);
111 unsigned long *callee_regs
;
114 * Set up the stack and stack pointer appropriately for the
115 * new child to find itself woken up in __switch_to().
116 * The callee-saved registers must be on the stack to be read;
117 * the new task will then jump to assembly support to handle
118 * calling schedule_tail(), etc., and (for userspace tasks)
119 * returning to the context set up in the pt_regs.
121 ksp
= (unsigned long) childregs
;
122 ksp
-= C_ABI_SAVE_AREA_SIZE
; /* interrupt-entry save area */
123 ((long *)ksp
)[0] = ((long *)ksp
)[1] = 0;
124 ksp
-= CALLEE_SAVED_REGS_COUNT
* sizeof(unsigned long);
125 callee_regs
= (unsigned long *)ksp
;
126 ksp
-= C_ABI_SAVE_AREA_SIZE
; /* __switch_to() save area */
127 ((long *)ksp
)[0] = ((long *)ksp
)[1] = 0;
130 /* Record the pid of the task that created this one. */
131 p
->thread
.creator_pid
= current
->pid
;
133 if (unlikely(p
->flags
& PF_KTHREAD
)) {
135 memset(childregs
, 0, sizeof(struct pt_regs
));
136 memset(&callee_regs
[2], 0,
137 (CALLEE_SAVED_REGS_COUNT
- 2) * sizeof(unsigned long));
138 callee_regs
[0] = sp
; /* r30 = function */
139 callee_regs
[1] = arg
; /* r31 = arg */
140 p
->thread
.pc
= (unsigned long) ret_from_kernel_thread
;
145 * Start new thread in ret_from_fork so it schedules properly
146 * and then return from interrupt like the parent.
148 p
->thread
.pc
= (unsigned long) ret_from_fork
;
151 * Do not clone step state from the parent; each thread
152 * must make its own lazily.
154 task_thread_info(p
)->step_state
= NULL
;
158 * Do not clone unalign jit fixup from the parent; each thread
159 * must allocate its own on demand.
161 task_thread_info(p
)->unalign_jit_base
= NULL
;
165 * Copy the registers onto the kernel stack so the
166 * return-from-interrupt code will reload it into registers.
168 *childregs
= *current_pt_regs();
169 childregs
->regs
[0] = 0; /* return value is zero */
171 childregs
->sp
= sp
; /* override with new user stack pointer */
172 memcpy(callee_regs
, &childregs
->regs
[CALLEE_SAVED_FIRST_REG
],
173 CALLEE_SAVED_REGS_COUNT
* sizeof(unsigned long));
175 /* Save user stack top pointer so we can ID the stack vm area later. */
176 p
->thread
.usp0
= childregs
->sp
;
179 * If CLONE_SETTLS is set, set "tp" in the new task to "r4",
180 * which is passed in as arg #5 to sys_clone().
182 if (clone_flags
& CLONE_SETTLS
)
183 childregs
->tp
= childregs
->regs
[4];
186 #if CHIP_HAS_TILE_DMA()
188 * No DMA in the new thread. We model this on the fact that
189 * fork() clears the pending signals, alarms, and aio for the child.
191 memset(&p
->thread
.tile_dma_state
, 0, sizeof(struct tile_dma_state
));
192 memset(&p
->thread
.dma_async_tlb
, 0, sizeof(struct async_tlb
));
195 /* New thread has its miscellaneous processor state bits clear. */
196 p
->thread
.proc_status
= 0;
198 #ifdef CONFIG_HARDWALL
199 /* New thread does not own any networks. */
200 memset(&p
->thread
.hardwall
[0], 0,
201 sizeof(struct hardwall_task
) * HARDWALL_TYPES
);
206 * Start the new thread with the current architecture state
207 * (user interrupt masks, etc.).
209 save_arch_state(&p
->thread
);
214 int set_unalign_ctl(struct task_struct
*tsk
, unsigned int val
)
216 task_thread_info(tsk
)->align_ctl
= val
;
220 int get_unalign_ctl(struct task_struct
*tsk
, unsigned long adr
)
222 return put_user(task_thread_info(tsk
)->align_ctl
,
223 (unsigned int __user
*)adr
);
226 static struct task_struct corrupt_current
= { .comm
= "<corrupt>" };
229 * Return "current" if it looks plausible, or else a pointer to a dummy.
230 * This can be helpful if we are just trying to emit a clean panic.
232 struct task_struct
*validate_current(void)
234 struct task_struct
*tsk
= current
;
235 if (unlikely((unsigned long)tsk
< PAGE_OFFSET
||
236 (high_memory
&& (void *)tsk
> high_memory
) ||
237 ((unsigned long)tsk
& (__alignof__(*tsk
) - 1)) != 0)) {
238 pr_err("Corrupt 'current' %p (sp %#lx)\n", tsk
, stack_pointer
);
239 tsk
= &corrupt_current
;
244 /* Take and return the pointer to the previous task, for schedule_tail(). */
245 struct task_struct
*sim_notify_fork(struct task_struct
*prev
)
247 struct task_struct
*tsk
= current
;
248 __insn_mtspr(SPR_SIM_CONTROL
, SIM_CONTROL_OS_FORK_PARENT
|
249 (tsk
->thread
.creator_pid
<< _SIM_CONTROL_OPERATOR_BITS
));
250 __insn_mtspr(SPR_SIM_CONTROL
, SIM_CONTROL_OS_FORK
|
251 (tsk
->pid
<< _SIM_CONTROL_OPERATOR_BITS
));
255 int dump_task_regs(struct task_struct
*tsk
, elf_gregset_t
*regs
)
257 struct pt_regs
*ptregs
= task_pt_regs(tsk
);
258 elf_core_copy_regs(regs
, ptregs
);
262 #if CHIP_HAS_TILE_DMA()
264 /* Allow user processes to access the DMA SPRs */
265 void grant_dma_mpls(void)
267 #if CONFIG_KERNEL_PL == 2
268 __insn_mtspr(SPR_MPL_DMA_CPL_SET_1
, 1);
269 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1
, 1);
271 __insn_mtspr(SPR_MPL_DMA_CPL_SET_0
, 1);
272 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_0
, 1);
276 /* Forbid user processes from accessing the DMA SPRs */
277 void restrict_dma_mpls(void)
279 #if CONFIG_KERNEL_PL == 2
280 __insn_mtspr(SPR_MPL_DMA_CPL_SET_2
, 1);
281 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_2
, 1);
283 __insn_mtspr(SPR_MPL_DMA_CPL_SET_1
, 1);
284 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1
, 1);
288 /* Pause the DMA engine, then save off its state registers. */
289 static void save_tile_dma_state(struct tile_dma_state
*dma
)
291 unsigned long state
= __insn_mfspr(SPR_DMA_USER_STATUS
);
292 unsigned long post_suspend_state
;
294 /* If we're running, suspend the engine. */
295 if ((state
& DMA_STATUS_MASK
) == SPR_DMA_STATUS__RUNNING_MASK
)
296 __insn_mtspr(SPR_DMA_CTR
, SPR_DMA_CTR__SUSPEND_MASK
);
299 * Wait for the engine to idle, then save regs. Note that we
300 * want to record the "running" bit from before suspension,
301 * and the "done" bit from after, so that we can properly
302 * distinguish a case where the user suspended the engine from
303 * the case where the kernel suspended as part of the context
307 post_suspend_state
= __insn_mfspr(SPR_DMA_USER_STATUS
);
308 } while (post_suspend_state
& SPR_DMA_STATUS__BUSY_MASK
);
310 dma
->src
= __insn_mfspr(SPR_DMA_SRC_ADDR
);
311 dma
->src_chunk
= __insn_mfspr(SPR_DMA_SRC_CHUNK_ADDR
);
312 dma
->dest
= __insn_mfspr(SPR_DMA_DST_ADDR
);
313 dma
->dest_chunk
= __insn_mfspr(SPR_DMA_DST_CHUNK_ADDR
);
314 dma
->strides
= __insn_mfspr(SPR_DMA_STRIDE
);
315 dma
->chunk_size
= __insn_mfspr(SPR_DMA_CHUNK_SIZE
);
316 dma
->byte
= __insn_mfspr(SPR_DMA_BYTE
);
317 dma
->status
= (state
& SPR_DMA_STATUS__RUNNING_MASK
) |
318 (post_suspend_state
& SPR_DMA_STATUS__DONE_MASK
);
321 /* Restart a DMA that was running before we were context-switched out. */
322 static void restore_tile_dma_state(struct thread_struct
*t
)
324 const struct tile_dma_state
*dma
= &t
->tile_dma_state
;
327 * The only way to restore the done bit is to run a zero
328 * length transaction.
330 if ((dma
->status
& SPR_DMA_STATUS__DONE_MASK
) &&
331 !(__insn_mfspr(SPR_DMA_USER_STATUS
) & SPR_DMA_STATUS__DONE_MASK
)) {
332 __insn_mtspr(SPR_DMA_BYTE
, 0);
333 __insn_mtspr(SPR_DMA_CTR
, SPR_DMA_CTR__REQUEST_MASK
);
334 while (__insn_mfspr(SPR_DMA_USER_STATUS
) &
335 SPR_DMA_STATUS__BUSY_MASK
)
339 __insn_mtspr(SPR_DMA_SRC_ADDR
, dma
->src
);
340 __insn_mtspr(SPR_DMA_SRC_CHUNK_ADDR
, dma
->src_chunk
);
341 __insn_mtspr(SPR_DMA_DST_ADDR
, dma
->dest
);
342 __insn_mtspr(SPR_DMA_DST_CHUNK_ADDR
, dma
->dest_chunk
);
343 __insn_mtspr(SPR_DMA_STRIDE
, dma
->strides
);
344 __insn_mtspr(SPR_DMA_CHUNK_SIZE
, dma
->chunk_size
);
345 __insn_mtspr(SPR_DMA_BYTE
, dma
->byte
);
348 * Restart the engine if we were running and not done.
349 * Clear a pending async DMA fault that we were waiting on return
350 * to user space to execute, since we expect the DMA engine
351 * to regenerate those faults for us now. Note that we don't
352 * try to clear the TIF_ASYNC_TLB flag, since it's relatively
353 * harmless if set, and it covers both DMA and the SN processor.
355 if ((dma
->status
& DMA_STATUS_MASK
) == SPR_DMA_STATUS__RUNNING_MASK
) {
356 t
->dma_async_tlb
.fault_num
= 0;
357 __insn_mtspr(SPR_DMA_CTR
, SPR_DMA_CTR__REQUEST_MASK
);
363 static void save_arch_state(struct thread_struct
*t
)
365 #if CHIP_HAS_SPLIT_INTR_MASK()
366 t
->interrupt_mask
= __insn_mfspr(SPR_INTERRUPT_MASK_0_0
) |
367 ((u64
)__insn_mfspr(SPR_INTERRUPT_MASK_0_1
) << 32);
369 t
->interrupt_mask
= __insn_mfspr(SPR_INTERRUPT_MASK_0
);
371 t
->ex_context
[0] = __insn_mfspr(SPR_EX_CONTEXT_0_0
);
372 t
->ex_context
[1] = __insn_mfspr(SPR_EX_CONTEXT_0_1
);
373 t
->system_save
[0] = __insn_mfspr(SPR_SYSTEM_SAVE_0_0
);
374 t
->system_save
[1] = __insn_mfspr(SPR_SYSTEM_SAVE_0_1
);
375 t
->system_save
[2] = __insn_mfspr(SPR_SYSTEM_SAVE_0_2
);
376 t
->system_save
[3] = __insn_mfspr(SPR_SYSTEM_SAVE_0_3
);
377 t
->intctrl_0
= __insn_mfspr(SPR_INTCTRL_0_STATUS
);
378 t
->proc_status
= __insn_mfspr(SPR_PROC_STATUS
);
379 #if !CHIP_HAS_FIXED_INTVEC_BASE()
380 t
->interrupt_vector_base
= __insn_mfspr(SPR_INTERRUPT_VECTOR_BASE_0
);
382 t
->tile_rtf_hwm
= __insn_mfspr(SPR_TILE_RTF_HWM
);
383 #if CHIP_HAS_DSTREAM_PF()
384 t
->dstream_pf
= __insn_mfspr(SPR_DSTREAM_PF
);
388 static void restore_arch_state(const struct thread_struct
*t
)
390 #if CHIP_HAS_SPLIT_INTR_MASK()
391 __insn_mtspr(SPR_INTERRUPT_MASK_0_0
, (u32
) t
->interrupt_mask
);
392 __insn_mtspr(SPR_INTERRUPT_MASK_0_1
, t
->interrupt_mask
>> 32);
394 __insn_mtspr(SPR_INTERRUPT_MASK_0
, t
->interrupt_mask
);
396 __insn_mtspr(SPR_EX_CONTEXT_0_0
, t
->ex_context
[0]);
397 __insn_mtspr(SPR_EX_CONTEXT_0_1
, t
->ex_context
[1]);
398 __insn_mtspr(SPR_SYSTEM_SAVE_0_0
, t
->system_save
[0]);
399 __insn_mtspr(SPR_SYSTEM_SAVE_0_1
, t
->system_save
[1]);
400 __insn_mtspr(SPR_SYSTEM_SAVE_0_2
, t
->system_save
[2]);
401 __insn_mtspr(SPR_SYSTEM_SAVE_0_3
, t
->system_save
[3]);
402 __insn_mtspr(SPR_INTCTRL_0_STATUS
, t
->intctrl_0
);
403 __insn_mtspr(SPR_PROC_STATUS
, t
->proc_status
);
404 #if !CHIP_HAS_FIXED_INTVEC_BASE()
405 __insn_mtspr(SPR_INTERRUPT_VECTOR_BASE_0
, t
->interrupt_vector_base
);
407 __insn_mtspr(SPR_TILE_RTF_HWM
, t
->tile_rtf_hwm
);
408 #if CHIP_HAS_DSTREAM_PF()
409 __insn_mtspr(SPR_DSTREAM_PF
, t
->dstream_pf
);
414 void _prepare_arch_switch(struct task_struct
*next
)
416 #if CHIP_HAS_TILE_DMA()
417 struct tile_dma_state
*dma
= ¤t
->thread
.tile_dma_state
;
419 save_tile_dma_state(dma
);
424 struct task_struct
*__sched
_switch_to(struct task_struct
*prev
,
425 struct task_struct
*next
)
427 /* DMA state is already saved; save off other arch state. */
428 save_arch_state(&prev
->thread
);
430 #if CHIP_HAS_TILE_DMA()
432 * Restore DMA in new task if desired.
433 * Note that it is only safe to restart here since interrupts
434 * are disabled, so we can't take any DMATLB miss or access
435 * interrupts before we have finished switching stacks.
437 if (next
->thread
.tile_dma_state
.enabled
) {
438 restore_tile_dma_state(&next
->thread
);
445 /* Restore other arch state. */
446 restore_arch_state(&next
->thread
);
448 #ifdef CONFIG_HARDWALL
449 /* Enable or disable access to the network registers appropriately. */
450 hardwall_switch_tasks(prev
, next
);
453 /* Notify the simulator of task exit. */
454 if (unlikely(prev
->state
== TASK_DEAD
))
455 __insn_mtspr(SPR_SIM_CONTROL
, SIM_CONTROL_OS_EXIT
|
456 (prev
->pid
<< _SIM_CONTROL_OPERATOR_BITS
));
459 * Switch kernel SP, PC, and callee-saved registers.
460 * In the context of the new task, return the old task pointer
461 * (i.e. the task that actually called __switch_to).
462 * Pass the value to use for SYSTEM_SAVE_K_0 when we reset our sp.
464 return __switch_to(prev
, next
, next_current_ksp0(next
));
468 * This routine is called on return from interrupt if any of the
469 * TIF_ALLWORK_MASK flags are set in thread_info->flags. It is
470 * entered with interrupts disabled so we don't miss an event that
471 * modified the thread_info flags. We loop until all the tested flags
472 * are clear. Note that the function is called on certain conditions
473 * that are not listed in the loop condition here (e.g. SINGLESTEP)
474 * which guarantees we will do those things once, and redo them if any
475 * of the other work items is re-done, but won't continue looping if
476 * all the other work is done.
478 void prepare_exit_to_usermode(struct pt_regs
*regs
, u32 thread_info_flags
)
480 if (WARN_ON(!user_mode(regs
)))
486 if (thread_info_flags
& _TIF_NEED_RESCHED
)
489 #if CHIP_HAS_TILE_DMA()
490 if (thread_info_flags
& _TIF_ASYNC_TLB
)
491 do_async_page_fault(regs
);
494 if (thread_info_flags
& _TIF_SIGPENDING
)
497 if (thread_info_flags
& _TIF_NOTIFY_RESUME
) {
498 clear_thread_flag(TIF_NOTIFY_RESUME
);
499 tracehook_notify_resume(regs
);
503 thread_info_flags
= READ_ONCE(current_thread_info()->flags
);
505 } while (thread_info_flags
& _TIF_WORK_MASK
);
507 if (thread_info_flags
& _TIF_SINGLESTEP
) {
508 single_step_once(regs
);
511 * FIXME: on tilepro, since we enable interrupts in
512 * this routine, it's possible that we miss a signal
513 * or other asynchronous event.
522 unsigned long get_wchan(struct task_struct
*p
)
524 struct KBacktraceIterator kbt
;
526 if (!p
|| p
== current
|| p
->state
== TASK_RUNNING
)
529 for (KBacktraceIterator_init(&kbt
, p
, NULL
);
530 !KBacktraceIterator_end(&kbt
);
531 KBacktraceIterator_next(&kbt
)) {
532 if (!in_sched_functions(kbt
.it
.pc
))
539 /* Flush thread state. */
540 void flush_thread(void)
546 * Free current thread data structures etc..
548 void exit_thread(struct task_struct
*tsk
)
550 #ifdef CONFIG_HARDWALL
552 * Remove the task from the list of tasks that are associated
553 * with any live hardwalls. (If the task that is exiting held
554 * the last reference to a hardwall fd, it would already have
555 * been released and deactivated at this point.)
557 hardwall_deactivate_all(tsk
);
561 void tile_show_regs(struct pt_regs
*regs
)
565 for (i
= 0; i
< 17; i
++)
566 pr_err(" r%-2d: "REGFMT
" r%-2d: "REGFMT
" r%-2d: "REGFMT
"\n",
567 i
, regs
->regs
[i
], i
+18, regs
->regs
[i
+18],
568 i
+36, regs
->regs
[i
+36]);
569 pr_err(" r17: "REGFMT
" r35: "REGFMT
" tp : "REGFMT
"\n",
570 regs
->regs
[17], regs
->regs
[35], regs
->tp
);
571 pr_err(" sp : "REGFMT
" lr : "REGFMT
"\n", regs
->sp
, regs
->lr
);
573 for (i
= 0; i
< 13; i
++)
574 pr_err(" r%-2d: "REGFMT
" r%-2d: "REGFMT
575 " r%-2d: "REGFMT
" r%-2d: "REGFMT
"\n",
576 i
, regs
->regs
[i
], i
+14, regs
->regs
[i
+14],
577 i
+27, regs
->regs
[i
+27], i
+40, regs
->regs
[i
+40]);
578 pr_err(" r13: "REGFMT
" tp : "REGFMT
" sp : "REGFMT
" lr : "REGFMT
"\n",
579 regs
->regs
[13], regs
->tp
, regs
->sp
, regs
->lr
);
581 pr_err(" pc : "REGFMT
" ex1: %ld faultnum: %ld flags:%s%s%s%s\n",
582 regs
->pc
, regs
->ex1
, regs
->faultnum
,
583 is_compat_task() ? " compat" : "",
584 (regs
->flags
& PT_FLAGS_DISABLE_IRQ
) ? " noirq" : "",
585 !(regs
->flags
& PT_FLAGS_CALLER_SAVES
) ? " nocallersave" : "",
586 (regs
->flags
& PT_FLAGS_RESTORE_REGS
) ? " restoreregs" : "");
589 void show_regs(struct pt_regs
*regs
)
591 struct KBacktraceIterator kbt
;
593 show_regs_print_info(KERN_DEFAULT
);
594 tile_show_regs(regs
);
596 KBacktraceIterator_init(&kbt
, NULL
, regs
);
597 tile_show_stack(&kbt
);
601 void nmi_raise_cpu_backtrace(struct cpumask
*in_mask
)
605 unsigned int timeout
;
607 HV_NMI_Info info
[NR_CPUS
];
609 /* Tentatively dump stack on remote tiles via NMI. */
611 cpumask_copy(&mask
, in_mask
);
612 while (!cpumask_empty(&mask
) && timeout
) {
613 for_each_cpu(cpu
, &mask
) {
616 info
[cpu
] = hv_send_nmi(tile
, TILE_NMI_DUMP_STACK
, 0);
617 if (info
[cpu
].result
== HV_NMI_RESULT_OK
)
618 cpumask_clear_cpu(cpu
, &mask
);
622 touch_softlockup_watchdog();
626 /* Warn about cpus stuck in ICS. */
627 if (!cpumask_empty(&mask
)) {
628 for_each_cpu(cpu
, &mask
) {
630 /* Clear the bit as if nmi_cpu_backtrace() ran. */
631 cpumask_clear_cpu(cpu
, in_mask
);
633 switch (info
[cpu
].result
) {
634 case HV_NMI_RESULT_FAIL_ICS
:
635 pr_warn("Skipping stack dump of cpu %d in ICS at pc %#llx\n",
638 case HV_NMI_RESULT_FAIL_HV
:
639 pr_warn("Skipping stack dump of cpu %d in hypervisor\n",
643 WARN_ONCE(1, "Hypervisor too old to allow remote stack dumps.\n");
645 default: /* should not happen */
646 pr_warn("Skipping stack dump of cpu %d [%d,%#llx]\n",
647 cpu
, info
[cpu
].result
, info
[cpu
].pc
);
654 void arch_trigger_cpumask_backtrace(const cpumask_t
*mask
, bool exclude_self
)
656 nmi_trigger_cpumask_backtrace(mask
, exclude_self
,
657 nmi_raise_cpu_backtrace
);
659 #endif /* __tilegx_ */