| blob | 2c9d54a35bc312e8286812a67507e7a71e9f9141 |
1 /*
2 * MPC8349E-mITX Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
12 /dts-v1/;
14 / {
15 model = "MPC8349EMITX";
16 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
17 #address-cells = <1>;
18 #size-cells = <1>;
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 };
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
33 PowerPC,8349@0 {
34 device_type = "cpu";
35 reg = <0x0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>; // from bootloader
41 bus-frequency = <0>; // from bootloader
42 clock-frequency = <0>; // from bootloader
43 };
44 };
46 memory {
47 device_type = "memory";
48 reg = <0x00000000 0x10000000>;
49 };
51 soc8349@e0000000 {
52 #address-cells = <1>;
53 #size-cells = <1>;
54 device_type = "soc";
55 compatible = "simple-bus";
56 ranges = <0x0 0xe0000000 0x00100000>;
57 reg = <0xe0000000 0x00000200>;
58 bus-frequency = <0>; // from bootloader
60 wdt@200 {
61 device_type = "watchdog";
62 compatible = "mpc83xx_wdt";
63 reg = <0x200 0x100>;
64 };
66 i2c@3000 {
67 #address-cells = <1>;
68 #size-cells = <0>;
69 cell-index = <0>;
70 compatible = "fsl-i2c";
71 reg = <0x3000 0x100>;
72 interrupts = <14 0x8>;
73 interrupt-parent = <&ipic>;
74 dfsrr;
75 };
77 i2c@3100 {
78 #address-cells = <1>;
79 #size-cells = <0>;
80 cell-index = <1>;
81 compatible = "fsl-i2c";
82 reg = <0x3100 0x100>;
83 interrupts = <15 0x8>;
84 interrupt-parent = <&ipic>;
85 dfsrr;
87 rtc@68 {
88 device_type = "rtc";
89 compatible = "dallas,ds1339";
90 reg = <0x68>;
91 interrupts = <18 0x8>;
92 interrupt-parent = <&ipic>;
93 };
94 };
96 spi@7000 {
97 cell-index = <0>;
98 compatible = "fsl,spi";
99 reg = <0x7000 0x1000>;
100 interrupts = <16 0x8>;
101 interrupt-parent = <&ipic>;
102 mode = "cpu";
103 };
105 dma@82a8 {
106 #address-cells = <1>;
107 #size-cells = <1>;
108 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
109 reg = <0x82a8 4>;
110 ranges = <0 0x8100 0x1a8>;
111 interrupt-parent = <&ipic>;
112 interrupts = <71 8>;
113 cell-index = <0>;
114 dma-channel@0 {
115 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
116 reg = <0 0x80>;
117 cell-index = <0>;
118 interrupt-parent = <&ipic>;
119 interrupts = <71 8>;
120 };
121 dma-channel@80 {
122 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
123 reg = <0x80 0x80>;
124 cell-index = <1>;
125 interrupt-parent = <&ipic>;
126 interrupts = <71 8>;
127 };
128 dma-channel@100 {
129 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
130 reg = <0x100 0x80>;
131 cell-index = <2>;
132 interrupt-parent = <&ipic>;
133 interrupts = <71 8>;
134 };
135 dma-channel@180 {
136 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
137 reg = <0x180 0x28>;
138 cell-index = <3>;
139 interrupt-parent = <&ipic>;
140 interrupts = <71 8>;
141 };
143 mcu_pio: mcu@a {
144 #gpio-cells = <2>;
145 compatible = "fsl,mc9s08qg8-mpc8349emitx",
146 "fsl,mcu-mpc8349emitx";
147 reg = <0x0a>;
148 gpio-controller;
149 };
150 };
152 usb@22000 {
153 compatible = "fsl-usb2-mph";
154 reg = <0x22000 0x1000>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 interrupt-parent = <&ipic>;
158 interrupts = <39 0x8>;
159 phy_type = "ulpi";
160 port1;
161 };
163 usb@23000 {
164 compatible = "fsl-usb2-dr";
165 reg = <0x23000 0x1000>;
166 #address-cells = <1>;
167 #size-cells = <0>;
168 interrupt-parent = <&ipic>;
169 interrupts = <38 0x8>;
170 dr_mode = "peripheral";
171 phy_type = "ulpi";
172 };
174 mdio@24520 {
175 #address-cells = <1>;
176 #size-cells = <0>;
177 compatible = "fsl,gianfar-mdio";
178 reg = <0x24520 0x20>;
180 /* Vitesse 8201 */
181 phy1c: ethernet-phy@1c {
182 interrupt-parent = <&ipic>;
183 interrupts = <18 0x8>;
184 reg = <0x1c>;
185 device_type = "ethernet-phy";
186 };
187 };
189 enet0: ethernet@24000 {
190 cell-index = <0>;
191 device_type = "network";
192 model = "TSEC";
193 compatible = "gianfar";
194 reg = <0x24000 0x1000>;
195 local-mac-address = [ 00 00 00 00 00 00 ];
196 interrupts = <32 0x8 33 0x8 34 0x8>;
197 interrupt-parent = <&ipic>;
198 phy-handle = <&phy1c>;
199 linux,network-index = <0>;
200 };
202 enet1: ethernet@25000 {
203 cell-index = <1>;
204 device_type = "network";
205 model = "TSEC";
206 compatible = "gianfar";
207 reg = <0x25000 0x1000>;
208 local-mac-address = [ 00 00 00 00 00 00 ];
209 interrupts = <35 0x8 36 0x8 37 0x8>;
210 interrupt-parent = <&ipic>;
211 /* Vitesse 7385 isn't on the MDIO bus */
212 fixed-link = <1 1 1000 0 0>;
213 linux,network-index = <1>;
214 };
216 serial0: serial@4500 {
217 cell-index = <0>;
218 device_type = "serial";
219 compatible = "ns16550";
220 reg = <0x4500 0x100>;
221 clock-frequency = <0>; // from bootloader
222 interrupts = <9 0x8>;
223 interrupt-parent = <&ipic>;
224 };
226 serial1: serial@4600 {
227 cell-index = <1>;
228 device_type = "serial";
229 compatible = "ns16550";
230 reg = <0x4600 0x100>;
231 clock-frequency = <0>; // from bootloader
232 interrupts = <10 0x8>;
233 interrupt-parent = <&ipic>;
234 };
236 crypto@30000 {
237 compatible = "fsl,sec2.0";
238 reg = <0x30000 0x10000>;
239 interrupts = <11 0x8>;
240 interrupt-parent = <&ipic>;
241 fsl,num-channels = <4>;
242 fsl,channel-fifo-len = <24>;
243 fsl,exec-units-mask = <0x7e>;
244 fsl,descriptor-types-mask = <0x01010ebf>;
245 };
247 ipic: pic@700 {
248 interrupt-controller;
249 #address-cells = <0>;
250 #interrupt-cells = <2>;
251 reg = <0x700 0x100>;
252 device_type = "ipic";
253 };
254 };
256 pci0: pci@e0008500 {
257 cell-index = <1>;
258 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
259 interrupt-map = <
260 /* IDSEL 0x10 - SATA */
261 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
262 >;
263 interrupt-parent = <&ipic>;
264 interrupts = <66 0x8>;
265 bus-range = <0x0 0x0>;
266 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
267 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
268 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
269 clock-frequency = <66666666>;
270 #interrupt-cells = <1>;
271 #size-cells = <2>;
272 #address-cells = <3>;
273 reg = <0xe0008500 0x100 /* internal registers */
274 0xe0008300 0x8>; /* config space access registers */
275 compatible = "fsl,mpc8349-pci";
276 device_type = "pci";
277 };
279 pci1: pci@e0008600 {
280 cell-index = <2>;
281 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
282 interrupt-map = <
283 /* IDSEL 0x0E - MiniPCI Slot */
284 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
286 /* IDSEL 0x0F - PCI Slot */
287 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
288 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
289 >;
290 interrupt-parent = <&ipic>;
291 interrupts = <67 0x8>;
292 bus-range = <0x0 0x0>;
293 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
294 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
295 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
296 clock-frequency = <66666666>;
297 #interrupt-cells = <1>;
298 #size-cells = <2>;
299 #address-cells = <3>;
300 reg = <0xe0008600 0x100 /* internal registers */
301 0xe0008380 0x8>; /* config space access registers */
302 compatible = "fsl,mpc8349-pci";
303 device_type = "pci";
304 };
306 localbus@e0005000 {
307 #address-cells = <2>;
308 #size-cells = <1>;
309 compatible = "fsl,mpc8349e-localbus",
310 "fsl,pq2pro-localbus";
311 reg = <0xe0005000 0xd8>;
312 ranges = <0x3 0x0 0xf0000000 0x210>;
314 pata@3,0 {
315 compatible = "fsl,mpc8349emitx-pata", "ata-generic";
316 reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
317 reg-shift = <1>;
318 pio-mode = <6>;
319 interrupts = <23 0x8>;
320 interrupt-parent = <&ipic>;
321 };
322 };
323 };