| blob | 3fe35208907b9cfe317d64642223fba9ed8467b5 |
1 /*
2 * TQM 8560 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
13 /dts-v1/;
15 / {
16 model = "tqc,tqm8560";
17 compatible = "tqc,tqm8560";
18 #address-cells = <1>;
19 #size-cells = <1>;
21 aliases {
22 ethernet0 = &enet0;
23 ethernet1 = &enet1;
24 ethernet2 = &enet2;
25 serial0 = &serial0;
26 serial1 = &serial1;
27 pci0 = &pci0;
28 };
30 cpus {
31 #address-cells = <1>;
32 #size-cells = <0>;
34 PowerPC,8560@0 {
35 device_type = "cpu";
36 reg = <0>;
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
40 i-cache-size = <32768>;
41 timebase-frequency = <0>;
42 bus-frequency = <0>;
43 clock-frequency = <0>;
44 next-level-cache = <&L2>;
45 };
46 };
48 memory {
49 device_type = "memory";
50 reg = <0x00000000 0x10000000>;
51 };
53 soc@e0000000 {
54 #address-cells = <1>;
55 #size-cells = <1>;
56 device_type = "soc";
57 ranges = <0x0 0xe0000000 0x100000>;
58 reg = <0xe0000000 0x200>;
59 bus-frequency = <0>;
60 compatible = "fsl,mpc8560-immr", "simple-bus";
62 memory-controller@2000 {
63 compatible = "fsl,8540-memory-controller";
64 reg = <0x2000 0x1000>;
65 interrupt-parent = <&mpic>;
66 interrupts = <18 2>;
67 };
69 L2: l2-cache-controller@20000 {
70 compatible = "fsl,8540-l2-cache-controller";
71 reg = <0x20000 0x1000>;
72 cache-line-size = <32>;
73 cache-size = <0x40000>; // L2, 256K
74 interrupt-parent = <&mpic>;
75 interrupts = <16 2>;
76 };
78 i2c@3000 {
79 #address-cells = <1>;
80 #size-cells = <0>;
81 cell-index = <0>;
82 compatible = "fsl-i2c";
83 reg = <0x3000 0x100>;
84 interrupts = <43 2>;
85 interrupt-parent = <&mpic>;
86 dfsrr;
88 rtc@68 {
89 compatible = "dallas,ds1337";
90 reg = <0x68>;
91 };
92 };
94 dma@21300 {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
98 reg = <0x21300 0x4>;
99 ranges = <0x0 0x21100 0x200>;
100 cell-index = <0>;
101 dma-channel@0 {
102 compatible = "fsl,mpc8560-dma-channel",
103 "fsl,eloplus-dma-channel";
104 reg = <0x0 0x80>;
105 cell-index = <0>;
106 interrupt-parent = <&mpic>;
107 interrupts = <20 2>;
108 };
109 dma-channel@80 {
110 compatible = "fsl,mpc8560-dma-channel",
111 "fsl,eloplus-dma-channel";
112 reg = <0x80 0x80>;
113 cell-index = <1>;
114 interrupt-parent = <&mpic>;
115 interrupts = <21 2>;
116 };
117 dma-channel@100 {
118 compatible = "fsl,mpc8560-dma-channel",
119 "fsl,eloplus-dma-channel";
120 reg = <0x100 0x80>;
121 cell-index = <2>;
122 interrupt-parent = <&mpic>;
123 interrupts = <22 2>;
124 };
125 dma-channel@180 {
126 compatible = "fsl,mpc8560-dma-channel",
127 "fsl,eloplus-dma-channel";
128 reg = <0x180 0x80>;
129 cell-index = <3>;
130 interrupt-parent = <&mpic>;
131 interrupts = <23 2>;
132 };
133 };
135 mdio@24520 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 compatible = "fsl,gianfar-mdio";
139 reg = <0x24520 0x20>;
141 phy1: ethernet-phy@1 {
142 interrupt-parent = <&mpic>;
143 interrupts = <8 1>;
144 reg = <1>;
145 device_type = "ethernet-phy";
146 };
147 phy2: ethernet-phy@2 {
148 interrupt-parent = <&mpic>;
149 interrupts = <8 1>;
150 reg = <2>;
151 device_type = "ethernet-phy";
152 };
153 phy3: ethernet-phy@3 {
154 interrupt-parent = <&mpic>;
155 interrupts = <8 1>;
156 reg = <3>;
157 device_type = "ethernet-phy";
158 };
159 };
161 enet0: ethernet@24000 {
162 cell-index = <0>;
163 device_type = "network";
164 model = "TSEC";
165 compatible = "gianfar";
166 reg = <0x24000 0x1000>;
167 local-mac-address = [ 00 00 00 00 00 00 ];
168 interrupts = <29 2 30 2 34 2>;
169 interrupt-parent = <&mpic>;
170 phy-handle = <&phy2>;
171 };
173 enet1: ethernet@25000 {
174 cell-index = <1>;
175 device_type = "network";
176 model = "TSEC";
177 compatible = "gianfar";
178 reg = <0x25000 0x1000>;
179 local-mac-address = [ 00 00 00 00 00 00 ];
180 interrupts = <35 2 36 2 40 2>;
181 interrupt-parent = <&mpic>;
182 phy-handle = <&phy1>;
183 };
185 mpic: pic@40000 {
186 interrupt-controller;
187 #address-cells = <0>;
188 #interrupt-cells = <2>;
189 reg = <0x40000 0x40000>;
190 device_type = "open-pic";
191 compatible = "chrp,open-pic";
192 };
194 cpm@919c0 {
195 #address-cells = <1>;
196 #size-cells = <1>;
197 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
198 reg = <0x919c0 0x30>;
199 ranges;
201 muram@80000 {
202 #address-cells = <1>;
203 #size-cells = <1>;
204 ranges = <0 0x80000 0x10000>;
206 data@0 {
207 compatible = "fsl,cpm-muram-data";
208 reg = <0 0x4000 0x9000 0x2000>;
209 };
210 };
212 brg@919f0 {
213 compatible = "fsl,mpc8560-brg",
214 "fsl,cpm2-brg",
215 "fsl,cpm-brg";
216 reg = <0x919f0 0x10 0x915f0 0x10>;
217 clock-frequency = <0>;
218 };
220 cpmpic: pic@90c00 {
221 interrupt-controller;
222 #address-cells = <0>;
223 #interrupt-cells = <2>;
224 interrupts = <46 2>;
225 interrupt-parent = <&mpic>;
226 reg = <0x90c00 0x80>;
227 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
228 };
230 serial0: serial@91a00 {
231 device_type = "serial";
232 compatible = "fsl,mpc8560-scc-uart",
233 "fsl,cpm2-scc-uart";
234 reg = <0x91a00 0x20 0x88000 0x100>;
235 fsl,cpm-brg = <1>;
236 fsl,cpm-command = <0x800000>;
237 current-speed = <115200>;
238 interrupts = <40 8>;
239 interrupt-parent = <&cpmpic>;
240 };
242 serial1: serial@91a20 {
243 device_type = "serial";
244 compatible = "fsl,mpc8560-scc-uart",
245 "fsl,cpm2-scc-uart";
246 reg = <0x91a20 0x20 0x88100 0x100>;
247 fsl,cpm-brg = <2>;
248 fsl,cpm-command = <0x4a00000>;
249 current-speed = <115200>;
250 interrupts = <41 8>;
251 interrupt-parent = <&cpmpic>;
252 };
254 enet2: ethernet@91340 {
255 device_type = "network";
256 compatible = "fsl,mpc8560-fcc-enet",
257 "fsl,cpm2-fcc-enet";
258 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
259 local-mac-address = [ 00 00 00 00 00 00 ];
260 fsl,cpm-command = <0x1a400300>;
261 interrupts = <34 8>;
262 interrupt-parent = <&cpmpic>;
263 phy-handle = <&phy3>;
264 };
265 };
266 };
268 localbus@e0005000 {
269 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
270 "simple-bus";
271 #address-cells = <2>;
272 #size-cells = <1>;
273 reg = <0xe0005000 0x100>; // BRx, ORx, etc.
275 ranges = <
276 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
277 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
278 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527)
279 >;
281 flash@1,0 {
282 #address-cells = <1>;
283 #size-cells = <1>;
284 compatible = "cfi-flash";
285 reg = <1 0x0 0x8000000>;
286 bank-width = <4>;
287 device-width = <1>;
289 partition@0 {
290 label = "kernel";
291 reg = <0x00000000 0x00200000>;
292 };
293 partition@200000 {
294 label = "root";
295 reg = <0x00200000 0x00300000>;
296 };
297 partition@500000 {
298 label = "user";
299 reg = <0x00500000 0x07a00000>;
300 };
301 partition@7f00000 {
302 label = "env1";
303 reg = <0x07f00000 0x00040000>;
304 };
305 partition@7f40000 {
306 label = "env2";
307 reg = <0x07f40000 0x00040000>;
308 };
309 partition@7f80000 {
310 label = "u-boot";
311 reg = <0x07f80000 0x00080000>;
312 read-only;
313 };
314 };
316 /* Note: CAN support needs be enabled in U-Boot */
317 can0@2,0 {
318 compatible = "intel,82527"; // Bosch CC770
319 reg = <2 0x0 0x100>;
320 interrupts = <4 0>;
321 interrupt-parent = <&mpic>;
322 };
324 can1@2,100 {
325 compatible = "intel,82527"; // Bosch CC770
326 reg = <2 0x100 0x100>;
327 interrupts = <4 0>;
328 interrupt-parent = <&mpic>;
329 };
330 };
332 pci0: pci@e0008000 {
333 cell-index = <0>;
334 #interrupt-cells = <1>;
335 #size-cells = <2>;
336 #address-cells = <3>;
337 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
338 device_type = "pci";
339 reg = <0xe0008000 0x1000>;
340 clock-frequency = <66666666>;
341 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
342 interrupt-map = <
343 /* IDSEL 28 */
344 0xe000 0 0 1 &mpic 2 1
345 0xe000 0 0 2 &mpic 3 1>;
347 interrupt-parent = <&mpic>;
348 interrupts = <24 2>;
349 bus-range = <0 0>;
350 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
351 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
352 };
353 };