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[cris-mirror.git] / arch / powerpc / include / asm / dma-mapping.h
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1 /*
2 * Copyright (C) 2004 IBM
4 * Implements the generic device dma API for powerpc.
5 * the pci and vio busses
6 */
7 #ifndef _ASM_DMA_MAPPING_H
8 #define _ASM_DMA_MAPPING_H
9 #ifdef __KERNEL__
11 #include <linux/types.h>
12 #include <linux/cache.h>
13 /* need struct page definitions */
14 #include <linux/mm.h>
15 #include <linux/scatterlist.h>
16 #include <linux/dma-attrs.h>
17 #include <asm/io.h>
19 #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
21 #ifdef CONFIG_NOT_COHERENT_CACHE
23 * DMA-consistent mapping functions for PowerPCs that don't support
24 * cache snooping. These allocate/free a region of uncached mapped
25 * memory space for use with DMA devices. Alternatively, you could
26 * allocate the space "normally" and use the cache management functions
27 * to ensure it is consistent.
29 extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
30 extern void __dma_free_coherent(size_t size, void *vaddr);
31 extern void __dma_sync(void *vaddr, size_t size, int direction);
32 extern void __dma_sync_page(struct page *page, unsigned long offset,
33 size_t size, int direction);
35 #else /* ! CONFIG_NOT_COHERENT_CACHE */
37 * Cache coherent cores.
40 #define __dma_alloc_coherent(gfp, size, handle) NULL
41 #define __dma_free_coherent(size, addr) ((void)0)
42 #define __dma_sync(addr, size, rw) ((void)0)
43 #define __dma_sync_page(pg, off, sz, rw) ((void)0)
45 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
47 static inline unsigned long device_to_mask(struct device *dev)
49 if (dev->dma_mask && *dev->dma_mask)
50 return *dev->dma_mask;
51 /* Assume devices without mask can take 32 bit addresses */
52 return 0xfffffffful;
56 * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
58 struct dma_mapping_ops {
59 void * (*alloc_coherent)(struct device *dev, size_t size,
60 dma_addr_t *dma_handle, gfp_t flag);
61 void (*free_coherent)(struct device *dev, size_t size,
62 void *vaddr, dma_addr_t dma_handle);
63 dma_addr_t (*map_single)(struct device *dev, void *ptr,
64 size_t size, enum dma_data_direction direction,
65 struct dma_attrs *attrs);
66 void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
67 size_t size, enum dma_data_direction direction,
68 struct dma_attrs *attrs);
69 int (*map_sg)(struct device *dev, struct scatterlist *sg,
70 int nents, enum dma_data_direction direction,
71 struct dma_attrs *attrs);
72 void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
73 int nents, enum dma_data_direction direction,
74 struct dma_attrs *attrs);
75 int (*dma_supported)(struct device *dev, u64 mask);
76 int (*set_dma_mask)(struct device *dev, u64 dma_mask);
77 dma_addr_t (*map_page)(struct device *dev, struct page *page,
78 unsigned long offset, size_t size,
79 enum dma_data_direction direction,
80 struct dma_attrs *attrs);
81 void (*unmap_page)(struct device *dev,
82 dma_addr_t dma_address, size_t size,
83 enum dma_data_direction direction,
84 struct dma_attrs *attrs);
88 * Available generic sets of operations
90 #ifdef CONFIG_PPC64
91 extern struct dma_mapping_ops dma_iommu_ops;
92 #endif
93 extern struct dma_mapping_ops dma_direct_ops;
95 static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
97 /* We don't handle the NULL dev case for ISA for now. We could
98 * do it via an out of line call but it is not needed for now. The
99 * only ISA DMA device we support is the floppy and we have a hack
100 * in the floppy driver directly to get a device for us.
103 if (unlikely(dev == NULL) || dev->archdata.dma_ops == NULL) {
104 #ifdef CONFIG_PPC64
105 return NULL;
106 #else
107 /* Use default on 32-bit if dma_ops is not set up */
108 /* TODO: Long term, we should fix drivers so that dev and
109 * archdata dma_ops are set up for all buses.
111 return &dma_direct_ops;
112 #endif
115 return dev->archdata.dma_ops;
118 static inline void set_dma_ops(struct device *dev, struct dma_mapping_ops *ops)
120 dev->archdata.dma_ops = ops;
123 static inline int dma_supported(struct device *dev, u64 mask)
125 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
127 if (unlikely(dma_ops == NULL))
128 return 0;
129 if (dma_ops->dma_supported == NULL)
130 return 1;
131 return dma_ops->dma_supported(dev, mask);
134 /* We have our own implementation of pci_set_dma_mask() */
135 #define HAVE_ARCH_PCI_SET_DMA_MASK
137 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
139 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
141 if (unlikely(dma_ops == NULL))
142 return -EIO;
143 if (dma_ops->set_dma_mask != NULL)
144 return dma_ops->set_dma_mask(dev, dma_mask);
145 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
146 return -EIO;
147 *dev->dma_mask = dma_mask;
148 return 0;
152 * TODO: map_/unmap_single will ideally go away, to be completely
153 * replaced by map/unmap_page. Until then, we allow dma_ops to have
154 * one or the other, or both by checking to see if the specific
155 * function requested exists; and if not, falling back on the other set.
157 static inline dma_addr_t dma_map_single_attrs(struct device *dev,
158 void *cpu_addr,
159 size_t size,
160 enum dma_data_direction direction,
161 struct dma_attrs *attrs)
163 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
165 BUG_ON(!dma_ops);
167 if (dma_ops->map_single)
168 return dma_ops->map_single(dev, cpu_addr, size, direction,
169 attrs);
171 return dma_ops->map_page(dev, virt_to_page(cpu_addr),
172 (unsigned long)cpu_addr % PAGE_SIZE, size,
173 direction, attrs);
176 static inline void dma_unmap_single_attrs(struct device *dev,
177 dma_addr_t dma_addr,
178 size_t size,
179 enum dma_data_direction direction,
180 struct dma_attrs *attrs)
182 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
184 BUG_ON(!dma_ops);
186 if (dma_ops->unmap_single) {
187 dma_ops->unmap_single(dev, dma_addr, size, direction, attrs);
188 return;
191 dma_ops->unmap_page(dev, dma_addr, size, direction, attrs);
194 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
195 struct page *page,
196 unsigned long offset, size_t size,
197 enum dma_data_direction direction,
198 struct dma_attrs *attrs)
200 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
202 BUG_ON(!dma_ops);
204 if (dma_ops->map_page)
205 return dma_ops->map_page(dev, page, offset, size, direction,
206 attrs);
208 return dma_ops->map_single(dev, page_address(page) + offset, size,
209 direction, attrs);
212 static inline void dma_unmap_page_attrs(struct device *dev,
213 dma_addr_t dma_address,
214 size_t size,
215 enum dma_data_direction direction,
216 struct dma_attrs *attrs)
218 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
220 BUG_ON(!dma_ops);
222 if (dma_ops->unmap_page) {
223 dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
224 return;
227 dma_ops->unmap_single(dev, dma_address, size, direction, attrs);
230 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
231 int nents, enum dma_data_direction direction,
232 struct dma_attrs *attrs)
234 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
236 BUG_ON(!dma_ops);
237 return dma_ops->map_sg(dev, sg, nents, direction, attrs);
240 static inline void dma_unmap_sg_attrs(struct device *dev,
241 struct scatterlist *sg,
242 int nhwentries,
243 enum dma_data_direction direction,
244 struct dma_attrs *attrs)
246 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
248 BUG_ON(!dma_ops);
249 dma_ops->unmap_sg(dev, sg, nhwentries, direction, attrs);
252 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
253 dma_addr_t *dma_handle, gfp_t flag)
255 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
257 BUG_ON(!dma_ops);
258 return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
261 static inline void dma_free_coherent(struct device *dev, size_t size,
262 void *cpu_addr, dma_addr_t dma_handle)
264 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
266 BUG_ON(!dma_ops);
267 dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
270 static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
271 size_t size,
272 enum dma_data_direction direction)
274 return dma_map_single_attrs(dev, cpu_addr, size, direction, NULL);
277 static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
278 size_t size,
279 enum dma_data_direction direction)
281 dma_unmap_single_attrs(dev, dma_addr, size, direction, NULL);
284 static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
285 unsigned long offset, size_t size,
286 enum dma_data_direction direction)
288 return dma_map_page_attrs(dev, page, offset, size, direction, NULL);
291 static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
292 size_t size,
293 enum dma_data_direction direction)
295 dma_unmap_page_attrs(dev, dma_address, size, direction, NULL);
298 static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
299 int nents, enum dma_data_direction direction)
301 return dma_map_sg_attrs(dev, sg, nents, direction, NULL);
304 static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
305 int nhwentries,
306 enum dma_data_direction direction)
308 dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
311 static inline void dma_sync_single_for_cpu(struct device *dev,
312 dma_addr_t dma_handle, size_t size,
313 enum dma_data_direction direction)
315 BUG_ON(direction == DMA_NONE);
316 __dma_sync(bus_to_virt(dma_handle), size, direction);
319 static inline void dma_sync_single_for_device(struct device *dev,
320 dma_addr_t dma_handle, size_t size,
321 enum dma_data_direction direction)
323 BUG_ON(direction == DMA_NONE);
324 __dma_sync(bus_to_virt(dma_handle), size, direction);
327 static inline void dma_sync_sg_for_cpu(struct device *dev,
328 struct scatterlist *sgl, int nents,
329 enum dma_data_direction direction)
331 struct scatterlist *sg;
332 int i;
334 BUG_ON(direction == DMA_NONE);
336 for_each_sg(sgl, sg, nents, i)
337 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
340 static inline void dma_sync_sg_for_device(struct device *dev,
341 struct scatterlist *sgl, int nents,
342 enum dma_data_direction direction)
344 struct scatterlist *sg;
345 int i;
347 BUG_ON(direction == DMA_NONE);
349 for_each_sg(sgl, sg, nents, i)
350 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
353 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
355 #ifdef CONFIG_PPC64
356 return (dma_addr == DMA_ERROR_CODE);
357 #else
358 return 0;
359 #endif
362 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
363 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
364 #ifdef CONFIG_NOT_COHERENT_CACHE
365 #define dma_is_consistent(d, h) (0)
366 #else
367 #define dma_is_consistent(d, h) (1)
368 #endif
370 static inline int dma_get_cache_alignment(void)
372 #ifdef CONFIG_PPC64
373 /* no easy way to get cache size on all processors, so return
374 * the maximum possible, to be safe */
375 return (1 << INTERNODE_CACHE_SHIFT);
376 #else
378 * Each processor family will define its own L1_CACHE_SHIFT,
379 * L1_CACHE_BYTES wraps to this, so this is always safe.
381 return L1_CACHE_BYTES;
382 #endif
385 static inline void dma_sync_single_range_for_cpu(struct device *dev,
386 dma_addr_t dma_handle, unsigned long offset, size_t size,
387 enum dma_data_direction direction)
389 /* just sync everything for now */
390 dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
393 static inline void dma_sync_single_range_for_device(struct device *dev,
394 dma_addr_t dma_handle, unsigned long offset, size_t size,
395 enum dma_data_direction direction)
397 /* just sync everything for now */
398 dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
401 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
402 enum dma_data_direction direction)
404 BUG_ON(direction == DMA_NONE);
405 __dma_sync(vaddr, size, (int)direction);
408 #endif /* __KERNEL__ */
409 #endif /* _ASM_DMA_MAPPING_H */