arch/sh/include/asm/dma.h

   1 /*
   2  * include/asm-sh/dma.h
   3  *
   4  * Copyright (C) 2003, 2004  Paul Mundt
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10 #ifndef __ASM_SH_DMA_H
  11 #define __ASM_SH_DMA_H
  12 #ifdef __KERNEL__
  13
  14 #include <linux/spinlock.h>
  15 #include <linux/wait.h>
  16 #include <linux/sched.h>
  17 #include <linux/sysdev.h>
  18 #include <cpu/dma.h>
  19
  20 /* The maximum address that we can perform a DMA transfer to on this platform */
  21 /* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any
  22    occurrence should be flagged as an error.  */
  23 /* But... */
  24 /* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */
  25 #define MAX_DMA_ADDRESS         (PAGE_OFFSET+0x10000000)
  26
  27 #ifdef CONFIG_NR_DMA_CHANNELS
  28 #  define MAX_DMA_CHANNELS      (CONFIG_NR_DMA_CHANNELS)
  29 #else
  30 #  define MAX_DMA_CHANNELS      (CONFIG_NR_ONCHIP_DMA_CHANNELS)
  31 #endif
  32
  33 /*
  34  * Read and write modes can mean drastically different things depending on the
  35  * channel configuration. Consult your DMAC documentation and module
  36  * implementation for further clues.
  37  */
  38 #define DMA_MODE_READ           0x00
  39 #define DMA_MODE_WRITE          0x01
  40 #define DMA_MODE_MASK           0x01
  41
  42 #define DMA_AUTOINIT            0x10
  43
  44 /*
  45  * DMAC (dma_info) flags
  46  */
  47 enum {
  48         DMAC_CHANNELS_CONFIGURED        = 0x01,
  49         DMAC_CHANNELS_TEI_CAPABLE       = 0x02, /* Transfer end interrupt */
  50 };
  51
  52 /*
  53  * DMA channel capabilities / flags
  54  */
  55 enum {
  56         DMA_CONFIGURED                  = 0x01,
  57
  58         /*
  59          * Transfer end interrupt, inherited from DMAC.
  60          * wait_queue used in dma_wait_for_completion.
  61          */
  62         DMA_TEI_CAPABLE                 = 0x02,
  63 };
  64
  65 extern spinlock_t dma_spin_lock;
  66
  67 struct dma_channel;
  68
  69 struct dma_ops {
  70         int (*request)(struct dma_channel *chan);
  71         void (*free)(struct dma_channel *chan);
  72
  73         int (*get_residue)(struct dma_channel *chan);
  74         int (*xfer)(struct dma_channel *chan);
  75         int (*configure)(struct dma_channel *chan, unsigned long flags);
  76         int (*extend)(struct dma_channel *chan, unsigned long op, void *param);
  77 };
  78
  79 struct dma_channel {
  80         char dev_id[16];                /* unique name per DMAC of channel */
  81
  82         unsigned int chan;              /* DMAC channel number */
  83         unsigned int vchan;             /* Virtual channel number */
  84
  85         unsigned int mode;
  86         unsigned int count;
  87
  88         unsigned long sar;
  89         unsigned long dar;
  90
  91         const char **caps;
  92
  93         unsigned long flags;
  94         atomic_t busy;
  95
  96         wait_queue_head_t wait_queue;
  97
  98         struct sys_device dev;
  99         void *priv_data;
 100 };
 101
 102 struct dma_info {
 103         struct platform_device *pdev;
 104
 105         const char *name;
 106         unsigned int nr_channels;
 107         unsigned long flags;
 108
 109         struct dma_ops *ops;
 110         struct dma_channel *channels;
 111
 112         struct list_head list;
 113         int first_channel_nr;
 114         int first_vchannel_nr;
 115 };
 116
 117 struct dma_chan_caps {
 118         int ch_num;
 119         const char **caplist;
 120 };
 121
 122 #define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
 123
 124 /* arch/sh/drivers/dma/dma-api.c */
 125 extern int dma_xfer(unsigned int chan, unsigned long from,
 126                     unsigned long to, size_t size, unsigned int mode);
 127
 128 #define dma_write(chan, from, to, size) \
 129         dma_xfer(chan, from, to, size, DMA_MODE_WRITE)
 130 #define dma_write_page(chan, from, to)  \
 131         dma_write(chan, from, to, PAGE_SIZE)
 132
 133 #define dma_read(chan, from, to, size)  \
 134         dma_xfer(chan, from, to, size, DMA_MODE_READ)
 135 #define dma_read_page(chan, from, to)   \
 136         dma_read(chan, from, to, PAGE_SIZE)
 137
 138 extern int request_dma_bycap(const char **dmac, const char **caps,
 139                              const char *dev_id);
 140 extern int request_dma(unsigned int chan, const char *dev_id);
 141 extern void free_dma(unsigned int chan);
 142 extern int get_dma_residue(unsigned int chan);
 143 extern struct dma_info *get_dma_info(unsigned int chan);
 144 extern struct dma_channel *get_dma_channel(unsigned int chan);
 145 extern void dma_wait_for_completion(unsigned int chan);
 146 extern void dma_configure_channel(unsigned int chan, unsigned long flags);
 147
 148 extern int register_dmac(struct dma_info *info);
 149 extern void unregister_dmac(struct dma_info *info);
 150 extern struct dma_info *get_dma_info_by_name(const char *dmac_name);
 151
 152 extern int dma_extend(unsigned int chan, unsigned long op, void *param);
 153 extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist);
 154
 155 /* arch/sh/drivers/dma/dma-sysfs.c */
 156 extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *);
 157 extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *);
 158
 159 #ifdef CONFIG_PCI
 160 extern int isa_dma_bridge_buggy;
 161 #else
 162 #define isa_dma_bridge_buggy    (0)
 163 #endif
 164
 165 #endif /* __KERNEL__ */
 166 #endif /* __ASM_SH_DMA_H */