1 #ifndef __ASM_SH_PROCESSOR_H
2 #define __ASM_SH_PROCESSOR_H
4 #include <asm/cpu-features.h>
5 #include <asm/segment.h>
10 * CPU type and hardware bug flags. Kept separately for each CPU.
12 * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
13 * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
14 * for parsing the subtype in get_cpu_subtype().
21 CPU_SH7203
, CPU_SH7206
, CPU_SH7263
, CPU_MXG
,
24 CPU_SH7705
, CPU_SH7706
, CPU_SH7707
,
25 CPU_SH7708
, CPU_SH7708S
, CPU_SH7708R
,
26 CPU_SH7709
, CPU_SH7709A
, CPU_SH7710
, CPU_SH7712
,
27 CPU_SH7720
, CPU_SH7721
, CPU_SH7729
,
30 CPU_SH7750
, CPU_SH7750S
, CPU_SH7750R
, CPU_SH7751
, CPU_SH7751R
,
31 CPU_SH7760
, CPU_SH4_202
, CPU_SH4_501
,
34 CPU_SH7763
, CPU_SH7770
, CPU_SH7780
, CPU_SH7781
, CPU_SH7785
,
38 CPU_SH7343
, CPU_SH7722
, CPU_SH7366
,
41 CPU_SH5_101
, CPU_SH5_103
,
48 * TLB information structure
50 * Defined for both I and D tlb, per-processor.
53 unsigned long long next
;
54 unsigned long long first
;
55 unsigned long long last
;
65 int cut_major
, cut_minor
;
66 unsigned long loops_per_jiffy
;
67 unsigned long asid_cache
;
69 struct cache_info icache
; /* Primary I-cache */
70 struct cache_info dcache
; /* Primary D-cache */
71 struct cache_info scache
; /* Secondary cache */
78 } __attribute__ ((aligned(L1_CACHE_BYTES
)));
80 extern struct sh_cpuinfo cpu_data
[];
81 #define boot_cpu_data cpu_data[0]
82 #define current_cpu_data cpu_data[smp_processor_id()]
83 #define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
86 struct seq_operations
;
88 extern struct pt_regs fake_swapper_regs
;
90 /* arch/sh/kernel/setup.c */
91 const char *get_cpu_subtype(struct sh_cpuinfo
*c
);
92 extern const struct seq_operations cpuinfo_op
;
94 #ifdef CONFIG_VSYSCALL
95 int vsyscall_init(void);
97 #define vsyscall_init() do { } while (0)
100 #endif /* __ASSEMBLY__ */
102 #ifdef CONFIG_SUPERH32
103 # include "processor_32.h"
105 # include "processor_64.h"
108 #endif /* __ASM_SH_PROCESSOR_H */