arch/sh/kernel/cpu/sh3/setup-sh7720.c

   1 /*
   2  * SH7720 Setup
   3  *
   4  *  Copyright (C) 2007  Markus Brunner, Mark Jonas
   5  *
   6  *  Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c:
   7  *
   8  *  Copyright (C) 2006  Paul Mundt
   9  *  Copyright (C) 2006  Jamie Lenehan
  10  *
  11  * This file is subject to the terms and conditions of the GNU General Public
  12  * License.  See the file "COPYING" in the main directory of this archive
  13  * for more details.
  14  */
  15 #include <linux/platform_device.h>
  16 #include <linux/init.h>
  17 #include <linux/serial.h>
  18 #include <linux/io.h>
  19 #include <linux/serial_sci.h>
  20 #include <asm/rtc.h>
  21
  22 static struct resource rtc_resources[] = {
  23         [0] = {
  24                 .start  = 0xa413fec0,
  25                 .end    = 0xa413fec0 + 0x28 - 1,
  26                 .flags  = IORESOURCE_IO,
  27         },
  28         [1] = {
  29                 /* Period IRQ */
  30                 .start  = 21,
  31                 .flags  = IORESOURCE_IRQ,
  32         },
  33         [2] = {
  34                 /* Carry IRQ */
  35                 .start  = 22,
  36                 .flags  = IORESOURCE_IRQ,
  37         },
  38         [3] = {
  39                 /* Alarm IRQ */
  40                 .start  = 20,
  41                 .flags  = IORESOURCE_IRQ,
  42         },
  43 };
  44
  45 static struct sh_rtc_platform_info rtc_info = {
  46         .capabilities   = RTC_CAP_4_DIGIT_YEAR,
  47 };
  48
  49 static struct platform_device rtc_device = {
  50         .name           = "sh-rtc",
  51         .id             = -1,
  52         .num_resources  = ARRAY_SIZE(rtc_resources),
  53         .resource       = rtc_resources,
  54         .dev            = {
  55                 .platform_data = &rtc_info,
  56         },
  57 };
  58
  59 static struct plat_sci_port sci_platform_data[] = {
  60         {
  61                 .mapbase        = 0xa4430000,
  62                 .flags          = UPF_BOOT_AUTOCONF,
  63                 .type           = PORT_SCIF,
  64                 .irqs           = { 80, 80, 80, 80 },
  65         }, {
  66                 .mapbase        = 0xa4438000,
  67                 .flags          = UPF_BOOT_AUTOCONF,
  68                 .type           = PORT_SCIF,
  69                 .irqs           = { 81, 81, 81, 81 },
  70         }, {
  71
  72                 .flags = 0,
  73         }
  74 };
  75
  76 static struct platform_device sci_device = {
  77         .name           = "sh-sci",
  78         .id             = -1,
  79         .dev            = {
  80                 .platform_data  = sci_platform_data,
  81         },
  82 };
  83
  84 static struct resource usb_ohci_resources[] = {
  85         [0] = {
  86                 .start  = 0xA4428000,
  87                 .end    = 0xA44280FF,
  88                 .flags  = IORESOURCE_MEM,
  89         },
  90         [1] = {
  91                 .start  = 67,
  92                 .end    = 67,
  93                 .flags  = IORESOURCE_IRQ,
  94         },
  95 };
  96
  97 static u64 usb_ohci_dma_mask = 0xffffffffUL;
  98 static struct platform_device usb_ohci_device = {
  99         .name           = "sh_ohci",
 100         .id             = -1,
 101         .dev = {
 102                 .dma_mask               = &usb_ohci_dma_mask,
 103                 .coherent_dma_mask      = 0xffffffff,
 104         },
 105         .num_resources  = ARRAY_SIZE(usb_ohci_resources),
 106         .resource       = usb_ohci_resources,
 107 };
 108
 109 static struct resource usbf_resources[] = {
 110         [0] = {
 111                 .name   = "sh_udc",
 112                 .start  = 0xA4420000,
 113                 .end    = 0xA44200FF,
 114                 .flags  = IORESOURCE_MEM,
 115         },
 116         [1] = {
 117                 .name   = "sh_udc",
 118                 .start  = 65,
 119                 .end    = 65,
 120                 .flags  = IORESOURCE_IRQ,
 121         },
 122 };
 123
 124 static struct platform_device usbf_device = {
 125         .name           = "sh_udc",
 126         .id             = -1,
 127         .dev = {
 128                 .dma_mask               = NULL,
 129                 .coherent_dma_mask      = 0xffffffff,
 130         },
 131         .num_resources  = ARRAY_SIZE(usbf_resources),
 132         .resource       = usbf_resources,
 133 };
 134
 135 static struct platform_device *sh7720_devices[] __initdata = {
 136         &rtc_device,
 137         &sci_device,
 138         &usb_ohci_device,
 139         &usbf_device,
 140 };
 141
 142 static int __init sh7720_devices_setup(void)
 143 {
 144         return platform_add_devices(sh7720_devices,
 145                                     ARRAY_SIZE(sh7720_devices));
 146 }
 147 __initcall(sh7720_devices_setup);
 148
 149 enum {
 150         UNUSED = 0,
 151
 152         /* interrupt sources */
 153         TMU0, TMU1, TMU2, RTC_ATI, RTC_PRI, RTC_CUI,
 154         WDT, REF_RCMI, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND,
 155         IRQ0, IRQ1, IRQ2, IRQ3,
 156         USBF_SPD, TMU_SUNI, IRQ5, IRQ4,
 157         DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3, LCDC, SSL,
 158         ADC, DMAC2_DEI4, DMAC2_DEI5, USBFI0, USBFI1, CMT,
 159         SCIF0, SCIF1,
 160         PINT07, PINT815, TPU0, TPU1, TPU2, TPU3, IIC,
 161         SIOF0, SIOF1, MMCI0, MMCI1, MMCI2, MMCI3, PCC,
 162         USBHI, AFEIF,
 163         H_UDI,
 164         /* interrupt groups */
 165         TMU, RTC, SIM, DMAC1, USBFI, DMAC2, USB, TPU, MMC,
 166 };
 167
 168 static struct intc_vect vectors[] __initdata = {
 169         /* IRQ0->5 are handled in setup-sh3.c */
 170         INTC_VECT(TMU0, 0x400),       INTC_VECT(TMU1, 0x420),
 171         INTC_VECT(TMU2, 0x440),       INTC_VECT(RTC_ATI, 0x480),
 172         INTC_VECT(RTC_PRI, 0x4a0),    INTC_VECT(RTC_CUI, 0x4c0),
 173         INTC_VECT(SIM_ERI, 0x4e0),    INTC_VECT(SIM_RXI, 0x500),
 174         INTC_VECT(SIM_TXI, 0x520),    INTC_VECT(SIM_TEND, 0x540),
 175         INTC_VECT(WDT, 0x560),        INTC_VECT(REF_RCMI, 0x580),
 176         /* H_UDI cannot be masked */  INTC_VECT(TMU_SUNI, 0x6c0),
 177         INTC_VECT(USBF_SPD, 0x6e0),   INTC_VECT(DMAC1_DEI0, 0x800),
 178         INTC_VECT(DMAC1_DEI1, 0x820), INTC_VECT(DMAC1_DEI2, 0x840),
 179         INTC_VECT(DMAC1_DEI3, 0x860), INTC_VECT(LCDC, 0x900),
 180 #if defined(CONFIG_CPU_SUBTYPE_SH7720)
 181         INTC_VECT(SSL, 0x980),
 182 #endif
 183         INTC_VECT(USBFI0, 0xa20),     INTC_VECT(USBFI1, 0xa40),
 184         INTC_VECT(USBHI, 0xa60),
 185         INTC_VECT(DMAC2_DEI4, 0xb80), INTC_VECT(DMAC2_DEI5, 0xba0),
 186         INTC_VECT(ADC, 0xbe0),        INTC_VECT(SCIF0, 0xc00),
 187         INTC_VECT(SCIF1, 0xc20),      INTC_VECT(PINT07, 0xc80),
 188         INTC_VECT(PINT815, 0xca0),    INTC_VECT(SIOF0, 0xd00),
 189         INTC_VECT(SIOF1, 0xd20),      INTC_VECT(TPU0, 0xd80),
 190         INTC_VECT(TPU1, 0xda0),       INTC_VECT(TPU2, 0xdc0),
 191         INTC_VECT(TPU3, 0xde0),       INTC_VECT(IIC, 0xe00),
 192         INTC_VECT(MMCI0, 0xe80),      INTC_VECT(MMCI1, 0xea0),
 193         INTC_VECT(MMCI2, 0xec0),      INTC_VECT(MMCI3, 0xee0),
 194         INTC_VECT(CMT, 0xf00),        INTC_VECT(PCC, 0xf60),
 195         INTC_VECT(AFEIF, 0xfe0),
 196 };
 197
 198 static struct intc_group groups[] __initdata = {
 199         INTC_GROUP(TMU, TMU0, TMU1, TMU2),
 200         INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
 201         INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND),
 202         INTC_GROUP(DMAC1, DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3),
 203         INTC_GROUP(USBFI, USBFI0, USBFI1),
 204         INTC_GROUP(DMAC2, DMAC2_DEI4, DMAC2_DEI5),
 205         INTC_GROUP(TPU, TPU0, TPU1, TPU2, TPU3),
 206         INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3),
 207 };
 208
 209 static struct intc_prio_reg prio_registers[] __initdata = {
 210         { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
 211         { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
 212         { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
 213         { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
 214         { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
 215         { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
 216         { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
 217         { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
 218         { 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } },
 219         { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } },
 220 };
 221
 222 static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
 223                 NULL, prio_registers, NULL);
 224
 225 void __init plat_irq_setup(void)
 226 {
 227         register_intc_controller(&intc_desc);
 228         plat_irq_setup_sh3();
 229 }