arch/sh/kernel/cpu/sh4a/setup-sh7722.c

   1 /*
   2  * SH7722 Setup
   3  *
   4  *  Copyright (C) 2006 - 2008  Paul Mundt
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10 #include <linux/platform_device.h>
  11 #include <linux/init.h>
  12 #include <linux/serial.h>
  13 #include <linux/serial_sci.h>
  14 #include <linux/mm.h>
  15 #include <linux/uio_driver.h>
  16 #include <asm/clock.h>
  17 #include <asm/mmzone.h>
  18
  19 static struct resource rtc_resources[] = {
  20         [0] = {
  21                 .start  = 0xa465fec0,
  22                 .end    = 0xa465fec0 + 0x58 - 1,
  23                 .flags  = IORESOURCE_IO,
  24         },
  25         [1] = {
  26                 /* Period IRQ */
  27                 .start  = 45,
  28                 .flags  = IORESOURCE_IRQ,
  29         },
  30         [2] = {
  31                 /* Carry IRQ */
  32                 .start  = 46,
  33                 .flags  = IORESOURCE_IRQ,
  34         },
  35         [3] = {
  36                 /* Alarm IRQ */
  37                 .start  = 44,
  38                 .flags  = IORESOURCE_IRQ,
  39         },
  40 };
  41
  42 static struct platform_device rtc_device = {
  43         .name           = "sh-rtc",
  44         .id             = -1,
  45         .num_resources  = ARRAY_SIZE(rtc_resources),
  46         .resource       = rtc_resources,
  47 };
  48
  49 static struct resource usbf_resources[] = {
  50         [0] = {
  51                 .name   = "m66592_udc",
  52                 .start  = 0x04480000,
  53                 .end    = 0x044800FF,
  54                 .flags  = IORESOURCE_MEM,
  55         },
  56         [1] = {
  57                 .start  = 65,
  58                 .end    = 65,
  59                 .flags  = IORESOURCE_IRQ,
  60         },
  61 };
  62
  63 static struct platform_device usbf_device = {
  64         .name           = "m66592_udc",
  65         .id             = -1,
  66         .dev = {
  67                 .dma_mask               = NULL,
  68                 .coherent_dma_mask      = 0xffffffff,
  69         },
  70         .num_resources  = ARRAY_SIZE(usbf_resources),
  71         .resource       = usbf_resources,
  72 };
  73
  74 static struct resource iic_resources[] = {
  75         [0] = {
  76                 .name   = "IIC",
  77                 .start  = 0x04470000,
  78                 .end    = 0x04470017,
  79                 .flags  = IORESOURCE_MEM,
  80         },
  81         [1] = {
  82                 .start  = 96,
  83                 .end    = 99,
  84                 .flags  = IORESOURCE_IRQ,
  85        },
  86 };
  87
  88 static struct platform_device iic_device = {
  89         .name           = "i2c-sh_mobile",
  90         .num_resources  = ARRAY_SIZE(iic_resources),
  91         .resource       = iic_resources,
  92 };
  93
  94 static struct uio_info vpu_platform_data = {
  95         .name = "VPU4",
  96         .version = "0",
  97         .irq = 60,
  98 };
  99
 100 static struct resource vpu_resources[] = {
 101         [0] = {
 102                 .name   = "VPU",
 103                 .start  = 0xfe900000,
 104                 .end    = 0xfe9022eb,
 105                 .flags  = IORESOURCE_MEM,
 106         },
 107         [1] = {
 108                 /* place holder for contiguous memory */
 109         },
 110 };
 111
 112 static struct platform_device vpu_device = {
 113         .name           = "uio_pdrv_genirq",
 114         .id             = 0,
 115         .dev = {
 116                 .platform_data  = &vpu_platform_data,
 117         },
 118         .resource       = vpu_resources,
 119         .num_resources  = ARRAY_SIZE(vpu_resources),
 120 };
 121
 122 static struct uio_info veu_platform_data = {
 123         .name = "VEU",
 124         .version = "0",
 125         .irq = 54,
 126 };
 127
 128 static struct resource veu_resources[] = {
 129         [0] = {
 130                 .name   = "VEU",
 131                 .start  = 0xfe920000,
 132                 .end    = 0xfe9200b7,
 133                 .flags  = IORESOURCE_MEM,
 134         },
 135         [1] = {
 136                 /* place holder for contiguous memory */
 137         },
 138 };
 139
 140 static struct platform_device veu_device = {
 141         .name           = "uio_pdrv_genirq",
 142         .id             = 1,
 143         .dev = {
 144                 .platform_data  = &veu_platform_data,
 145         },
 146         .resource       = veu_resources,
 147         .num_resources  = ARRAY_SIZE(veu_resources),
 148 };
 149
 150 static struct plat_sci_port sci_platform_data[] = {
 151         {
 152                 .mapbase        = 0xffe00000,
 153                 .flags          = UPF_BOOT_AUTOCONF,
 154                 .type           = PORT_SCIF,
 155                 .irqs           = { 80, 80, 80, 80 },
 156         },
 157         {
 158                 .mapbase        = 0xffe10000,
 159                 .flags          = UPF_BOOT_AUTOCONF,
 160                 .type           = PORT_SCIF,
 161                 .irqs           = { 81, 81, 81, 81 },
 162         },
 163         {
 164                 .mapbase        = 0xffe20000,
 165                 .flags          = UPF_BOOT_AUTOCONF,
 166                 .type           = PORT_SCIF,
 167                 .irqs           = { 82, 82, 82, 82 },
 168         },
 169         {
 170                 .flags = 0,
 171         }
 172 };
 173
 174 static struct platform_device sci_device = {
 175         .name           = "sh-sci",
 176         .id             = -1,
 177         .dev            = {
 178                 .platform_data  = sci_platform_data,
 179         },
 180 };
 181
 182 static struct platform_device *sh7722_devices[] __initdata = {
 183         &rtc_device,
 184         &usbf_device,
 185         &iic_device,
 186         &sci_device,
 187         &vpu_device,
 188         &veu_device,
 189 };
 190
 191 static int __init sh7722_devices_setup(void)
 192 {
 193         clk_always_enable("mstp031"); /* TLB */
 194         clk_always_enable("mstp030"); /* IC */
 195         clk_always_enable("mstp029"); /* OC */
 196         clk_always_enable("mstp028"); /* URAM */
 197         clk_always_enable("mstp026"); /* XYMEM */
 198         clk_always_enable("mstp022"); /* INTC */
 199         clk_always_enable("mstp020"); /* SuperHyway */
 200         clk_always_enable("mstp109"); /* I2C */
 201         clk_always_enable("mstp211"); /* USB */
 202         clk_always_enable("mstp202"); /* VEU */
 203         clk_always_enable("mstp201"); /* VPU */
 204
 205         platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
 206         platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
 207
 208         return platform_add_devices(sh7722_devices,
 209                                     ARRAY_SIZE(sh7722_devices));
 210 }
 211 __initcall(sh7722_devices_setup);
 212
 213 enum {
 214         UNUSED=0,
 215
 216         /* interrupt sources */
 217         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
 218         HUDI,
 219         SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI,
 220         RTC_ATI, RTC_PRI, RTC_CUI,
 221         DMAC0, DMAC1, DMAC2, DMAC3,
 222         VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU,
 223         VPU, TPU,
 224         USB_USBI0, USB_USBI1,
 225         DMAC4, DMAC5, DMAC_DADERR,
 226         KEYSC,
 227         SCIF0, SCIF1, SCIF2, SIOF0, SIOF1, SIO,
 228         FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
 229         I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI,
 230         SDHI0, SDHI1, SDHI2, SDHI3,
 231         CMT, TSIF, SIU, TWODG,
 232         TMU0, TMU1, TMU2,
 233         IRDA, JPU, LCDC,
 234
 235         /* interrupt groups */
 236         SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI,
 237 };
 238
 239 static struct intc_vect vectors[] __initdata = {
 240         INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
 241         INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
 242         INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
 243         INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0),
 244         INTC_VECT(SIM_ERI, 0x700), INTC_VECT(SIM_RXI, 0x720),
 245         INTC_VECT(SIM_TXI, 0x740), INTC_VECT(SIM_TEI, 0x760),
 246         INTC_VECT(RTC_ATI, 0x780), INTC_VECT(RTC_PRI, 0x7a0),
 247         INTC_VECT(RTC_CUI, 0x7c0),
 248         INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820),
 249         INTC_VECT(DMAC2, 0x840), INTC_VECT(DMAC3, 0x860),
 250         INTC_VECT(VIO_CEUI, 0x880), INTC_VECT(VIO_BEUI, 0x8a0),
 251         INTC_VECT(VIO_VEUI, 0x8c0), INTC_VECT(VOU, 0x8e0),
 252         INTC_VECT(VPU, 0x980), INTC_VECT(TPU, 0x9a0),
 253         INTC_VECT(USB_USBI0, 0xa20), INTC_VECT(USB_USBI1, 0xa40),
 254         INTC_VECT(DMAC4, 0xb80), INTC_VECT(DMAC5, 0xba0),
 255         INTC_VECT(DMAC_DADERR, 0xbc0), INTC_VECT(KEYSC, 0xbe0),
 256         INTC_VECT(SCIF0, 0xc00), INTC_VECT(SCIF1, 0xc20),
 257         INTC_VECT(SCIF2, 0xc40), INTC_VECT(SIOF0, 0xc80),
 258         INTC_VECT(SIOF1, 0xca0), INTC_VECT(SIO, 0xd00),
 259         INTC_VECT(FLCTL_FLSTEI, 0xd80), INTC_VECT(FLCTL_FLENDI, 0xda0),
 260         INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0),
 261         INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20),
 262         INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60),
 263         INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0),
 264         INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0),
 265         INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20),
 266         INTC_VECT(SIU, 0xf80), INTC_VECT(TWODG, 0xfa0),
 267         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
 268         INTC_VECT(TMU2, 0x440), INTC_VECT(IRDA, 0x480),
 269         INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580),
 270 };
 271
 272 static struct intc_group groups[] __initdata = {
 273         INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),
 274         INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
 275         INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3),
 276         INTC_GROUP(VIOVOU, VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU),
 277         INTC_GROUP(USB, USB_USBI0, USB_USBI1),
 278         INTC_GROUP(DMAC45, DMAC4, DMAC5, DMAC_DADERR),
 279         INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI,
 280                    FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
 281         INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI),
 282         INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
 283 };
 284
 285 static struct intc_mask_reg mask_registers[] __initdata = {
 286         { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
 287           { } },
 288         { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
 289           { VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } },
 290         { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
 291           { 0, 0, 0, VPU, } },
 292         { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */
 293           { SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, 0, 0, 0, IRDA } },
 294         { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */
 295           { 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } },
 296         { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */
 297           { KEYSC, DMAC_DADERR, DMAC5, DMAC4, 0, SCIF2, SCIF1, SCIF0 } },
 298         { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */
 299           { 0, 0, 0, SIO, 0, 0, SIOF1, SIOF0 } },
 300         { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */
 301           { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
 302             FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
 303         { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
 304           { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, TWODG, SIU } },
 305         { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
 306           { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } },
 307         { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
 308           { } },
 309         { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */
 310           { 0, RTC_CUI, RTC_PRI, RTC_ATI, 0, TPU, 0, TSIF } },
 311         { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */
 312           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 313 };
 314
 315 static struct intc_prio_reg prio_registers[] __initdata = {
 316         { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, IRDA } },
 317         { 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },
 318         { 0xa4080008, 0, 16, 4, /* IPRC */ { } },
 319         { 0xa408000c, 0, 16, 4, /* IPRD */ { } },
 320         { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, 0, VPU } },
 321         { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } },
 322         { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, SCIF2 } },
 323         { 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C } },
 324         { 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, RTC } },
 325         { 0xa4080024, 0, 16, 4, /* IPRJ */ { 0, 0, SIU } },
 326         { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, 0, 0, SDHI } },
 327         { 0xa408002c, 0, 16, 4, /* IPRL */ { TWODG, 0, TPU } },
 328         { 0xa4140010, 0, 32, 4, /* INTPRI00 */
 329           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 330 };
 331
 332 static struct intc_sense_reg sense_registers[] __initdata = {
 333         { 0xa414001c, 16, 2, /* ICR1 */
 334           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 335 };
 336
 337 static struct intc_mask_reg ack_registers[] __initdata = {
 338         { 0xa4140024, 0, 8, /* INTREQ00 */
 339           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 340 };
 341
 342 static DECLARE_INTC_DESC_ACK(intc_desc, "sh7722", vectors, groups,
 343                              mask_registers, prio_registers, sense_registers,
 344                              ack_registers);
 345
 346 void __init plat_irq_setup(void)
 347 {
 348         register_intc_controller(&intc_desc);
 349 }
 350
 351 void __init plat_mem_setup(void)
 352 {
 353         /* Register the URAM space as Node 1 */
 354         setup_bootmem_node(1, 0x055f0000, 0x05610000);
 355 }