1 # SPDX-License-Identifier: GPL-2.0
4 depends on BF542_std || BF542M
7 depends on BF544_std || BF544M
10 depends on BF547_std || BF547M
13 depends on BF548_std || BF548M
16 depends on BF549_std || BF549M
20 depends on (BF542M || BF544M || BF547M || BF548M || BF549M)
24 depends on (BF542 || BF544 || BF547 || BF548 || BF549)
28 source "arch/blackfin/mach-bf548/boards/Kconfig"
30 menu "BF548 Specific Configuration"
33 bool "DMA has priority over core for ext. accesses"
37 Treat any DEB1, DEB2 and DEB3 request as Urgent
39 config BF548_ATAPI_ALTERNATIVE_PORT
40 bool "BF548 ATAPI alternative port via GPIO"
42 BF548 ATAPI data and address PINs can be routed through
43 async address or GPIO port F and G. Select y to route it
47 prompt "UART2 DMA channel selection"
48 depends on SERIAL_BFIN_UART2
49 default UART2_DMA_RX_ON_DMA18
51 UART2 DMA channel selection
58 config UART2_DMA_RX_ON_DMA18
59 bool "UART2 DMA RX -> DMA18 TX -> DMA19"
61 UART2 DMA channel assignment
64 use SPORT2 default DMA channel
66 config UART2_DMA_RX_ON_DMA13
67 bool "UART2 DMA RX -> DMA13 TX -> DMA14"
69 UART2 DMA channel assignment
72 use EPPI1 EPPI2 default DMA channel
76 prompt "UART3 DMA channel selection"
77 depends on SERIAL_BFIN_UART3
78 default UART3_DMA_RX_ON_DMA20
80 UART3 DMA channel selection
87 config UART3_DMA_RX_ON_DMA20
88 bool "UART3 DMA RX -> DMA20 TX -> DMA21"
90 UART3 DMA channel assignment
93 use SPORT3 default DMA channel
95 config UART3_DMA_RX_ON_DMA15
96 bool "UART3 DMA RX -> DMA15 TX -> DMA16"
98 UART3 DMA channel assignment
101 use PIXC default DMA channel
105 comment "Interrupt Priority Assignment"
108 config IRQ_PLL_WAKEUP
117 config IRQ_SPORT0_ERR
120 config IRQ_SPORT1_ERR
183 config IRQ_SPORT2_ERR
186 config IRQ_SPORT3_ERR
294 config IRQ_HS_DMA_ERR
295 int "IRQ Handshake DMA Status"
344 default 7 if TICKSOURCE_GPTMR0
375 Enter the priority numbers between 7-13 ONLY. Others are Reserved.
376 This applies to all the above. It is not recommended to assign the
377 highest priority number 7 to UART or any other device.