1 * Rockchip SPI Controller
3 The Rockchip SPI controller is used to interface with various devices such as flash
4 and display controllers using the SPI communication interface.
8 - compatible: should be one of the following.
9 "rockchip,rv1108-spi" for rv1108 SoCs.
10 "rockchip,rk3036-spi" for rk3036 SoCS.
11 "rockchip,rk3066-spi" for rk3066 SoCs.
12 "rockchip,rk3188-spi" for rk3188 SoCs.
13 "rockchip,rk3228-spi" for rk3228 SoCS.
14 "rockchip,rk3288-spi" for rk3288 SoCs.
15 "rockchip,rk3368-spi" for rk3368 SoCs.
16 "rockchip,rk3399-spi" for rk3399 SoCs.
17 - reg: physical base address of the controller and length of memory mapped
19 - interrupts: The interrupt number to the cpu. The interrupt specifier format
20 depends on the interrupt controller.
21 - clocks: Must contain an entry for each entry in clock-names.
22 - clock-names: Shall be "spiclk" for the transfer-clock, and "apb_pclk" for
24 - #address-cells: should be 1.
25 - #size-cells: should be 0.
29 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
30 Documentation/devicetree/bindings/dma/dma.txt
31 - dma-names: DMA request names should include "tx" and "rx" if present.
32 - rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling
33 Rx data (may need to be fine tuned for high capacitance lines).
34 No delay (0) by default.
35 - pinctrl-names: Names for the pin configuration(s); may be "default" or
36 "sleep", where the "sleep" configuration may describe the state
37 the pins should be in during system suspend. See also
38 pinctrl/pinctrl-bindings.txt.
44 compatible = "rockchip,rk3066-spi";
45 reg = <0xff110000 0x1000>;
46 dmas = <&pdma1 11>, <&pdma1 12>;
47 dma-names = "tx", "rx";
48 rx-sample-delay-ns = <10>;
51 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
52 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
53 clock-names = "spiclk", "apb_pclk";
54 pinctrl-0 = <&spi1_pins>;
55 pinctrl-1 = <&spi1_sleep>;
56 pinctrl-names = "default", "sleep";