2 * linux/arch/arm/kernel/smp_scu.c
4 * Copyright (C) 2002 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/init.h>
14 #include <asm/smp_plat.h>
15 #include <asm/smp_scu.h>
16 #include <asm/cacheflush.h>
17 #include <asm/cputype.h>
20 #define SCU_ENABLE (1 << 0)
21 #define SCU_STANDBY_ENABLE (1 << 5)
22 #define SCU_CONFIG 0x04
23 #define SCU_CPU_STATUS 0x08
24 #define SCU_CPU_STATUS_MASK GENMASK(1, 0)
25 #define SCU_INVALIDATE 0x0c
26 #define SCU_FPGA_REVISION 0x10
30 * Get the number of CPU cores from the SCU configuration
32 unsigned int __init
scu_get_core_count(void __iomem
*scu_base
)
34 unsigned int ncores
= readl_relaxed(scu_base
+ SCU_CONFIG
);
35 return (ncores
& 0x03) + 1;
41 void scu_enable(void __iomem
*scu_base
)
45 #ifdef CONFIG_ARM_ERRATA_764369
47 if ((read_cpuid_id() & 0xff0ffff0) == 0x410fc090) {
48 scu_ctrl
= readl_relaxed(scu_base
+ 0x30);
50 writel_relaxed(scu_ctrl
| 0x1, scu_base
+ 0x30);
54 scu_ctrl
= readl_relaxed(scu_base
+ SCU_CTRL
);
55 /* already enabled? */
56 if (scu_ctrl
& SCU_ENABLE
)
59 scu_ctrl
|= SCU_ENABLE
;
61 /* Cortex-A9 earlier than r2p0 has no standby bit in SCU */
62 if ((read_cpuid_id() & 0xff0ffff0) == 0x410fc090 &&
63 (read_cpuid_id() & 0x00f0000f) >= 0x00200000)
64 scu_ctrl
|= SCU_STANDBY_ENABLE
;
66 writel_relaxed(scu_ctrl
, scu_base
+ SCU_CTRL
);
69 * Ensure that the data accessed by CPU0 before the SCU was
70 * initialised is visible to the other CPUs.
76 static int scu_set_power_mode_internal(void __iomem
*scu_base
,
77 unsigned int logical_cpu
,
81 int cpu
= MPIDR_AFFINITY_LEVEL(cpu_logical_map(logical_cpu
), 0);
83 if (mode
> 3 || mode
== 1 || cpu
> 3)
86 val
= readb_relaxed(scu_base
+ SCU_CPU_STATUS
+ cpu
);
87 val
&= ~SCU_CPU_STATUS_MASK
;
89 writeb_relaxed(val
, scu_base
+ SCU_CPU_STATUS
+ cpu
);
95 * Set the executing CPUs power mode as defined. This will be in
96 * preparation for it executing a WFI instruction.
98 * This function must be called with preemption disabled, and as it
99 * has the side effect of disabling coherency, caches must have been
100 * flushed. Interrupts must also have been disabled.
102 int scu_power_mode(void __iomem
*scu_base
, unsigned int mode
)
104 return scu_set_power_mode_internal(scu_base
, smp_processor_id(), mode
);
108 * Set the given (logical) CPU's power mode to SCU_PM_NORMAL.
110 int scu_cpu_power_enable(void __iomem
*scu_base
, unsigned int cpu
)
112 return scu_set_power_mode_internal(scu_base
, cpu
, SCU_PM_NORMAL
);
115 int scu_get_cpu_power_mode(void __iomem
*scu_base
, unsigned int logical_cpu
)
118 int cpu
= MPIDR_AFFINITY_LEVEL(cpu_logical_map(logical_cpu
), 0);
123 val
= readb_relaxed(scu_base
+ SCU_CPU_STATUS
+ cpu
);
124 val
&= SCU_CPU_STATUS_MASK
;