Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / arch / arm / mach-davinci / devices.c
blob3ae70f2909b0db1ecd7557b3014dd13c2ee9a93e
1 /*
2 * mach-davinci/devices.c
4 * DaVinci platform device setup/initialization
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/io.h>
16 #include <linux/reboot.h>
18 #include <mach/hardware.h>
19 #include <linux/platform_data/i2c-davinci.h>
20 #include <mach/irqs.h>
21 #include <mach/cputype.h>
22 #include <mach/mux.h>
23 #include <linux/platform_data/mmc-davinci.h>
24 #include <mach/time.h>
25 #include <linux/platform_data/edma.h>
28 #include "davinci.h"
29 #include "clock.h"
31 #define DAVINCI_I2C_BASE 0x01C21000
32 #define DAVINCI_ATA_BASE 0x01C66000
33 #define DAVINCI_MMCSD0_BASE 0x01E10000
34 #define DM355_MMCSD0_BASE 0x01E11000
35 #define DM355_MMCSD1_BASE 0x01E00000
36 #define DM365_MMCSD0_BASE 0x01D11000
37 #define DM365_MMCSD1_BASE 0x01D00000
39 void __iomem *davinci_sysmod_base;
41 void davinci_map_sysmod(void)
43 davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
44 0x800);
46 * Throw a bug since a lot of board initialization code depends
47 * on system module availability. ioremap() failing this early
48 * need careful looking into anyway.
50 BUG_ON(!davinci_sysmod_base);
53 static struct resource i2c_resources[] = {
55 .start = DAVINCI_I2C_BASE,
56 .end = DAVINCI_I2C_BASE + 0x40,
57 .flags = IORESOURCE_MEM,
60 .start = IRQ_I2C,
61 .flags = IORESOURCE_IRQ,
65 static struct platform_device davinci_i2c_device = {
66 .name = "i2c_davinci",
67 .id = 1,
68 .num_resources = ARRAY_SIZE(i2c_resources),
69 .resource = i2c_resources,
72 void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
74 if (cpu_is_davinci_dm644x())
75 davinci_cfg_reg(DM644X_I2C);
77 davinci_i2c_device.dev.platform_data = pdata;
78 (void) platform_device_register(&davinci_i2c_device);
81 static struct resource ide_resources[] = {
83 .start = DAVINCI_ATA_BASE,
84 .end = DAVINCI_ATA_BASE + 0x7ff,
85 .flags = IORESOURCE_MEM,
88 .start = IRQ_IDE,
89 .end = IRQ_IDE,
90 .flags = IORESOURCE_IRQ,
94 static u64 ide_dma_mask = DMA_BIT_MASK(32);
96 static struct platform_device ide_device = {
97 .name = "palm_bk3710",
98 .id = -1,
99 .resource = ide_resources,
100 .num_resources = ARRAY_SIZE(ide_resources),
101 .dev = {
102 .dma_mask = &ide_dma_mask,
103 .coherent_dma_mask = DMA_BIT_MASK(32),
107 void __init davinci_init_ide(void)
109 if (cpu_is_davinci_dm644x()) {
110 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
111 davinci_cfg_reg(DM644X_ATAEN);
112 davinci_cfg_reg(DM644X_HDIREN);
113 } else if (cpu_is_davinci_dm646x()) {
114 /* IRQ_DM646X_IDE is the same as IRQ_IDE */
115 davinci_cfg_reg(DM646X_ATAEN);
116 } else {
117 WARN_ON(1);
118 return;
121 platform_device_register(&ide_device);
124 #if IS_ENABLED(CONFIG_MMC_DAVINCI)
126 static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
128 static struct resource mmcsd0_resources[] = {
130 /* different on dm355 */
131 .start = DAVINCI_MMCSD0_BASE,
132 .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
133 .flags = IORESOURCE_MEM,
135 /* IRQs: MMC/SD, then SDIO */
137 .start = IRQ_MMCINT,
138 .flags = IORESOURCE_IRQ,
139 }, {
140 /* different on dm355 */
141 .start = IRQ_SDIOINT,
142 .flags = IORESOURCE_IRQ,
146 static struct platform_device davinci_mmcsd0_device = {
147 .name = "dm6441-mmc",
148 .id = 0,
149 .dev = {
150 .dma_mask = &mmcsd0_dma_mask,
151 .coherent_dma_mask = DMA_BIT_MASK(32),
153 .num_resources = ARRAY_SIZE(mmcsd0_resources),
154 .resource = mmcsd0_resources,
157 static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
159 static struct resource mmcsd1_resources[] = {
161 .start = DM355_MMCSD1_BASE,
162 .end = DM355_MMCSD1_BASE + SZ_4K - 1,
163 .flags = IORESOURCE_MEM,
165 /* IRQs: MMC/SD, then SDIO */
167 .start = IRQ_DM355_MMCINT1,
168 .flags = IORESOURCE_IRQ,
169 }, {
170 .start = IRQ_DM355_SDIOINT1,
171 .flags = IORESOURCE_IRQ,
175 static struct platform_device davinci_mmcsd1_device = {
176 .name = "dm6441-mmc",
177 .id = 1,
178 .dev = {
179 .dma_mask = &mmcsd1_dma_mask,
180 .coherent_dma_mask = DMA_BIT_MASK(32),
182 .num_resources = ARRAY_SIZE(mmcsd1_resources),
183 .resource = mmcsd1_resources,
187 void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
189 struct platform_device *pdev = NULL;
191 if (WARN_ON(cpu_is_davinci_dm646x()))
192 return;
194 /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
195 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
197 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
198 * not handled right here ...
200 switch (module) {
201 case 1:
202 if (cpu_is_davinci_dm355()) {
203 /* REVISIT we may not need all these pins if e.g. this
204 * is a hard-wired SDIO device...
206 davinci_cfg_reg(DM355_SD1_CMD);
207 davinci_cfg_reg(DM355_SD1_CLK);
208 davinci_cfg_reg(DM355_SD1_DATA0);
209 davinci_cfg_reg(DM355_SD1_DATA1);
210 davinci_cfg_reg(DM355_SD1_DATA2);
211 davinci_cfg_reg(DM355_SD1_DATA3);
212 } else if (cpu_is_davinci_dm365()) {
213 /* Configure pull down control */
214 unsigned v;
216 v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
217 __raw_writel(v & ~0xfc0,
218 DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
220 mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
221 mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
222 SZ_4K - 1;
223 mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
224 davinci_mmcsd1_device.name = "da830-mmc";
225 } else
226 break;
228 pdev = &davinci_mmcsd1_device;
229 break;
230 case 0:
231 if (cpu_is_davinci_dm355()) {
232 mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
233 mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
234 mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
236 /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
237 davinci_cfg_reg(DM355_MMCSD0);
239 /* enable RX EDMA */
240 davinci_cfg_reg(DM355_EVT26_MMC0_RX);
241 } else if (cpu_is_davinci_dm365()) {
242 mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
243 mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
244 SZ_4K - 1;
245 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
246 davinci_mmcsd0_device.name = "da830-mmc";
247 } else if (cpu_is_davinci_dm644x()) {
248 /* REVISIT: should this be in board-init code? */
249 /* Power-on 3.3V IO cells */
250 __raw_writel(0,
251 DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
252 /*Set up the pull regiter for MMC */
253 davinci_cfg_reg(DM644X_MSTK);
256 pdev = &davinci_mmcsd0_device;
257 break;
260 if (WARN_ON(!pdev))
261 return;
263 pdev->dev.platform_data = config;
264 platform_device_register(pdev);
267 #else
269 void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
273 #endif
275 /*-------------------------------------------------------------------------*/
277 static struct resource wdt_resources[] = {
279 .start = DAVINCI_WDOG_BASE,
280 .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
281 .flags = IORESOURCE_MEM,
285 struct platform_device davinci_wdt_device = {
286 .name = "davinci-wdt",
287 .id = -1,
288 .num_resources = ARRAY_SIZE(wdt_resources),
289 .resource = wdt_resources,
292 void davinci_restart(enum reboot_mode mode, const char *cmd)
294 davinci_watchdog_reset(&davinci_wdt_device);
297 int davinci_init_wdt(void)
299 return platform_device_register(&davinci_wdt_device);
302 static struct platform_device davinci_gpio_device = {
303 .name = "davinci_gpio",
304 .id = -1,
307 int davinci_gpio_register(struct resource *res, int size, void *pdata)
309 davinci_gpio_device.resource = res;
310 davinci_gpio_device.num_resources = size;
311 davinci_gpio_device.dev.platform_data = pdata;
312 return platform_device_register(&davinci_gpio_device);
315 /*-------------------------------------------------------------------------*/
317 /*-------------------------------------------------------------------------*/
319 struct davinci_timer_instance davinci_timer_instance[2] = {
321 .base = DAVINCI_TIMER0_BASE,
322 .bottom_irq = IRQ_TINT0_TINT12,
323 .top_irq = IRQ_TINT0_TINT34,
326 .base = DAVINCI_TIMER1_BASE,
327 .bottom_irq = IRQ_TINT1_TINT12,
328 .top_irq = IRQ_TINT1_TINT34,