arch/arm/mach-imx/mxc.h

   1 /*
   2  * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc.
   3  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  17  * MA 02110-1301, USA.
  18  */
  19
  20 #ifndef __ASM_ARCH_MXC_H__
  21 #define __ASM_ARCH_MXC_H__
  22
  23 #include <linux/types.h>
  24
  25 #ifndef __ASM_ARCH_MXC_HARDWARE_H__
  26 #error "Do not include directly."
  27 #endif
  28
  29 #define MXC_CPU_MX1             1
  30 #define MXC_CPU_MX21            21
  31 #define MXC_CPU_MX25            25
  32 #define MXC_CPU_MX27            27
  33 #define MXC_CPU_MX31            31
  34 #define MXC_CPU_MX35            35
  35 #define MXC_CPU_MX51            51
  36 #define MXC_CPU_MX53            53
  37 #define MXC_CPU_IMX6SL          0x60
  38 #define MXC_CPU_IMX6DL          0x61
  39 #define MXC_CPU_IMX6SX          0x62
  40 #define MXC_CPU_IMX6Q           0x63
  41 #define MXC_CPU_IMX6UL          0x64
  42 #define MXC_CPU_IMX6ULL         0x65
  43 #define MXC_CPU_IMX7D           0x72
  44
  45 #define IMX_DDR_TYPE_LPDDR2             1
  46
  47 #ifndef __ASSEMBLY__
  48 extern unsigned int __mxc_cpu_type;
  49
  50 #ifdef CONFIG_SOC_IMX6SL
  51 static inline bool cpu_is_imx6sl(void)
  52 {
  53         return __mxc_cpu_type == MXC_CPU_IMX6SL;
  54 }
  55 #else
  56 static inline bool cpu_is_imx6sl(void)
  57 {
  58         return false;
  59 }
  60 #endif
  61
  62 static inline bool cpu_is_imx6dl(void)
  63 {
  64         return __mxc_cpu_type == MXC_CPU_IMX6DL;
  65 }
  66
  67 static inline bool cpu_is_imx6sx(void)
  68 {
  69         return __mxc_cpu_type == MXC_CPU_IMX6SX;
  70 }
  71
  72 static inline bool cpu_is_imx6ul(void)
  73 {
  74         return __mxc_cpu_type == MXC_CPU_IMX6UL;
  75 }
  76
  77 static inline bool cpu_is_imx6ull(void)
  78 {
  79         return __mxc_cpu_type == MXC_CPU_IMX6ULL;
  80 }
  81
  82 static inline bool cpu_is_imx6q(void)
  83 {
  84         return __mxc_cpu_type == MXC_CPU_IMX6Q;
  85 }
  86
  87 static inline bool cpu_is_imx7d(void)
  88 {
  89         return __mxc_cpu_type == MXC_CPU_IMX7D;
  90 }
  91
  92 struct cpu_op {
  93         u32 cpu_rate;
  94 };
  95
  96 int tzic_enable_wake(void);
  97
  98 extern struct cpu_op *(*get_cpu_op)(int *op);
  99 #endif
 100
 101 #define imx_readl       readl_relaxed
 102 #define imx_readw       readw_relaxed
 103 #define imx_writel      writel_relaxed
 104 #define imx_writew      writew_relaxed
 105
 106 #endif /*  __ASM_ARCH_MXC_H__ */