arch/arm/mach-ixp4xx/include/mach/platform.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * arch/arm/mach-ixp4xx/include/mach/platform.h
   4  *
   5  * Constants and functions that are useful to IXP4xx platform-specific code
   6  * and device drivers.
   7  *
   8  * Copyright (C) 2004 MontaVista Software, Inc.
   9  */
  10
  11 #ifndef __ASM_ARCH_HARDWARE_H__
  12 #error "Do not include this directly, instead #include <mach/hardware.h>"
  13 #endif
  14
  15 #ifndef __ASSEMBLY__
  16
  17 #include <linux/reboot.h>
  18
  19 #include <asm/types.h>
  20
  21 #ifndef __ARMEB__
  22 #define REG_OFFSET      0
  23 #else
  24 #define REG_OFFSET      3
  25 #endif
  26
  27 /*
  28  * Expansion bus memory regions
  29  */
  30 #define IXP4XX_EXP_BUS_BASE_PHYS        (0x50000000)
  31
  32 /*
  33  * The expansion bus on the IXP4xx can be configured for either 16 or
  34  * 32MB windows and the CS offset for each region changes based on the
  35  * current configuration. This means that we cannot simply hardcode
  36  * each offset. ixp4xx_sys_init() looks at the expansion bus configuration
  37  * as setup by the bootloader to determine our window size.
  38  */
  39 extern unsigned long ixp4xx_exp_bus_size;
  40
  41 #define IXP4XX_EXP_BUS_BASE(region)\
  42                 (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size))
  43
  44 #define IXP4XX_EXP_BUS_END(region)\
  45                 (IXP4XX_EXP_BUS_BASE(region) + ixp4xx_exp_bus_size - 1)
  46
  47 /* Those macros can be used to adjust timing and configure
  48  * other features for each region.
  49  */
  50
  51 #define IXP4XX_EXP_BUS_RECOVERY_T(x)    (((x) & 0x0f) << 16)
  52 #define IXP4XX_EXP_BUS_HOLD_T(x)        (((x) & 0x03) << 20)
  53 #define IXP4XX_EXP_BUS_STROBE_T(x)      (((x) & 0x0f) << 22)
  54 #define IXP4XX_EXP_BUS_SETUP_T(x)       (((x) & 0x03) << 26)
  55 #define IXP4XX_EXP_BUS_ADDR_T(x)        (((x) & 0x03) << 28)
  56 #define IXP4XX_EXP_BUS_SIZE(x)          (((x) & 0x0f) << 10)
  57 #define IXP4XX_EXP_BUS_CYCLES(x)        (((x) & 0x03) << 14)
  58
  59 #define IXP4XX_EXP_BUS_CS_EN            (1L << 31)
  60 #define IXP4XX_EXP_BUS_BYTE_RD16        (1L << 6)
  61 #define IXP4XX_EXP_BUS_HRDY_POL         (1L << 5)
  62 #define IXP4XX_EXP_BUS_MUX_EN           (1L << 4)
  63 #define IXP4XX_EXP_BUS_SPLT_EN          (1L << 3)
  64 #define IXP4XX_EXP_BUS_WR_EN            (1L << 1)
  65 #define IXP4XX_EXP_BUS_BYTE_EN          (1L << 0)
  66
  67 #define IXP4XX_EXP_BUS_CYCLES_INTEL     0x00
  68 #define IXP4XX_EXP_BUS_CYCLES_MOTOROLA  0x01
  69 #define IXP4XX_EXP_BUS_CYCLES_HPI       0x02
  70
  71 #define IXP4XX_FLASH_WRITABLE   (0x2)
  72 #define IXP4XX_FLASH_DEFAULT    (0xbcd23c40)
  73 #define IXP4XX_FLASH_WRITE      (0xbcd23c42)
  74
  75 /*
  76  * Clock Speed Definitions.
  77  */
  78 #define IXP4XX_PERIPHERAL_BUS_CLOCK     (66) /* 66MHzi APB BUS   */
  79 #define IXP4XX_UART_XTAL                14745600
  80
  81 /*
  82  * This structure provide a means for the board setup code
  83  * to give information to th pata_ixp4xx driver. It is
  84  * passed as platform_data.
  85  */
  86 struct ixp4xx_pata_data {
  87         volatile u32    *cs0_cfg;
  88         volatile u32    *cs1_cfg;
  89         unsigned long   cs0_bits;
  90         unsigned long   cs1_bits;
  91         void __iomem    *cs0;
  92         void __iomem    *cs1;
  93 };
  94
  95 #define IXP4XX_ETH_NPEA         0x00
  96 #define IXP4XX_ETH_NPEB         0x10
  97 #define IXP4XX_ETH_NPEC         0x20
  98
  99 /* Information about built-in Ethernet MAC interfaces */
 100 struct eth_plat_info {
 101         u8 phy;         /* MII PHY ID, 0 - 31 */
 102         u8 rxq;         /* configurable, currently 0 - 31 only */
 103         u8 txreadyq;
 104         u8 hwaddr[6];
 105 };
 106
 107 /* Information about built-in HSS (synchronous serial) interfaces */
 108 struct hss_plat_info {
 109         int (*set_clock)(int port, unsigned int clock_type);
 110         int (*open)(int port, void *pdev,
 111                     void (*set_carrier_cb)(void *pdev, int carrier));
 112         void (*close)(int port, void *pdev);
 113         u8 txreadyq;
 114 };
 115
 116 /*
 117  * Frequency of clock used for primary clocksource
 118  */
 119 extern unsigned long ixp4xx_timer_freq;
 120
 121 /*
 122  * Functions used by platform-level setup code
 123  */
 124 extern void ixp4xx_map_io(void);
 125 extern void ixp4xx_init_early(void);
 126 extern void ixp4xx_init_irq(void);
 127 extern void ixp4xx_sys_init(void);
 128 extern void ixp4xx_timer_init(void);
 129 extern void ixp4xx_restart(enum reboot_mode, const char *);
 130 extern void ixp4xx_pci_preinit(void);
 131 struct pci_sys_data;
 132 extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
 133 extern struct pci_ops ixp4xx_ops;
 134
 135 #endif // __ASSEMBLY__
 136