Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / arch / arm / mach-s3c24xx / cpufreq-utils.c
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1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Copyright (c) 2009 Simtec Electronics
4 // http://armlinux.simtec.co.uk/
5 // Ben Dooks <ben@simtec.co.uk>
6 //
7 // S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442
9 #include <linux/kernel.h>
10 #include <linux/errno.h>
11 #include <linux/cpufreq.h>
12 #include <linux/io.h>
13 #include <linux/clk.h>
15 #include <mach/map.h>
16 #include <mach/regs-clock.h>
18 #include <plat/cpu-freq-core.h>
20 #include "regs-mem.h"
22 /**
23 * s3c2410_cpufreq_setrefresh - set SDRAM refresh value
24 * @cfg: The frequency configuration
26 * Set the SDRAM refresh value appropriately for the configured
27 * frequency.
29 void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
31 struct s3c_cpufreq_board *board = cfg->board;
32 unsigned long refresh;
33 unsigned long refval;
35 /* Reduce both the refresh time (in ns) and the frequency (in MHz)
36 * down to ensure that we do not overflow 32 bit numbers.
38 * This should work for HCLK up to 133MHz and refresh period up
39 * to 30usec.
42 refresh = (cfg->freq.hclk / 100) * (board->refresh / 10);
43 refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */
44 refresh = (1 << 11) + 1 - refresh;
46 s3c_freq_dbg("%s: refresh value %lu\n", __func__, refresh);
48 refval = __raw_readl(S3C2410_REFRESH);
49 refval &= ~((1 << 12) - 1);
50 refval |= refresh;
51 __raw_writel(refval, S3C2410_REFRESH);
54 /**
55 * s3c2410_set_fvco - set the PLL value
56 * @cfg: The frequency configuration
58 void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)
60 if (!IS_ERR(cfg->mpll))
61 clk_set_rate(cfg->mpll, cfg->pll.frequency);