arch/arm/mach-s3c24xx/mach-anubis.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Copyright 2003-2009 Simtec Electronics
   4 //      http://armlinux.simtec.co.uk/
   5 //      Ben Dooks <ben@simtec.co.uk>
   6
   7 #include <linux/kernel.h>
   8 #include <linux/types.h>
   9 #include <linux/interrupt.h>
  10 #include <linux/list.h>
  11 #include <linux/timer.h>
  12 #include <linux/init.h>
  13 #include <linux/gpio.h>
  14 #include <linux/serial_core.h>
  15 #include <linux/serial_s3c.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/ata_platform.h>
  18 #include <linux/i2c.h>
  19 #include <linux/io.h>
  20 #include <linux/sm501.h>
  21 #include <linux/sm501-regs.h>
  22
  23 #include <asm/mach/arch.h>
  24 #include <asm/mach/map.h>
  25 #include <asm/mach/irq.h>
  26
  27 #include <mach/hardware.h>
  28 #include <asm/irq.h>
  29 #include <asm/mach-types.h>
  30
  31 #include <mach/regs-gpio.h>
  32 #include <mach/regs-lcd.h>
  33 #include <mach/gpio-samsung.h>
  34 #include <linux/platform_data/mtd-nand-s3c2410.h>
  35 #include <linux/platform_data/i2c-s3c2410.h>
  36
  37 #include <linux/mtd/mtd.h>
  38 #include <linux/mtd/rawnand.h>
  39 #include <linux/mtd/nand_ecc.h>
  40 #include <linux/mtd/partitions.h>
  41
  42 #include <net/ax88796.h>
  43
  44 #include <plat/devs.h>
  45 #include <plat/cpu.h>
  46 #include <linux/platform_data/asoc-s3c24xx_simtec.h>
  47 #include <plat/samsung-time.h>
  48
  49 #include "anubis.h"
  50 #include "common.h"
  51 #include "simtec.h"
  52
  53 #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
  54
  55 static struct map_desc anubis_iodesc[] __initdata = {
  56   /* ISA IO areas */
  57
  58   {
  59         .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
  60         .pfn            = __phys_to_pfn(0x0),
  61         .length         = SZ_4M,
  62         .type           = MT_DEVICE,
  63   }, {
  64         .virtual        = (u32)S3C24XX_VA_ISA_WORD,
  65         .pfn            = __phys_to_pfn(0x0),
  66         .length         = SZ_4M,
  67         .type           = MT_DEVICE,
  68   },
  69
  70   /* we could possibly compress the next set down into a set of smaller tables
  71    * pagetables, but that would mean using an L2 section, and it still means
  72    * we cannot actually feed the same register to an LDR due to 16K spacing
  73    */
  74
  75   /* CPLD control registers */
  76
  77   {
  78         .virtual        = (u32)ANUBIS_VA_CTRL1,
  79         .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL1),
  80         .length         = SZ_4K,
  81         .type           = MT_DEVICE,
  82   }, {
  83         .virtual        = (u32)ANUBIS_VA_IDREG,
  84         .pfn            = __phys_to_pfn(ANUBIS_PA_IDREG),
  85         .length         = SZ_4K,
  86         .type           = MT_DEVICE,
  87   },
  88 };
  89
  90 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  91 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  92 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  93
  94 static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
  95         [0] = {
  96                 .hwport      = 0,
  97                 .flags       = 0,
  98                 .ucon        = UCON,
  99                 .ulcon       = ULCON,
 100                 .ufcon       = UFCON,
 101                 .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 102         },
 103         [1] = {
 104                 .hwport      = 2,
 105                 .flags       = 0,
 106                 .ucon        = UCON,
 107                 .ulcon       = ULCON,
 108                 .ufcon       = UFCON,
 109                 .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 110         },
 111 };
 112
 113 /* NAND Flash on Anubis board */
 114
 115 static int external_map[]   = { 2 };
 116 static int chip0_map[]      = { 0 };
 117 static int chip1_map[]      = { 1 };
 118
 119 static struct mtd_partition __initdata anubis_default_nand_part[] = {
 120         [0] = {
 121                 .name   = "Boot Agent",
 122                 .size   = SZ_16K,
 123                 .offset = 0,
 124         },
 125         [1] = {
 126                 .name   = "/boot",
 127                 .size   = SZ_4M - SZ_16K,
 128                 .offset = SZ_16K,
 129         },
 130         [2] = {
 131                 .name   = "user1",
 132                 .offset = SZ_4M,
 133                 .size   = SZ_32M - SZ_4M,
 134         },
 135         [3] = {
 136                 .name   = "user2",
 137                 .offset = SZ_32M,
 138                 .size   = MTDPART_SIZ_FULL,
 139         }
 140 };
 141
 142 static struct mtd_partition __initdata anubis_default_nand_part_large[] = {
 143         [0] = {
 144                 .name   = "Boot Agent",
 145                 .size   = SZ_128K,
 146                 .offset = 0,
 147         },
 148         [1] = {
 149                 .name   = "/boot",
 150                 .size   = SZ_4M - SZ_128K,
 151                 .offset = SZ_128K,
 152         },
 153         [2] = {
 154                 .name   = "user1",
 155                 .offset = SZ_4M,
 156                 .size   = SZ_32M - SZ_4M,
 157         },
 158         [3] = {
 159                 .name   = "user2",
 160                 .offset = SZ_32M,
 161                 .size   = MTDPART_SIZ_FULL,
 162         }
 163 };
 164
 165 /* the Anubis has 3 selectable slots for nand-flash, the two
 166  * on-board chip areas, as well as the external slot.
 167  *
 168  * Note, there is no current hot-plug support for the External
 169  * socket.
 170 */
 171
 172 static struct s3c2410_nand_set __initdata anubis_nand_sets[] = {
 173         [1] = {
 174                 .name           = "External",
 175                 .nr_chips       = 1,
 176                 .nr_map         = external_map,
 177                 .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 178                 .partitions     = anubis_default_nand_part,
 179         },
 180         [0] = {
 181                 .name           = "chip0",
 182                 .nr_chips       = 1,
 183                 .nr_map         = chip0_map,
 184                 .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 185                 .partitions     = anubis_default_nand_part,
 186         },
 187         [2] = {
 188                 .name           = "chip1",
 189                 .nr_chips       = 1,
 190                 .nr_map         = chip1_map,
 191                 .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 192                 .partitions     = anubis_default_nand_part,
 193         },
 194 };
 195
 196 static void anubis_nand_select(struct s3c2410_nand_set *set, int slot)
 197 {
 198         unsigned int tmp;
 199
 200         slot = set->nr_map[slot] & 3;
 201
 202         pr_debug("anubis_nand: selecting slot %d (set %p,%p)\n",
 203                  slot, set, set->nr_map);
 204
 205         tmp = __raw_readb(ANUBIS_VA_CTRL1);
 206         tmp &= ~ANUBIS_CTRL1_NANDSEL;
 207         tmp |= slot;
 208
 209         pr_debug("anubis_nand: ctrl1 now %02x\n", tmp);
 210
 211         __raw_writeb(tmp, ANUBIS_VA_CTRL1);
 212 }
 213
 214 static struct s3c2410_platform_nand __initdata anubis_nand_info = {
 215         .tacls          = 25,
 216         .twrph0         = 55,
 217         .twrph1         = 40,
 218         .nr_sets        = ARRAY_SIZE(anubis_nand_sets),
 219         .sets           = anubis_nand_sets,
 220         .select_chip    = anubis_nand_select,
 221         .ecc_mode       = NAND_ECC_SOFT,
 222 };
 223
 224 /* IDE channels */
 225
 226 static struct pata_platform_info anubis_ide_platdata = {
 227         .ioport_shift   = 5,
 228 };
 229
 230 static struct resource anubis_ide0_resource[] = {
 231         [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32),
 232         [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32),
 233         [3] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0),
 234 };
 235
 236 static struct platform_device anubis_device_ide0 = {
 237         .name           = "pata_platform",
 238         .id             = 0,
 239         .num_resources  = ARRAY_SIZE(anubis_ide0_resource),
 240         .resource       = anubis_ide0_resource,
 241         .dev    = {
 242                 .platform_data = &anubis_ide_platdata,
 243                 .coherent_dma_mask = ~0,
 244         },
 245 };
 246
 247 static struct resource anubis_ide1_resource[] = {
 248         [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32),
 249         [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32),
 250         [2] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0),
 251 };
 252
 253 static struct platform_device anubis_device_ide1 = {
 254         .name           = "pata_platform",
 255         .id             = 1,
 256         .num_resources  = ARRAY_SIZE(anubis_ide1_resource),
 257         .resource       = anubis_ide1_resource,
 258         .dev    = {
 259                 .platform_data = &anubis_ide_platdata,
 260                 .coherent_dma_mask = ~0,
 261         },
 262 };
 263
 264 /* Asix AX88796 10/100 ethernet controller */
 265
 266 static struct ax_plat_data anubis_asix_platdata = {
 267         .flags          = AXFLG_MAC_FROMDEV,
 268         .wordlength     = 2,
 269         .dcr_val        = 0x48,
 270         .rcr_val        = 0x40,
 271 };
 272
 273 static struct resource anubis_asix_resource[] = {
 274         [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20),
 275         [1] = DEFINE_RES_IRQ(ANUBIS_IRQ_ASIX),
 276 };
 277
 278 static struct platform_device anubis_device_asix = {
 279         .name           = "ax88796",
 280         .id             = 0,
 281         .num_resources  = ARRAY_SIZE(anubis_asix_resource),
 282         .resource       = anubis_asix_resource,
 283         .dev            = {
 284                 .platform_data = &anubis_asix_platdata,
 285         }
 286 };
 287
 288 /* SM501 */
 289
 290 static struct resource anubis_sm501_resource[] = {
 291         [0] = DEFINE_RES_MEM(S3C2410_CS2, SZ_8M),
 292         [1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M),
 293         [2] = DEFINE_RES_IRQ(IRQ_EINT0),
 294 };
 295
 296 static struct sm501_initdata anubis_sm501_initdata = {
 297         .gpio_high      = {
 298                 .set    = 0x3F000000,           /* 24bit panel */
 299                 .mask   = 0x0,
 300         },
 301         .misc_timing    = {
 302                 .set    = 0x010100,             /* SDRAM timing */
 303                 .mask   = 0x1F1F00,
 304         },
 305         .misc_control   = {
 306                 .set    = SM501_MISC_PNL_24BIT,
 307                 .mask   = 0,
 308         },
 309
 310         .devices        = SM501_USE_GPIO,
 311
 312         /* set the SDRAM and bus clocks */
 313         .mclk           = 72 * MHZ,
 314         .m1xclk         = 144 * MHZ,
 315 };
 316
 317 static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = {
 318         [0] = {
 319                 .bus_num        = 1,
 320                 .pin_scl        = 44,
 321                 .pin_sda        = 45,
 322         },
 323         [1] = {
 324                 .bus_num        = 2,
 325                 .pin_scl        = 40,
 326                 .pin_sda        = 41,
 327         },
 328 };
 329
 330 static struct sm501_platdata anubis_sm501_platdata = {
 331         .init           = &anubis_sm501_initdata,
 332         .gpio_base      = -1,
 333         .gpio_i2c       = anubis_sm501_gpio_i2c,
 334         .gpio_i2c_nr    = ARRAY_SIZE(anubis_sm501_gpio_i2c),
 335 };
 336
 337 static struct platform_device anubis_device_sm501 = {
 338         .name           = "sm501",
 339         .id             = 0,
 340         .num_resources  = ARRAY_SIZE(anubis_sm501_resource),
 341         .resource       = anubis_sm501_resource,
 342         .dev            = {
 343                 .platform_data = &anubis_sm501_platdata,
 344         },
 345 };
 346
 347 /* Standard Anubis devices */
 348
 349 static struct platform_device *anubis_devices[] __initdata = {
 350         &s3c2410_device_dclk,
 351         &s3c_device_ohci,
 352         &s3c_device_wdt,
 353         &s3c_device_adc,
 354         &s3c_device_i2c0,
 355         &s3c_device_rtc,
 356         &s3c_device_nand,
 357         &anubis_device_ide0,
 358         &anubis_device_ide1,
 359         &anubis_device_asix,
 360         &anubis_device_sm501,
 361 };
 362
 363 /* I2C devices. */
 364
 365 static struct i2c_board_info anubis_i2c_devs[] __initdata = {
 366         {
 367                 I2C_BOARD_INFO("tps65011", 0x48),
 368                 .irq    = IRQ_EINT20,
 369         }
 370 };
 371
 372 /* Audio setup */
 373 static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = {
 374         .have_mic       = 1,
 375         .have_lout      = 1,
 376         .output_cdclk   = 1,
 377         .use_mpllin     = 1,
 378         .amp_gpio       = S3C2410_GPB(2),
 379         .amp_gain[0]    = S3C2410_GPD(10),
 380         .amp_gain[1]    = S3C2410_GPD(11),
 381 };
 382
 383 static void __init anubis_map_io(void)
 384 {
 385         s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc));
 386         s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs));
 387         samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 388
 389         /* check for the newer revision boards with large page nand */
 390
 391         if ((__raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK) >= 4) {
 392                 printk(KERN_INFO "ANUBIS-B detected (revision %d)\n",
 393                        __raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK);
 394                 anubis_nand_sets[0].partitions = anubis_default_nand_part_large;
 395                 anubis_nand_sets[0].nr_partitions = ARRAY_SIZE(anubis_default_nand_part_large);
 396         } else {
 397                 /* ensure that the GPIO is setup */
 398                 gpio_request_one(S3C2410_GPA(0), GPIOF_OUT_INIT_HIGH, NULL);
 399                 gpio_free(S3C2410_GPA(0));
 400         }
 401 }
 402
 403 static void __init anubis_init_time(void)
 404 {
 405         s3c2440_init_clocks(12000000);
 406         samsung_timer_init();
 407 }
 408
 409 static void __init anubis_init(void)
 410 {
 411         s3c_i2c0_set_platdata(NULL);
 412         s3c_nand_set_platdata(&anubis_nand_info);
 413         simtec_audio_add(NULL, false, &anubis_audio);
 414
 415         platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices));
 416
 417         i2c_register_board_info(0, anubis_i2c_devs,
 418                                 ARRAY_SIZE(anubis_i2c_devs));
 419 }
 420
 421
 422 MACHINE_START(ANUBIS, "Simtec-Anubis")
 423         /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
 424         .atag_offset    = 0x100,
 425         .map_io         = anubis_map_io,
 426         .init_machine   = anubis_init,
 427         .init_irq       = s3c2440_init_irq,
 428         .init_time      = anubis_init_time,
 429 MACHINE_END