1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/input/linux-event-codes.h>
6 #include "tegra186-p3310.dtsi"
9 model = "NVIDIA Tegra186 P2771-0000 Development Board";
10 compatible = "nvidia,p2771-0000", "nvidia,tegra186";
14 compatible = "ti,ina3221";
19 compatible = "ti,ina3221";
24 compatible = "ti,tca9539";
27 interrupt-parent = <&gpio>;
28 interrupts = <TEGRA_MAIN_GPIO(Y, 0) GPIO_ACTIVE_LOW>;
35 compatible = "ti,tca9539";
38 interrupt-parent = <&gpio>;
39 interrupts = <TEGRA_MAIN_GPIO(Y, 6) GPIO_ACTIVE_LOW>;
50 vmmc-supply = <&vdd_sd>;
56 dvdd-pex-supply = <&vdd_pex>;
57 hvdd-pex-pll-supply = <&vdd_1v8>;
58 hvdd-pex-supply = <&vdd_1v8>;
59 vddio-pexctl-aud-supply = <&vdd_1v8>;
62 nvidia,num-lanes = <4>;
67 nvidia,num-lanes = <0>;
72 nvidia,num-lanes = <1>;
84 display-hub@15200000 {
95 nvidia,dpaux = <&dpaux1>;
101 avdd-io-supply = <&vdd_hdmi_1v05>;
102 vdd-pll-supply = <&vdd_1v8_ap>;
103 hdmi-supply = <&vdd_hdmi>;
105 nvidia,ddc-i2c-bus = <&ddc>;
106 nvidia,hpd-gpio = <&gpio TEGRA_MAIN_GPIO(P, 1) GPIO_ACTIVE_LOW>;
115 compatible = "gpio-keys";
119 gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 0)
121 linux,input-type = <EV_KEY>;
122 linux,code = <KEY_POWER>;
123 debounce-interval = <10>;
129 gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 1)
131 linux,input-type = <EV_KEY>;
132 linux,code = <KEY_VOLUMEUP>;
133 debounce-interval = <10>;
137 label = "Volume Down";
138 gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 2)
140 linux,input-type = <EV_KEY>;
141 linux,code = <KEY_VOLUMEDOWN>;
142 debounce-interval = <10>;
147 vdd_sd: regulator@100 {
148 compatible = "regulator-fixed";
151 regulator-name = "SD_CARD_SW_PWR";
152 regulator-min-microvolt = <3300000>;
153 regulator-max-microvolt = <3300000>;
155 gpio = <&gpio TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
158 vin-supply = <&vdd_3v3_sys>;
161 vdd_hdmi: regulator@101 {
162 compatible = "regulator-fixed";
165 regulator-name = "VDD_HDMI_5V0";
166 regulator-min-microvolt = <5000000>;
167 regulator-max-microvolt = <5000000>;
169 gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
172 vin-supply = <&vdd_5v0_sys>;