| blob | c5192d513d7dcf4b2af7e8cc95ce2b1e0114f2c7 |
1 /*
2 * Device Tree Source for the r8a7796 SoC
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
11 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a7796-sysc.h>
15 #define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4
17 / {
18 compatible = "renesas,r8a7796";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
30 i2c7 = &i2c_dvfs;
31 };
33 /*
34 * The external audio clocks are configured as 0 Hz fixed frequency
35 * clocks by default.
36 * Boards that provide audio clocks should override them.
37 */
38 audio_clk_a: audio_clk_a {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
42 };
44 audio_clk_b: audio_clk_b {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <0>;
48 };
50 audio_clk_c: audio_clk_c {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
56 /* External CAN clock - to be overridden by boards that provide it */
57 can_clk: can {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
61 };
63 cpus {
64 #address-cells = <1>;
65 #size-cells = <0>;
67 a57_0: cpu@0 {
68 compatible = "arm,cortex-a57", "arm,armv8";
69 reg = <0x0>;
70 device_type = "cpu";
71 power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
72 next-level-cache = <&L2_CA57>;
73 enable-method = "psci";
74 };
76 a57_1: cpu@1 {
77 compatible = "arm,cortex-a57","arm,armv8";
78 reg = <0x1>;
79 device_type = "cpu";
80 power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
81 next-level-cache = <&L2_CA57>;
82 enable-method = "psci";
83 };
85 a53_0: cpu@100 {
86 compatible = "arm,cortex-a53", "arm,armv8";
87 reg = <0x100>;
88 device_type = "cpu";
89 power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
90 next-level-cache = <&L2_CA53>;
91 enable-method = "psci";
92 };
94 a53_1: cpu@101 {
95 compatible = "arm,cortex-a53","arm,armv8";
96 reg = <0x101>;
97 device_type = "cpu";
98 power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
99 next-level-cache = <&L2_CA53>;
100 enable-method = "psci";
101 };
103 a53_2: cpu@102 {
104 compatible = "arm,cortex-a53","arm,armv8";
105 reg = <0x102>;
106 device_type = "cpu";
107 power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
108 next-level-cache = <&L2_CA53>;
109 enable-method = "psci";
110 };
112 a53_3: cpu@103 {
113 compatible = "arm,cortex-a53","arm,armv8";
114 reg = <0x103>;
115 device_type = "cpu";
116 power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
117 next-level-cache = <&L2_CA53>;
118 enable-method = "psci";
119 };
121 L2_CA57: cache-controller-0 {
122 compatible = "cache";
123 power-domains = <&sysc R8A7796_PD_CA57_SCU>;
124 cache-unified;
125 cache-level = <2>;
126 };
128 L2_CA53: cache-controller-1 {
129 compatible = "cache";
130 power-domains = <&sysc R8A7796_PD_CA53_SCU>;
131 cache-unified;
132 cache-level = <2>;
133 };
134 };
136 extal_clk: extal {
137 compatible = "fixed-clock";
138 #clock-cells = <0>;
139 /* This value must be overridden by the board */
140 clock-frequency = <0>;
141 };
143 extalr_clk: extalr {
144 compatible = "fixed-clock";
145 #clock-cells = <0>;
146 /* This value must be overridden by the board */
147 clock-frequency = <0>;
148 };
150 /* External PCIe clock - can be overridden by the board */
151 pcie_bus_clk: pcie_bus {
152 compatible = "fixed-clock";
153 #clock-cells = <0>;
154 clock-frequency = <0>;
155 };
157 pmu_a57 {
158 compatible = "arm,cortex-a57-pmu";
159 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
160 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
161 interrupt-affinity = <&a57_0>, <&a57_1>;
162 };
164 pmu_a53 {
165 compatible = "arm,cortex-a53-pmu";
166 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
167 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
168 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
169 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
170 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
171 };
173 psci {
174 compatible = "arm,psci-1.0", "arm,psci-0.2";
175 method = "smc";
176 };
178 /* External SCIF clock - to be overridden by boards that provide it */
179 scif_clk: scif {
180 compatible = "fixed-clock";
181 #clock-cells = <0>;
182 clock-frequency = <0>;
183 };
185 soc {
186 compatible = "simple-bus";
187 interrupt-parent = <&gic>;
188 #address-cells = <2>;
189 #size-cells = <2>;
190 ranges;
192 gic: interrupt-controller@f1010000 {
193 compatible = "arm,gic-400";
194 #interrupt-cells = <3>;
195 #address-cells = <0>;
196 interrupt-controller;
197 reg = <0x0 0xf1010000 0 0x1000>,
198 <0x0 0xf1020000 0 0x20000>,
199 <0x0 0xf1040000 0 0x20000>,
200 <0x0 0xf1060000 0 0x20000>;
201 interrupts = <GIC_PPI 9
202 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
203 clocks = <&cpg CPG_MOD 408>;
204 clock-names = "clk";
205 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
206 resets = <&cpg 408>;
207 };
209 wdt0: watchdog@e6020000 {
210 compatible = "renesas,r8a7796-wdt",
211 "renesas,rcar-gen3-wdt";
212 reg = <0 0xe6020000 0 0x0c>;
213 clocks = <&cpg CPG_MOD 402>;
214 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
215 resets = <&cpg 402>;
216 status = "disabled";
217 };
219 gpio0: gpio@e6050000 {
220 compatible = "renesas,gpio-r8a7796",
221 "renesas,rcar-gen3-gpio";
222 reg = <0 0xe6050000 0 0x50>;
223 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
224 #gpio-cells = <2>;
225 gpio-controller;
226 gpio-ranges = <&pfc 0 0 16>;
227 #interrupt-cells = <2>;
228 interrupt-controller;
229 clocks = <&cpg CPG_MOD 912>;
230 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
231 resets = <&cpg 912>;
232 };
234 gpio1: gpio@e6051000 {
235 compatible = "renesas,gpio-r8a7796",
236 "renesas,rcar-gen3-gpio";
237 reg = <0 0xe6051000 0 0x50>;
238 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
239 #gpio-cells = <2>;
240 gpio-controller;
241 gpio-ranges = <&pfc 0 32 29>;
242 #interrupt-cells = <2>;
243 interrupt-controller;
244 clocks = <&cpg CPG_MOD 911>;
245 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
246 resets = <&cpg 911>;
247 };
249 gpio2: gpio@e6052000 {
250 compatible = "renesas,gpio-r8a7796",
251 "renesas,rcar-gen3-gpio";
252 reg = <0 0xe6052000 0 0x50>;
253 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
254 #gpio-cells = <2>;
255 gpio-controller;
256 gpio-ranges = <&pfc 0 64 15>;
257 #interrupt-cells = <2>;
258 interrupt-controller;
259 clocks = <&cpg CPG_MOD 910>;
260 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
261 resets = <&cpg 910>;
262 };
264 gpio3: gpio@e6053000 {
265 compatible = "renesas,gpio-r8a7796",
266 "renesas,rcar-gen3-gpio";
267 reg = <0 0xe6053000 0 0x50>;
268 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
269 #gpio-cells = <2>;
270 gpio-controller;
271 gpio-ranges = <&pfc 0 96 16>;
272 #interrupt-cells = <2>;
273 interrupt-controller;
274 clocks = <&cpg CPG_MOD 909>;
275 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
276 resets = <&cpg 909>;
277 };
279 gpio4: gpio@e6054000 {
280 compatible = "renesas,gpio-r8a7796",
281 "renesas,rcar-gen3-gpio";
282 reg = <0 0xe6054000 0 0x50>;
283 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
284 #gpio-cells = <2>;
285 gpio-controller;
286 gpio-ranges = <&pfc 0 128 18>;
287 #interrupt-cells = <2>;
288 interrupt-controller;
289 clocks = <&cpg CPG_MOD 908>;
290 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
291 resets = <&cpg 908>;
292 };
294 gpio5: gpio@e6055000 {
295 compatible = "renesas,gpio-r8a7796",
296 "renesas,rcar-gen3-gpio";
297 reg = <0 0xe6055000 0 0x50>;
298 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
299 #gpio-cells = <2>;
300 gpio-controller;
301 gpio-ranges = <&pfc 0 160 26>;
302 #interrupt-cells = <2>;
303 interrupt-controller;
304 clocks = <&cpg CPG_MOD 907>;
305 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
306 resets = <&cpg 907>;
307 };
309 gpio6: gpio@e6055400 {
310 compatible = "renesas,gpio-r8a7796",
311 "renesas,rcar-gen3-gpio";
312 reg = <0 0xe6055400 0 0x50>;
313 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
314 #gpio-cells = <2>;
315 gpio-controller;
316 gpio-ranges = <&pfc 0 192 32>;
317 #interrupt-cells = <2>;
318 interrupt-controller;
319 clocks = <&cpg CPG_MOD 906>;
320 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
321 resets = <&cpg 906>;
322 };
324 gpio7: gpio@e6055800 {
325 compatible = "renesas,gpio-r8a7796",
326 "renesas,rcar-gen3-gpio";
327 reg = <0 0xe6055800 0 0x50>;
328 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
329 #gpio-cells = <2>;
330 gpio-controller;
331 gpio-ranges = <&pfc 0 224 4>;
332 #interrupt-cells = <2>;
333 interrupt-controller;
334 clocks = <&cpg CPG_MOD 905>;
335 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
336 resets = <&cpg 905>;
337 };
339 pfc: pin-controller@e6060000 {
340 compatible = "renesas,pfc-r8a7796";
341 reg = <0 0xe6060000 0 0x50c>;
342 };
344 ipmmu_vi0: mmu@febd0000 {
345 compatible = "renesas,ipmmu-r8a7796";
346 reg = <0 0xfebd0000 0 0x1000>;
347 renesas,ipmmu-main = <&ipmmu_mm 9>;
348 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
349 #iommu-cells = <1>;
350 };
352 ipmmu_vc0: mmu@fe6b0000 {
353 compatible = "renesas,ipmmu-r8a7796";
354 reg = <0 0xfe6b0000 0 0x1000>;
355 renesas,ipmmu-main = <&ipmmu_mm 8>;
356 power-domains = <&sysc R8A7796_PD_A3VC>;
357 #iommu-cells = <1>;
358 status = "disabled";
359 };
361 ipmmu_pv0: mmu@fd800000 {
362 compatible = "renesas,ipmmu-r8a7796";
363 reg = <0 0xfd800000 0 0x1000>;
364 renesas,ipmmu-main = <&ipmmu_mm 5>;
365 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
366 #iommu-cells = <1>;
367 };
369 ipmmu_pv1: mmu@fd950000 {
370 compatible = "renesas,ipmmu-r8a7796";
371 reg = <0 0xfd950000 0 0x1000>;
372 renesas,ipmmu-main = <&ipmmu_mm 6>;
373 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
374 #iommu-cells = <1>;
375 status = "disabled";
376 };
378 ipmmu_ir: mmu@ff8b0000 {
379 compatible = "renesas,ipmmu-r8a7796";
380 reg = <0 0xff8b0000 0 0x1000>;
381 renesas,ipmmu-main = <&ipmmu_mm 3>;
382 power-domains = <&sysc R8A7796_PD_A3IR>;
383 #iommu-cells = <1>;
384 status = "disabled";
385 };
387 ipmmu_hc: mmu@e6570000 {
388 compatible = "renesas,ipmmu-r8a7796";
389 reg = <0 0xe6570000 0 0x1000>;
390 renesas,ipmmu-main = <&ipmmu_mm 2>;
391 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
392 #iommu-cells = <1>;
393 status = "disabled";
394 };
396 ipmmu_rt: mmu@ffc80000 {
397 compatible = "renesas,ipmmu-r8a7796";
398 reg = <0 0xffc80000 0 0x1000>;
399 renesas,ipmmu-main = <&ipmmu_mm 7>;
400 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
401 #iommu-cells = <1>;
402 status = "disabled";
403 };
405 ipmmu_mp: mmu@ec670000 {
406 compatible = "renesas,ipmmu-r8a7796";
407 reg = <0 0xec670000 0 0x1000>;
408 renesas,ipmmu-main = <&ipmmu_mm 4>;
409 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
410 #iommu-cells = <1>;
411 };
413 ipmmu_ds0: mmu@e6740000 {
414 compatible = "renesas,ipmmu-r8a7796";
415 reg = <0 0xe6740000 0 0x1000>;
416 renesas,ipmmu-main = <&ipmmu_mm 0>;
417 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
418 #iommu-cells = <1>;
419 };
421 ipmmu_ds1: mmu@e7740000 {
422 compatible = "renesas,ipmmu-r8a7796";
423 reg = <0 0xe7740000 0 0x1000>;
424 renesas,ipmmu-main = <&ipmmu_mm 1>;
425 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
426 #iommu-cells = <1>;
427 };
429 ipmmu_mm: mmu@e67b0000 {
430 compatible = "renesas,ipmmu-r8a7796";
431 reg = <0 0xe67b0000 0 0x1000>;
432 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
433 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
434 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
435 #iommu-cells = <1>;
436 };
438 cpg: clock-controller@e6150000 {
439 compatible = "renesas,r8a7796-cpg-mssr";
440 reg = <0 0xe6150000 0 0x1000>;
441 clocks = <&extal_clk>, <&extalr_clk>;
442 clock-names = "extal", "extalr";
443 #clock-cells = <2>;
444 #power-domain-cells = <0>;
445 #reset-cells = <1>;
446 };
448 rst: reset-controller@e6160000 {
449 compatible = "renesas,r8a7796-rst";
450 reg = <0 0xe6160000 0 0x0200>;
451 };
453 prr: chipid@fff00044 {
454 compatible = "renesas,prr";
455 reg = <0 0xfff00044 0 4>;
456 };
458 sysc: system-controller@e6180000 {
459 compatible = "renesas,r8a7796-sysc";
460 reg = <0 0xe6180000 0 0x0400>;
461 #power-domain-cells = <1>;
462 };
464 intc_ex: interrupt-controller@e61c0000 {
465 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
466 #interrupt-cells = <2>;
467 interrupt-controller;
468 reg = <0 0xe61c0000 0 0x200>;
469 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
470 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
471 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
472 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
473 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
474 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
475 clocks = <&cpg CPG_MOD 407>;
476 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
477 resets = <&cpg 407>;
478 };
480 i2c_dvfs: i2c@e60b0000 {
481 #address-cells = <1>;
482 #size-cells = <0>;
483 compatible = "renesas,iic-r8a7796",
484 "renesas,rcar-gen3-iic",
485 "renesas,rmobile-iic";
486 reg = <0 0xe60b0000 0 0x425>;
487 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
488 clocks = <&cpg CPG_MOD 926>;
489 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
490 resets = <&cpg 926>;
491 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
492 dma-names = "tx", "rx";
493 status = "disabled";
494 };
496 pwm0: pwm@e6e30000 {
497 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
498 reg = <0 0xe6e30000 0 8>;
499 #pwm-cells = <2>;
500 clocks = <&cpg CPG_MOD 523>;
501 resets = <&cpg 523>;
502 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
503 status = "disabled";
504 };
506 pwm1: pwm@e6e31000 {
507 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
508 reg = <0 0xe6e31000 0 8>;
509 #pwm-cells = <2>;
510 clocks = <&cpg CPG_MOD 523>;
511 resets = <&cpg 523>;
512 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
513 status = "disabled";
514 };
516 pwm2: pwm@e6e32000 {
517 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
518 reg = <0 0xe6e32000 0 8>;
519 #pwm-cells = <2>;
520 clocks = <&cpg CPG_MOD 523>;
521 resets = <&cpg 523>;
522 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
523 status = "disabled";
524 };
526 pwm3: pwm@e6e33000 {
527 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
528 reg = <0 0xe6e33000 0 8>;
529 #pwm-cells = <2>;
530 clocks = <&cpg CPG_MOD 523>;
531 resets = <&cpg 523>;
532 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
533 status = "disabled";
534 };
536 pwm4: pwm@e6e34000 {
537 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
538 reg = <0 0xe6e34000 0 8>;
539 #pwm-cells = <2>;
540 clocks = <&cpg CPG_MOD 523>;
541 resets = <&cpg 523>;
542 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
543 status = "disabled";
544 };
546 pwm5: pwm@e6e35000 {
547 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
548 reg = <0 0xe6e35000 0 8>;
549 #pwm-cells = <2>;
550 clocks = <&cpg CPG_MOD 523>;
551 resets = <&cpg 523>;
552 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
553 status = "disabled";
554 };
556 pwm6: pwm@e6e36000 {
557 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
558 reg = <0 0xe6e36000 0 8>;
559 #pwm-cells = <2>;
560 clocks = <&cpg CPG_MOD 523>;
561 resets = <&cpg 523>;
562 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
563 status = "disabled";
564 };
566 i2c0: i2c@e6500000 {
567 #address-cells = <1>;
568 #size-cells = <0>;
569 compatible = "renesas,i2c-r8a7796",
570 "renesas,rcar-gen3-i2c";
571 reg = <0 0xe6500000 0 0x40>;
572 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
573 clocks = <&cpg CPG_MOD 931>;
574 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
575 resets = <&cpg 931>;
576 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
577 <&dmac2 0x91>, <&dmac2 0x90>;
578 dma-names = "tx", "rx", "tx", "rx";
579 i2c-scl-internal-delay-ns = <110>;
580 status = "disabled";
581 };
583 i2c1: i2c@e6508000 {
584 #address-cells = <1>;
585 #size-cells = <0>;
586 compatible = "renesas,i2c-r8a7796",
587 "renesas,rcar-gen3-i2c";
588 reg = <0 0xe6508000 0 0x40>;
589 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&cpg CPG_MOD 930>;
591 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
592 resets = <&cpg 930>;
593 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
594 <&dmac2 0x93>, <&dmac2 0x92>;
595 dma-names = "tx", "rx", "tx", "rx";
596 i2c-scl-internal-delay-ns = <6>;
597 status = "disabled";
598 };
600 i2c2: i2c@e6510000 {
601 #address-cells = <1>;
602 #size-cells = <0>;
603 compatible = "renesas,i2c-r8a7796",
604 "renesas,rcar-gen3-i2c";
605 reg = <0 0xe6510000 0 0x40>;
606 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
607 clocks = <&cpg CPG_MOD 929>;
608 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
609 resets = <&cpg 929>;
610 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
611 <&dmac2 0x95>, <&dmac2 0x94>;
612 dma-names = "tx", "rx", "tx", "rx";
613 i2c-scl-internal-delay-ns = <6>;
614 status = "disabled";
615 };
617 i2c3: i2c@e66d0000 {
618 #address-cells = <1>;
619 #size-cells = <0>;
620 compatible = "renesas,i2c-r8a7796",
621 "renesas,rcar-gen3-i2c";
622 reg = <0 0xe66d0000 0 0x40>;
623 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
624 clocks = <&cpg CPG_MOD 928>;
625 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
626 resets = <&cpg 928>;
627 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
628 dma-names = "tx", "rx";
629 i2c-scl-internal-delay-ns = <110>;
630 status = "disabled";
631 };
633 i2c4: i2c@e66d8000 {
634 #address-cells = <1>;
635 #size-cells = <0>;
636 compatible = "renesas,i2c-r8a7796",
637 "renesas,rcar-gen3-i2c";
638 reg = <0 0xe66d8000 0 0x40>;
639 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
640 clocks = <&cpg CPG_MOD 927>;
641 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
642 resets = <&cpg 927>;
643 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
644 dma-names = "tx", "rx";
645 i2c-scl-internal-delay-ns = <110>;
646 status = "disabled";
647 };
649 i2c5: i2c@e66e0000 {
650 #address-cells = <1>;
651 #size-cells = <0>;
652 compatible = "renesas,i2c-r8a7796",
653 "renesas,rcar-gen3-i2c";
654 reg = <0 0xe66e0000 0 0x40>;
655 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
656 clocks = <&cpg CPG_MOD 919>;
657 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
658 resets = <&cpg 919>;
659 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
660 dma-names = "tx", "rx";
661 i2c-scl-internal-delay-ns = <110>;
662 status = "disabled";
663 };
665 i2c6: i2c@e66e8000 {
666 #address-cells = <1>;
667 #size-cells = <0>;
668 compatible = "renesas,i2c-r8a7796",
669 "renesas,rcar-gen3-i2c";
670 reg = <0 0xe66e8000 0 0x40>;
671 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
672 clocks = <&cpg CPG_MOD 918>;
673 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
674 resets = <&cpg 918>;
675 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
676 dma-names = "tx", "rx";
677 i2c-scl-internal-delay-ns = <6>;
678 status = "disabled";
679 };
681 can0: can@e6c30000 {
682 compatible = "renesas,can-r8a7796",
683 "renesas,rcar-gen3-can";
684 reg = <0 0xe6c30000 0 0x1000>;
685 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
686 clocks = <&cpg CPG_MOD 916>,
687 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
688 <&can_clk>;
689 clock-names = "clkp1", "clkp2", "can_clk";
690 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
691 assigned-clock-rates = <40000000>;
692 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
693 resets = <&cpg 916>;
694 status = "disabled";
695 };
697 can1: can@e6c38000 {
698 compatible = "renesas,can-r8a7796",
699 "renesas,rcar-gen3-can";
700 reg = <0 0xe6c38000 0 0x1000>;
701 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
702 clocks = <&cpg CPG_MOD 915>,
703 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
704 <&can_clk>;
705 clock-names = "clkp1", "clkp2", "can_clk";
706 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
707 assigned-clock-rates = <40000000>;
708 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
709 resets = <&cpg 915>;
710 status = "disabled";
711 };
713 canfd: can@e66c0000 {
714 compatible = "renesas,r8a7796-canfd",
715 "renesas,rcar-gen3-canfd";
716 reg = <0 0xe66c0000 0 0x8000>;
717 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
718 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
719 clocks = <&cpg CPG_MOD 914>,
720 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
721 <&can_clk>;
722 clock-names = "fck", "canfd", "can_clk";
723 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
724 assigned-clock-rates = <40000000>;
725 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
726 resets = <&cpg 914>;
727 status = "disabled";
729 channel0 {
730 status = "disabled";
731 };
733 channel1 {
734 status = "disabled";
735 };
736 };
738 drif00: rif@e6f40000 {
739 compatible = "renesas,r8a7796-drif",
740 "renesas,rcar-gen3-drif";
741 reg = <0 0xe6f40000 0 0x64>;
742 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
743 clocks = <&cpg CPG_MOD 515>;
744 clock-names = "fck";
745 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
746 dma-names = "rx", "rx";
747 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
748 resets = <&cpg 515>;
749 renesas,bonding = <&drif01>;
750 status = "disabled";
751 };
753 drif01: rif@e6f50000 {
754 compatible = "renesas,r8a7796-drif",
755 "renesas,rcar-gen3-drif";
756 reg = <0 0xe6f50000 0 0x64>;
757 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
758 clocks = <&cpg CPG_MOD 514>;
759 clock-names = "fck";
760 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
761 dma-names = "rx", "rx";
762 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
763 resets = <&cpg 514>;
764 renesas,bonding = <&drif00>;
765 status = "disabled";
766 };
768 drif10: rif@e6f60000 {
769 compatible = "renesas,r8a7796-drif",
770 "renesas,rcar-gen3-drif";
771 reg = <0 0xe6f60000 0 0x64>;
772 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
773 clocks = <&cpg CPG_MOD 513>;
774 clock-names = "fck";
775 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
776 dma-names = "rx", "rx";
777 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
778 resets = <&cpg 513>;
779 renesas,bonding = <&drif11>;
780 status = "disabled";
781 };
783 drif11: rif@e6f70000 {
784 compatible = "renesas,r8a7796-drif",
785 "renesas,rcar-gen3-drif";
786 reg = <0 0xe6f70000 0 0x64>;
787 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
788 clocks = <&cpg CPG_MOD 512>;
789 clock-names = "fck";
790 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
791 dma-names = "rx", "rx";
792 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
793 resets = <&cpg 512>;
794 renesas,bonding = <&drif10>;
795 status = "disabled";
796 };
798 drif20: rif@e6f80000 {
799 compatible = "renesas,r8a7796-drif",
800 "renesas,rcar-gen3-drif";
801 reg = <0 0xe6f80000 0 0x64>;
802 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
803 clocks = <&cpg CPG_MOD 511>;
804 clock-names = "fck";
805 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
806 dma-names = "rx", "rx";
807 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
808 resets = <&cpg 511>;
809 renesas,bonding = <&drif21>;
810 status = "disabled";
811 };
813 drif21: rif@e6f90000 {
814 compatible = "renesas,r8a7796-drif",
815 "renesas,rcar-gen3-drif";
816 reg = <0 0xe6f90000 0 0x64>;
817 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
818 clocks = <&cpg CPG_MOD 510>;
819 clock-names = "fck";
820 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
821 dma-names = "rx", "rx";
822 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
823 resets = <&cpg 510>;
824 renesas,bonding = <&drif20>;
825 status = "disabled";
826 };
828 drif30: rif@e6fa0000 {
829 compatible = "renesas,r8a7796-drif",
830 "renesas,rcar-gen3-drif";
831 reg = <0 0xe6fa0000 0 0x64>;
832 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
833 clocks = <&cpg CPG_MOD 509>;
834 clock-names = "fck";
835 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
836 dma-names = "rx", "rx";
837 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
838 resets = <&cpg 509>;
839 renesas,bonding = <&drif31>;
840 status = "disabled";
841 };
843 drif31: rif@e6fb0000 {
844 compatible = "renesas,r8a7796-drif",
845 "renesas,rcar-gen3-drif";
846 reg = <0 0xe6fb0000 0 0x64>;
847 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
848 clocks = <&cpg CPG_MOD 508>;
849 clock-names = "fck";
850 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
851 dma-names = "rx", "rx";
852 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
853 resets = <&cpg 508>;
854 renesas,bonding = <&drif30>;
855 status = "disabled";
856 };
858 avb: ethernet@e6800000 {
859 compatible = "renesas,etheravb-r8a7796",
860 "renesas,etheravb-rcar-gen3";
861 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
862 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
863 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
865 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
867 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
868 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
869 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
870 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
871 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
872 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
873 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
874 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
875 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
876 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
877 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
878 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
879 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
880 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
881 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
882 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
883 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
884 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
885 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
886 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
887 interrupt-names = "ch0", "ch1", "ch2", "ch3",
888 "ch4", "ch5", "ch6", "ch7",
889 "ch8", "ch9", "ch10", "ch11",
890 "ch12", "ch13", "ch14", "ch15",
891 "ch16", "ch17", "ch18", "ch19",
892 "ch20", "ch21", "ch22", "ch23",
893 "ch24";
894 clocks = <&cpg CPG_MOD 812>;
895 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
896 resets = <&cpg 812>;
897 phy-mode = "rgmii-txid";
898 iommus = <&ipmmu_ds0 16>;
899 #address-cells = <1>;
900 #size-cells = <0>;
901 status = "disabled";
902 };
904 hscif0: serial@e6540000 {
905 compatible = "renesas,hscif-r8a7796",
906 "renesas,rcar-gen3-hscif",
907 "renesas,hscif";
908 reg = <0 0xe6540000 0 0x60>;
909 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
910 clocks = <&cpg CPG_MOD 520>,
911 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
912 <&scif_clk>;
913 clock-names = "fck", "brg_int", "scif_clk";
914 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
915 <&dmac2 0x31>, <&dmac2 0x30>;
916 dma-names = "tx", "rx", "tx", "rx";
917 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
918 resets = <&cpg 520>;
919 status = "disabled";
920 };
922 hscif1: serial@e6550000 {
923 compatible = "renesas,hscif-r8a7796",
924 "renesas,rcar-gen3-hscif",
925 "renesas,hscif";
926 reg = <0 0xe6550000 0 0x60>;
927 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
928 clocks = <&cpg CPG_MOD 519>,
929 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
930 <&scif_clk>;
931 clock-names = "fck", "brg_int", "scif_clk";
932 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
933 <&dmac2 0x33>, <&dmac2 0x32>;
934 dma-names = "tx", "rx", "tx", "rx";
935 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
936 resets = <&cpg 519>;
937 status = "disabled";
938 };
940 hscif2: serial@e6560000 {
941 compatible = "renesas,hscif-r8a7796",
942 "renesas,rcar-gen3-hscif",
943 "renesas,hscif";
944 reg = <0 0xe6560000 0 0x60>;
945 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
946 clocks = <&cpg CPG_MOD 518>,
947 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
948 <&scif_clk>;
949 clock-names = "fck", "brg_int", "scif_clk";
950 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
951 <&dmac2 0x35>, <&dmac2 0x34>;
952 dma-names = "tx", "rx", "tx", "rx";
953 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
954 resets = <&cpg 518>;
955 status = "disabled";
956 };
958 hscif3: serial@e66a0000 {
959 compatible = "renesas,hscif-r8a7796",
960 "renesas,rcar-gen3-hscif",
961 "renesas,hscif";
962 reg = <0 0xe66a0000 0 0x60>;
963 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
964 clocks = <&cpg CPG_MOD 517>,
965 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
966 <&scif_clk>;
967 clock-names = "fck", "brg_int", "scif_clk";
968 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
969 dma-names = "tx", "rx";
970 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
971 resets = <&cpg 517>;
972 status = "disabled";
973 };
975 hscif4: serial@e66b0000 {
976 compatible = "renesas,hscif-r8a7796",
977 "renesas,rcar-gen3-hscif",
978 "renesas,hscif";
979 reg = <0 0xe66b0000 0 0x60>;
980 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
981 clocks = <&cpg CPG_MOD 516>,
982 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
983 <&scif_clk>;
984 clock-names = "fck", "brg_int", "scif_clk";
985 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
986 dma-names = "tx", "rx";
987 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
988 resets = <&cpg 516>;
989 status = "disabled";
990 };
992 scif0: serial@e6e60000 {
993 compatible = "renesas,scif-r8a7796",
994 "renesas,rcar-gen3-scif", "renesas,scif";
995 reg = <0 0xe6e60000 0 64>;
996 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
997 clocks = <&cpg CPG_MOD 207>,
998 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
999 <&scif_clk>;
1000 clock-names = "fck", "brg_int", "scif_clk";
1001 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1002 <&dmac2 0x51>, <&dmac2 0x50>;
1003 dma-names = "tx", "rx", "tx", "rx";
1004 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1005 resets = <&cpg 207>;
1006 status = "disabled";
1007 };
1009 scif1: serial@e6e68000 {
1010 compatible = "renesas,scif-r8a7796",
1011 "renesas,rcar-gen3-scif", "renesas,scif";
1012 reg = <0 0xe6e68000 0 64>;
1013 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1014 clocks = <&cpg CPG_MOD 206>,
1015 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1016 <&scif_clk>;
1017 clock-names = "fck", "brg_int", "scif_clk";
1018 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1019 <&dmac2 0x53>, <&dmac2 0x52>;
1020 dma-names = "tx", "rx", "tx", "rx";
1021 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1022 resets = <&cpg 206>;
1023 status = "disabled";
1024 };
1026 scif2: serial@e6e88000 {
1027 compatible = "renesas,scif-r8a7796",
1028 "renesas,rcar-gen3-scif", "renesas,scif";
1029 reg = <0 0xe6e88000 0 64>;
1030 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1031 clocks = <&cpg CPG_MOD 310>,
1032 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1033 <&scif_clk>;
1034 clock-names = "fck", "brg_int", "scif_clk";
1035 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1036 resets = <&cpg 310>;
1037 status = "disabled";
1038 };
1040 scif3: serial@e6c50000 {
1041 compatible = "renesas,scif-r8a7796",
1042 "renesas,rcar-gen3-scif", "renesas,scif";
1043 reg = <0 0xe6c50000 0 64>;
1044 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1045 clocks = <&cpg CPG_MOD 204>,
1046 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1047 <&scif_clk>;
1048 clock-names = "fck", "brg_int", "scif_clk";
1049 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1050 dma-names = "tx", "rx";
1051 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1052 resets = <&cpg 204>;
1053 status = "disabled";
1054 };
1056 scif4: serial@e6c40000 {
1057 compatible = "renesas,scif-r8a7796",
1058 "renesas,rcar-gen3-scif", "renesas,scif";
1059 reg = <0 0xe6c40000 0 64>;
1060 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1061 clocks = <&cpg CPG_MOD 203>,
1062 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1063 <&scif_clk>;
1064 clock-names = "fck", "brg_int", "scif_clk";
1065 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1066 dma-names = "tx", "rx";
1067 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1068 resets = <&cpg 203>;
1069 status = "disabled";
1070 };
1072 scif5: serial@e6f30000 {
1073 compatible = "renesas,scif-r8a7796",
1074 "renesas,rcar-gen3-scif", "renesas,scif";
1075 reg = <0 0xe6f30000 0 64>;
1076 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1077 clocks = <&cpg CPG_MOD 202>,
1078 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1079 <&scif_clk>;
1080 clock-names = "fck", "brg_int", "scif_clk";
1081 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1082 <&dmac2 0x5b>, <&dmac2 0x5a>;
1083 dma-names = "tx", "rx", "tx", "rx";
1084 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1085 resets = <&cpg 202>;
1086 status = "disabled";
1087 };
1089 msiof0: spi@e6e90000 {
1090 compatible = "renesas,msiof-r8a7796",
1091 "renesas,rcar-gen3-msiof";
1092 reg = <0 0xe6e90000 0 0x0064>;
1093 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1094 clocks = <&cpg CPG_MOD 211>;
1095 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1096 <&dmac2 0x41>, <&dmac2 0x40>;
1097 dma-names = "tx", "rx", "tx", "rx";
1098 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1099 resets = <&cpg 211>;
1100 #address-cells = <1>;
1101 #size-cells = <0>;
1102 status = "disabled";
1103 };
1105 msiof1: spi@e6ea0000 {
1106 compatible = "renesas,msiof-r8a7796",
1107 "renesas,rcar-gen3-msiof";
1108 reg = <0 0xe6ea0000 0 0x0064>;
1109 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1110 clocks = <&cpg CPG_MOD 210>;
1111 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1112 <&dmac2 0x43>, <&dmac2 0x42>;
1113 dma-names = "tx", "rx", "tx", "rx";
1114 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1115 resets = <&cpg 210>;
1116 #address-cells = <1>;
1117 #size-cells = <0>;
1118 status = "disabled";
1119 };
1121 msiof2: spi@e6c00000 {
1122 compatible = "renesas,msiof-r8a7796",
1123 "renesas,rcar-gen3-msiof";
1124 reg = <0 0xe6c00000 0 0x0064>;
1125 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1126 clocks = <&cpg CPG_MOD 209>;
1127 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1128 dma-names = "tx", "rx";
1129 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1130 resets = <&cpg 209>;
1131 #address-cells = <1>;
1132 #size-cells = <0>;
1133 status = "disabled";
1134 };
1136 msiof3: spi@e6c10000 {
1137 compatible = "renesas,msiof-r8a7796",
1138 "renesas,rcar-gen3-msiof";
1139 reg = <0 0xe6c10000 0 0x0064>;
1140 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1141 clocks = <&cpg CPG_MOD 208>;
1142 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1143 dma-names = "tx", "rx";
1144 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1145 resets = <&cpg 208>;
1146 #address-cells = <1>;
1147 #size-cells = <0>;
1148 status = "disabled";
1149 };
1151 dmac0: dma-controller@e6700000 {
1152 compatible = "renesas,dmac-r8a7796",
1153 "renesas,rcar-dmac";
1154 reg = <0 0xe6700000 0 0x10000>;
1155 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
1156 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
1157 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
1158 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
1159 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
1160 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
1161 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
1162 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
1163 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
1164 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
1165 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
1166 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
1167 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
1168 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
1169 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
1170 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
1171 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
1172 interrupt-names = "error",
1173 "ch0", "ch1", "ch2", "ch3",
1174 "ch4", "ch5", "ch6", "ch7",
1175 "ch8", "ch9", "ch10", "ch11",
1176 "ch12", "ch13", "ch14", "ch15";
1177 clocks = <&cpg CPG_MOD 219>;
1178 clock-names = "fck";
1179 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1180 resets = <&cpg 219>;
1181 #dma-cells = <1>;
1182 dma-channels = <16>;
1183 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1184 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
1185 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
1186 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
1187 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
1188 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
1189 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
1190 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
1191 };
1193 dmac1: dma-controller@e7300000 {
1194 compatible = "renesas,dmac-r8a7796",
1195 "renesas,rcar-dmac";
1196 reg = <0 0xe7300000 0 0x10000>;
1197 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
1198 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
1199 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
1200 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
1201 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
1202 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
1203 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
1204 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
1205 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
1206 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
1207 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
1208 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
1209 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
1210 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
1211 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
1212 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
1213 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1214 interrupt-names = "error",
1215 "ch0", "ch1", "ch2", "ch3",
1216 "ch4", "ch5", "ch6", "ch7",
1217 "ch8", "ch9", "ch10", "ch11",
1218 "ch12", "ch13", "ch14", "ch15";
1219 clocks = <&cpg CPG_MOD 218>;
1220 clock-names = "fck";
1221 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1222 resets = <&cpg 218>;
1223 #dma-cells = <1>;
1224 dma-channels = <16>;
1225 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1226 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1227 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1228 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1229 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1230 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1231 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1232 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1233 };
1235 dmac2: dma-controller@e7310000 {
1236 compatible = "renesas,dmac-r8a7796",
1237 "renesas,rcar-dmac";
1238 reg = <0 0xe7310000 0 0x10000>;
1239 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
1240 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
1241 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
1242 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
1243 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
1244 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
1245 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
1246 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
1247 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
1248 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
1249 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
1250 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
1251 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
1252 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
1253 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
1254 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
1255 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1256 interrupt-names = "error",
1257 "ch0", "ch1", "ch2", "ch3",
1258 "ch4", "ch5", "ch6", "ch7",
1259 "ch8", "ch9", "ch10", "ch11",
1260 "ch12", "ch13", "ch14", "ch15";
1261 clocks = <&cpg CPG_MOD 217>;
1262 clock-names = "fck";
1263 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1264 resets = <&cpg 217>;
1265 #dma-cells = <1>;
1266 dma-channels = <16>;
1267 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1268 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1269 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1270 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1271 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1272 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1273 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1274 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1275 };
1277 audma0: dma-controller@ec700000 {
1278 compatible = "renesas,dmac-r8a7796",
1279 "renesas,rcar-dmac";
1280 reg = <0 0xec700000 0 0x10000>;
1281 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1282 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1283 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1284 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1285 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1286 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1287 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1288 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1289 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1290 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1291 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1292 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1293 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1294 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1295 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1296 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1297 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1298 interrupt-names = "error",
1299 "ch0", "ch1", "ch2", "ch3",
1300 "ch4", "ch5", "ch6", "ch7",
1301 "ch8", "ch9", "ch10", "ch11",
1302 "ch12", "ch13", "ch14", "ch15";
1303 clocks = <&cpg CPG_MOD 502>;
1304 clock-names = "fck";
1305 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1306 resets = <&cpg 502>;
1307 #dma-cells = <1>;
1308 dma-channels = <16>;
1309 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1310 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1311 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1312 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1313 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1314 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1315 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1316 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1317 };
1319 audma1: dma-controller@ec720000 {
1320 compatible = "renesas,dmac-r8a7796",
1321 "renesas,rcar-dmac";
1322 reg = <0 0xec720000 0 0x10000>;
1323 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1324 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1325 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1326 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1327 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1328 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1329 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1330 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1331 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1332 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1333 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1334 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1335 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1336 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1337 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1338 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1339 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1340 interrupt-names = "error",
1341 "ch0", "ch1", "ch2", "ch3",
1342 "ch4", "ch5", "ch6", "ch7",
1343 "ch8", "ch9", "ch10", "ch11",
1344 "ch12", "ch13", "ch14", "ch15";
1345 clocks = <&cpg CPG_MOD 501>;
1346 clock-names = "fck";
1347 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1348 resets = <&cpg 501>;
1349 #dma-cells = <1>;
1350 dma-channels = <16>;
1351 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
1352 <&ipmmu_mp 18>, <&ipmmu_mp 19>,
1353 <&ipmmu_mp 20>, <&ipmmu_mp 21>,
1354 <&ipmmu_mp 22>, <&ipmmu_mp 23>,
1355 <&ipmmu_mp 24>, <&ipmmu_mp 25>,
1356 <&ipmmu_mp 26>, <&ipmmu_mp 27>,
1357 <&ipmmu_mp 28>, <&ipmmu_mp 29>,
1358 <&ipmmu_mp 30>, <&ipmmu_mp 31>;
1359 };
1361 usb_dmac0: dma-controller@e65a0000 {
1362 compatible = "renesas,r8a7796-usb-dmac",
1363 "renesas,usb-dmac";
1364 reg = <0 0xe65a0000 0 0x100>;
1365 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1366 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1367 interrupt-names = "ch0", "ch1";
1368 clocks = <&cpg CPG_MOD 330>;
1369 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1370 resets = <&cpg 330>;
1371 #dma-cells = <1>;
1372 dma-channels = <2>;
1373 };
1375 usb_dmac1: dma-controller@e65b0000 {
1376 compatible = "renesas,r8a7796-usb-dmac",
1377 "renesas,usb-dmac";
1378 reg = <0 0xe65b0000 0 0x100>;
1379 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1380 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1381 interrupt-names = "ch0", "ch1";
1382 clocks = <&cpg CPG_MOD 331>;
1383 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1384 resets = <&cpg 331>;
1385 #dma-cells = <1>;
1386 dma-channels = <2>;
1387 };
1389 hsusb: usb@e6590000 {
1390 compatible = "renesas,usbhs-r8a7796",
1391 "renesas,rcar-gen3-usbhs";
1392 reg = <0 0xe6590000 0 0x100>;
1393 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1394 clocks = <&cpg CPG_MOD 704>;
1395 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1396 <&usb_dmac1 0>, <&usb_dmac1 1>;
1397 dma-names = "ch0", "ch1", "ch2", "ch3";
1398 renesas,buswait = <11>;
1399 phys = <&usb2_phy0>;
1400 phy-names = "usb";
1401 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1402 resets = <&cpg 704>;
1403 status = "disabled";
1404 };
1406 usb3_phy0: usb-phy@e65ee000 {
1407 compatible = "renesas,r8a7796-usb3-phy",
1408 "renesas,rcar-gen3-usb3-phy";
1409 reg = <0 0xe65ee000 0 0x90>;
1410 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
1411 <&usb_extal_clk>;
1412 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
1413 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1414 resets = <&cpg 328>;
1415 #phy-cells = <0>;
1416 status = "disabled";
1417 };
1419 xhci0: usb@ee000000 {
1420 compatible = "renesas,xhci-r8a7796",
1421 "renesas,rcar-gen3-xhci";
1422 reg = <0 0xee000000 0 0xc00>;
1423 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1424 clocks = <&cpg CPG_MOD 328>;
1425 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1426 resets = <&cpg 328>;
1427 status = "disabled";
1428 };
1430 usb3_peri0: usb@ee020000 {
1431 compatible = "renesas,r8a7796-usb3-peri",
1432 "renesas,rcar-gen3-usb3-peri";
1433 reg = <0 0xee020000 0 0x400>;
1434 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1435 clocks = <&cpg CPG_MOD 328>;
1436 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1437 resets = <&cpg 328>;
1438 status = "disabled";
1439 };
1441 ohci0: usb@ee080000 {
1442 compatible = "generic-ohci";
1443 reg = <0 0xee080000 0 0x100>;
1444 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1445 clocks = <&cpg CPG_MOD 703>;
1446 phys = <&usb2_phy0>;
1447 phy-names = "usb";
1448 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1449 resets = <&cpg 703>;
1450 status = "disabled";
1451 };
1453 ehci0: usb@ee080100 {
1454 compatible = "generic-ehci";
1455 reg = <0 0xee080100 0 0x100>;
1456 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1457 clocks = <&cpg CPG_MOD 703>;
1458 phys = <&usb2_phy0>;
1459 phy-names = "usb";
1460 companion= <&ohci0>;
1461 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1462 resets = <&cpg 703>;
1463 status = "disabled";
1464 };
1466 usb2_phy0: usb-phy@ee080200 {
1467 compatible = "renesas,usb2-phy-r8a7796",
1468 "renesas,rcar-gen3-usb2-phy";
1469 reg = <0 0xee080200 0 0x700>;
1470 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1471 clocks = <&cpg CPG_MOD 703>;
1472 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1473 resets = <&cpg 703>;
1474 #phy-cells = <0>;
1475 status = "disabled";
1476 };
1478 ohci1: usb@ee0a0000 {
1479 compatible = "generic-ohci";
1480 reg = <0 0xee0a0000 0 0x100>;
1481 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1482 clocks = <&cpg CPG_MOD 702>;
1483 phys = <&usb2_phy1>;
1484 phy-names = "usb";
1485 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1486 resets = <&cpg 702>;
1487 status = "disabled";
1488 };
1490 ehci1: usb@ee0a0100 {
1491 compatible = "generic-ehci";
1492 reg = <0 0xee0a0100 0 0x100>;
1493 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1494 clocks = <&cpg CPG_MOD 702>;
1495 phys = <&usb2_phy1>;
1496 phy-names = "usb";
1497 companion= <&ohci1>;
1498 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1499 resets = <&cpg 702>;
1500 status = "disabled";
1501 };
1503 usb2_phy1: usb-phy@ee0a0200 {
1504 compatible = "renesas,usb2-phy-r8a7796",
1505 "renesas,rcar-gen3-usb2-phy";
1506 reg = <0 0xee0a0200 0 0x700>;
1507 clocks = <&cpg CPG_MOD 702>;
1508 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1509 resets = <&cpg 702>;
1510 #phy-cells = <0>;
1511 status = "disabled";
1512 };
1514 sdhi0: sd@ee100000 {
1515 compatible = "renesas,sdhi-r8a7796",
1516 "renesas,rcar-gen3-sdhi";
1517 reg = <0 0xee100000 0 0x2000>;
1518 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1519 clocks = <&cpg CPG_MOD 314>;
1520 max-frequency = <200000000>;
1521 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1522 resets = <&cpg 314>;
1523 status = "disabled";
1524 };
1526 sdhi1: sd@ee120000 {
1527 compatible = "renesas,sdhi-r8a7796",
1528 "renesas,rcar-gen3-sdhi";
1529 reg = <0 0xee120000 0 0x2000>;
1530 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1531 clocks = <&cpg CPG_MOD 313>;
1532 max-frequency = <200000000>;
1533 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1534 resets = <&cpg 313>;
1535 status = "disabled";
1536 };
1538 sdhi2: sd@ee140000 {
1539 compatible = "renesas,sdhi-r8a7796",
1540 "renesas,rcar-gen3-sdhi";
1541 reg = <0 0xee140000 0 0x2000>;
1542 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1543 clocks = <&cpg CPG_MOD 312>;
1544 max-frequency = <200000000>;
1545 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1546 resets = <&cpg 312>;
1547 status = "disabled";
1548 };
1550 sdhi3: sd@ee160000 {
1551 compatible = "renesas,sdhi-r8a7796",
1552 "renesas,rcar-gen3-sdhi";
1553 reg = <0 0xee160000 0 0x2000>;
1554 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1555 clocks = <&cpg CPG_MOD 311>;
1556 max-frequency = <200000000>;
1557 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1558 resets = <&cpg 311>;
1559 status = "disabled";
1560 };
1562 tsc: thermal@e6198000 {
1563 compatible = "renesas,r8a7796-thermal";
1564 reg = <0 0xe6198000 0 0x68>,
1565 <0 0xe61a0000 0 0x5c>,
1566 <0 0xe61a8000 0 0x5c>;
1567 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
1568 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
1569 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1570 clocks = <&cpg CPG_MOD 522>;
1571 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1572 resets = <&cpg 522>;
1573 #thermal-sensor-cells = <1>;
1574 status = "okay";
1575 };
1577 rcar_sound: sound@ec500000 {
1578 /*
1579 * #sound-dai-cells is required
1580 *
1581 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1582 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1583 */
1584 /*
1585 * #clock-cells is required for audio_clkout0/1/2/3
1586 *
1587 * clkout : #clock-cells = <0>; <&rcar_sound>;
1588 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1589 */
1590 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1591 reg = <0 0xec500000 0 0x1000>, /* SCU */
1592 <0 0xec5a0000 0 0x100>, /* ADG */
1593 <0 0xec540000 0 0x1000>, /* SSIU */
1594 <0 0xec541000 0 0x280>, /* SSI */
1595 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1596 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1598 clocks = <&cpg CPG_MOD 1005>,
1599 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1600 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1601 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1602 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1603 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1604 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1605 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1606 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1607 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1608 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1609 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1610 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1611 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1612 <&audio_clk_a>, <&audio_clk_b>,
1613 <&audio_clk_c>,
1614 <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1615 clock-names = "ssi-all",
1616 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1617 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1618 "ssi.1", "ssi.0",
1619 "src.9", "src.8", "src.7", "src.6",
1620 "src.5", "src.4", "src.3", "src.2",
1621 "src.1", "src.0",
1622 "mix.1", "mix.0",
1623 "ctu.1", "ctu.0",
1624 "dvc.0", "dvc.1",
1625 "clk_a", "clk_b", "clk_c", "clk_i";
1626 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1627 resets = <&cpg 1005>,
1628 <&cpg 1006>, <&cpg 1007>,
1629 <&cpg 1008>, <&cpg 1009>,
1630 <&cpg 1010>, <&cpg 1011>,
1631 <&cpg 1012>, <&cpg 1013>,
1632 <&cpg 1014>, <&cpg 1015>;
1633 reset-names = "ssi-all",
1634 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1635 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1636 "ssi.1", "ssi.0";
1637 status = "disabled";
1639 rcar_sound,dvc {
1640 dvc0: dvc-0 {
1641 dmas = <&audma1 0xbc>;
1642 dma-names = "tx";
1643 };
1644 dvc1: dvc-1 {
1645 dmas = <&audma1 0xbe>;
1646 dma-names = "tx";
1647 };
1648 };
1650 rcar_sound,mix {
1651 mix0: mix-0 { };
1652 mix1: mix-1 { };
1653 };
1655 rcar_sound,ctu {
1656 ctu00: ctu-0 { };
1657 ctu01: ctu-1 { };
1658 ctu02: ctu-2 { };
1659 ctu03: ctu-3 { };
1660 ctu10: ctu-4 { };
1661 ctu11: ctu-5 { };
1662 ctu12: ctu-6 { };
1663 ctu13: ctu-7 { };
1664 };
1666 rcar_sound,src {
1667 src0: src-0 {
1668 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1669 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1670 dma-names = "rx", "tx";
1671 };
1672 src1: src-1 {
1673 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1674 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1675 dma-names = "rx", "tx";
1676 };
1677 src2: src-2 {
1678 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1679 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1680 dma-names = "rx", "tx";
1681 };
1682 src3: src-3 {
1683 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1684 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1685 dma-names = "rx", "tx";
1686 };
1687 src4: src-4 {
1688 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1689 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1690 dma-names = "rx", "tx";
1691 };
1692 src5: src-5 {
1693 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1694 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1695 dma-names = "rx", "tx";
1696 };
1697 src6: src-6 {
1698 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1699 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1700 dma-names = "rx", "tx";
1701 };
1702 src7: src-7 {
1703 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1704 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1705 dma-names = "rx", "tx";
1706 };
1707 src8: src-8 {
1708 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1709 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1710 dma-names = "rx", "tx";
1711 };
1712 src9: src-9 {
1713 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1714 dmas = <&audma0 0x97>, <&audma1 0xba>;
1715 dma-names = "rx", "tx";
1716 };
1717 };
1719 rcar_sound,ssi {
1720 ssi0: ssi-0 {
1721 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1722 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1723 dma-names = "rx", "tx", "rxu", "txu";
1724 };
1725 ssi1: ssi-1 {
1726 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1727 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1728 dma-names = "rx", "tx", "rxu", "txu";
1729 };
1730 ssi2: ssi-2 {
1731 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1732 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1733 dma-names = "rx", "tx", "rxu", "txu";
1734 };
1735 ssi3: ssi-3 {
1736 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1737 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1738 dma-names = "rx", "tx", "rxu", "txu";
1739 };
1740 ssi4: ssi-4 {
1741 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1742 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1743 dma-names = "rx", "tx", "rxu", "txu";
1744 };
1745 ssi5: ssi-5 {
1746 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1747 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1748 dma-names = "rx", "tx", "rxu", "txu";
1749 };
1750 ssi6: ssi-6 {
1751 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1752 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1753 dma-names = "rx", "tx", "rxu", "txu";
1754 };
1755 ssi7: ssi-7 {
1756 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1757 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1758 dma-names = "rx", "tx", "rxu", "txu";
1759 };
1760 ssi8: ssi-8 {
1761 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1762 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1763 dma-names = "rx", "tx", "rxu", "txu";
1764 };
1765 ssi9: ssi-9 {
1766 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1767 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1768 dma-names = "rx", "tx", "rxu", "txu";
1769 };
1770 };
1771 };
1773 pciec0: pcie@fe000000 {
1774 reg = <0 0xfe000000 0 0x80000>;
1775 /* placeholder */
1776 };
1778 pciec1: pcie@ee800000 {
1779 reg = <0 0xee800000 0 0x80000>;
1780 /* placeholder */
1781 };
1783 fdp1@fe940000 {
1784 compatible = "renesas,fdp1";
1785 reg = <0 0xfe940000 0 0x2400>;
1786 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1787 clocks = <&cpg CPG_MOD 119>;
1788 power-domains = <&sysc R8A7796_PD_A3VC>;
1789 resets = <&cpg 119>;
1790 renesas,fcp = <&fcpf0>;
1791 };
1793 fcpf0: fcp@fe950000 {
1794 compatible = "renesas,fcpf";
1795 reg = <0 0xfe950000 0 0x200>;
1796 clocks = <&cpg CPG_MOD 615>;
1797 power-domains = <&sysc R8A7796_PD_A3VC>;
1798 resets = <&cpg 615>;
1799 };
1801 vspb: vsp@fe960000 {
1802 compatible = "renesas,vsp2";
1803 reg = <0 0xfe960000 0 0x8000>;
1804 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1805 clocks = <&cpg CPG_MOD 626>;
1806 power-domains = <&sysc R8A7796_PD_A3VC>;
1807 resets = <&cpg 626>;
1809 renesas,fcp = <&fcpvb0>;
1810 };
1812 fcpvb0: fcp@fe96f000 {
1813 compatible = "renesas,fcpv";
1814 reg = <0 0xfe96f000 0 0x200>;
1815 clocks = <&cpg CPG_MOD 607>;
1816 power-domains = <&sysc R8A7796_PD_A3VC>;
1817 resets = <&cpg 607>;
1818 };
1820 vspi0: vsp@fe9a0000 {
1821 compatible = "renesas,vsp2";
1822 reg = <0 0xfe9a0000 0 0x8000>;
1823 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1824 clocks = <&cpg CPG_MOD 631>;
1825 power-domains = <&sysc R8A7796_PD_A3VC>;
1826 resets = <&cpg 631>;
1828 renesas,fcp = <&fcpvi0>;
1829 };
1831 fcpvi0: fcp@fe9af000 {
1832 compatible = "renesas,fcpv";
1833 reg = <0 0xfe9af000 0 0x200>;
1834 clocks = <&cpg CPG_MOD 611>;
1835 power-domains = <&sysc R8A7796_PD_A3VC>;
1836 resets = <&cpg 611>;
1837 iommus = <&ipmmu_vc0 19>;
1838 };
1840 vspd0: vsp@fea20000 {
1841 compatible = "renesas,vsp2";
1842 reg = <0 0xfea20000 0 0x4000>;
1843 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1844 clocks = <&cpg CPG_MOD 623>;
1845 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1846 resets = <&cpg 623>;
1848 renesas,fcp = <&fcpvd0>;
1849 };
1851 fcpvd0: fcp@fea27000 {
1852 compatible = "renesas,fcpv";
1853 reg = <0 0xfea27000 0 0x200>;
1854 clocks = <&cpg CPG_MOD 603>;
1855 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1856 resets = <&cpg 603>;
1857 iommus = <&ipmmu_vi0 8>;
1858 };
1860 vspd1: vsp@fea28000 {
1861 compatible = "renesas,vsp2";
1862 reg = <0 0xfea28000 0 0x4000>;
1863 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1864 clocks = <&cpg CPG_MOD 622>;
1865 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1866 resets = <&cpg 622>;
1868 renesas,fcp = <&fcpvd1>;
1869 };
1871 fcpvd1: fcp@fea2f000 {
1872 compatible = "renesas,fcpv";
1873 reg = <0 0xfea2f000 0 0x200>;
1874 clocks = <&cpg CPG_MOD 602>;
1875 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1876 resets = <&cpg 602>;
1877 iommus = <&ipmmu_vi0 9>;
1878 };
1880 vspd2: vsp@fea30000 {
1881 compatible = "renesas,vsp2";
1882 reg = <0 0xfea30000 0 0x4000>;
1883 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1884 clocks = <&cpg CPG_MOD 621>;
1885 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1886 resets = <&cpg 621>;
1888 renesas,fcp = <&fcpvd2>;
1889 };
1891 fcpvd2: fcp@fea37000 {
1892 compatible = "renesas,fcpv";
1893 reg = <0 0xfea37000 0 0x200>;
1894 clocks = <&cpg CPG_MOD 601>;
1895 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1896 resets = <&cpg 601>;
1897 iommus = <&ipmmu_vi0 10>;
1898 };
1900 hdmi0: hdmi@fead0000 {
1901 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
1902 reg = <0 0xfead0000 0 0x10000>;
1903 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
1904 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
1905 clock-names = "iahb", "isfr";
1906 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1907 resets = <&cpg 729>;
1908 status = "disabled";
1910 ports {
1911 #address-cells = <1>;
1912 #size-cells = <0>;
1913 port@0 {
1914 reg = <0>;
1915 dw_hdmi0_in: endpoint {
1916 remote-endpoint = <&du_out_hdmi0>;
1917 };
1918 };
1919 port@1 {
1920 reg = <1>;
1921 };
1922 };
1923 };
1925 du: display@feb00000 {
1926 compatible = "renesas,du-r8a7796";
1927 reg = <0 0xfeb00000 0 0x70000>,
1928 <0 0xfeb90000 0 0x14>;
1929 reg-names = "du", "lvds.0";
1930 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1931 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1932 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1933 clocks = <&cpg CPG_MOD 724>,
1934 <&cpg CPG_MOD 723>,
1935 <&cpg CPG_MOD 722>,
1936 <&cpg CPG_MOD 727>;
1937 clock-names = "du.0", "du.1", "du.2", "lvds.0";
1938 status = "disabled";
1940 vsps = <&vspd0 &vspd1 &vspd2>;
1942 ports {
1943 #address-cells = <1>;
1944 #size-cells = <0>;
1946 port@0 {
1947 reg = <0>;
1948 du_out_rgb: endpoint {
1949 };
1950 };
1951 port@1 {
1952 reg = <1>;
1953 du_out_hdmi0: endpoint {
1954 remote-endpoint = <&dw_hdmi0_in>;
1955 };
1956 };
1957 port@2 {
1958 reg = <2>;
1959 du_out_lvds0: endpoint {
1960 };
1961 };
1962 };
1963 };
1965 imr-lx4@fe860000 {
1966 compatible = "renesas,r8a7796-imr-lx4",
1967 "renesas,imr-lx4";
1968 reg = <0 0xfe860000 0 0x2000>;
1969 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
1970 clocks = <&cpg CPG_MOD 823>;
1971 power-domains = <&sysc R8A7796_PD_A3VC>;
1972 resets = <&cpg 823>;
1973 };
1975 imr-lx4@fe870000 {
1976 compatible = "renesas,r8a7796-imr-lx4",
1977 "renesas,imr-lx4";
1978 reg = <0 0xfe870000 0 0x2000>;
1979 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
1980 clocks = <&cpg CPG_MOD 822>;
1981 power-domains = <&sysc R8A7796_PD_A3VC>;
1982 resets = <&cpg 822>;
1983 };
1984 };
1986 timer {
1987 compatible = "arm,armv8-timer";
1988 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
1989 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
1990 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
1991 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
1992 };
1994 thermal-zones {
1995 sensor_thermal1: sensor-thermal1 {
1996 polling-delay-passive = <250>;
1997 polling-delay = <1000>;
1998 thermal-sensors = <&tsc 0>;
2000 trips {
2001 sensor1_crit: sensor1-crit {
2002 temperature = <120000>;
2003 hysteresis = <2000>;
2004 type = "critical";
2005 };
2006 };
2007 };
2009 sensor_thermal2: sensor-thermal2 {
2010 polling-delay-passive = <250>;
2011 polling-delay = <1000>;
2012 thermal-sensors = <&tsc 1>;
2014 trips {
2015 sensor2_crit: sensor2-crit {
2016 temperature = <120000>;
2017 hysteresis = <2000>;
2018 type = "critical";
2019 };
2020 };
2021 };
2023 sensor_thermal3: sensor-thermal3 {
2024 polling-delay-passive = <250>;
2025 polling-delay = <1000>;
2026 thermal-sensors = <&tsc 2>;
2028 trips {
2029 sensor3_crit: sensor3-crit {
2030 temperature = <120000>;
2031 hysteresis = <2000>;
2032 type = "critical";
2033 };
2034 };
2035 };
2036 };
2038 /* External USB clocks - can be overridden by the board */
2039 usb3s0_clk: usb3s0 {
2040 compatible = "fixed-clock";
2041 #clock-cells = <0>;
2042 clock-frequency = <0>;
2043 };
2045 usb_extal_clk: usb_extal {
2046 compatible = "fixed-clock";
2047 #clock-cells = <0>;
2048 clock-frequency = <0>;
2049 };
2050 };