2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include "dt-bindings/pwm/pwm.h"
44 #include "rk3399.dtsi"
45 #include "rk3399-opp.dtsi"
48 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
50 backlight: backlight {
51 compatible = "pwm-backlight";
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84 248 249 250 251 252 253 254 255>;
85 default-brightness-level = <200>;
86 pwms = <&pwm0 0 25000 0>;
89 clkin_gmac: external-gmac-clock {
90 compatible = "fixed-clock";
91 clock-frequency = <125000000>;
92 clock-output-names = "clkin_gmac";
97 compatible = "regulator-fixed";
98 regulator-name = "dc_12v";
101 regulator-min-microvolt = <12000000>;
102 regulator-max-microvolt = <12000000>;
105 /* switched by pmic_sleep */
106 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
107 compatible = "regulator-fixed";
108 regulator-name = "vcc1v8_s3";
111 regulator-min-microvolt = <1800000>;
112 regulator-max-microvolt = <1800000>;
113 vin-supply = <&vcc_1v8>;
116 vcc3v3_sys: vcc3v3-sys {
117 compatible = "regulator-fixed";
118 regulator-name = "vcc3v3_sys";
121 regulator-min-microvolt = <3300000>;
122 regulator-max-microvolt = <3300000>;
123 vin-supply = <&vcc_sys>;
127 compatible = "regulator-fixed";
128 regulator-name = "vcc_sys";
131 regulator-min-microvolt = <5000000>;
132 regulator-max-microvolt = <5000000>;
133 vin-supply = <&dc_12v>;
136 vcc5v0_host: vcc5v0-host-regulator {
137 compatible = "regulator-fixed";
139 gpio = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&vcc5v0_host_en>;
142 regulator-name = "vcc5v0_host";
144 vin-supply = <&vcc_sys>;
149 cpu-supply = <&vdd_cpu_l>;
153 cpu-supply = <&vdd_cpu_l>;
157 cpu-supply = <&vdd_cpu_l>;
161 cpu-supply = <&vdd_cpu_l>;
165 cpu-supply = <&vdd_cpu_b>;
169 cpu-supply = <&vdd_cpu_b>;
177 assigned-clocks = <&cru SCLK_RMII_SRC>;
178 assigned-clock-parents = <&clkin_gmac>;
179 clock_in_out = "input";
180 phy-supply = <&vcc_lan>;
182 pinctrl-names = "default";
183 pinctrl-0 = <&rgmii_pins>;
184 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
185 snps,reset-active-low;
186 snps,reset-delays-us = <0 10000 50000>;
193 mali-supply = <&vdd_gpu>;
198 ddc-i2c-bus = <&i2c3>;
203 clock-frequency = <400000>;
204 i2c-scl-rising-time-ns = <168>;
205 i2c-scl-falling-time-ns = <4>;
209 compatible = "rockchip,rk808";
211 interrupt-parent = <&gpio1>;
212 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
214 clock-output-names = "xin32k", "rk808-clkout2";
215 pinctrl-names = "default";
216 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
217 rockchip,system-power-controller;
220 vcc1-supply = <&vcc_sys>;
221 vcc2-supply = <&vcc_sys>;
222 vcc3-supply = <&vcc_sys>;
223 vcc4-supply = <&vcc_sys>;
224 vcc6-supply = <&vcc_sys>;
225 vcc7-supply = <&vcc_sys>;
226 vcc8-supply = <&vcc3v3_sys>;
227 vcc9-supply = <&vcc_sys>;
228 vcc10-supply = <&vcc_sys>;
229 vcc11-supply = <&vcc_sys>;
230 vcc12-supply = <&vcc3v3_sys>;
231 vddio-supply = <&vcc1v8_pmu>;
234 vdd_center: DCDC_REG1 {
235 regulator-name = "vdd_center";
238 regulator-min-microvolt = <750000>;
239 regulator-max-microvolt = <1350000>;
240 regulator-ramp-delay = <6001>;
241 regulator-state-mem {
242 regulator-off-in-suspend;
246 vdd_cpu_l: DCDC_REG2 {
247 regulator-name = "vdd_cpu_l";
250 regulator-min-microvolt = <750000>;
251 regulator-max-microvolt = <1350000>;
252 regulator-ramp-delay = <6001>;
253 regulator-state-mem {
254 regulator-off-in-suspend;
259 regulator-name = "vcc_ddr";
262 regulator-state-mem {
263 regulator-on-in-suspend;
268 regulator-name = "vcc_1v8";
271 regulator-min-microvolt = <1800000>;
272 regulator-max-microvolt = <1800000>;
273 regulator-state-mem {
274 regulator-on-in-suspend;
275 regulator-suspend-microvolt = <1800000>;
279 vcc1v8_dvp: LDO_REG1 {
280 regulator-name = "vcc1v8_dvp";
283 regulator-min-microvolt = <1800000>;
284 regulator-max-microvolt = <1800000>;
285 regulator-state-mem {
286 regulator-off-in-suspend;
290 vcc3v0_tp: LDO_REG2 {
291 regulator-name = "vcc3v0_tp";
294 regulator-min-microvolt = <3000000>;
295 regulator-max-microvolt = <3000000>;
296 regulator-state-mem {
297 regulator-off-in-suspend;
301 vcc1v8_pmu: LDO_REG3 {
302 regulator-name = "vcc1v8_pmu";
305 regulator-min-microvolt = <1800000>;
306 regulator-max-microvolt = <1800000>;
307 regulator-state-mem {
308 regulator-on-in-suspend;
309 regulator-suspend-microvolt = <1800000>;
314 regulator-name = "vcc_sdio";
317 regulator-min-microvolt = <1800000>;
318 regulator-max-microvolt = <3000000>;
319 regulator-state-mem {
320 regulator-on-in-suspend;
321 regulator-suspend-microvolt = <3000000>;
325 vcca3v0_codec: LDO_REG5 {
326 regulator-name = "vcca3v0_codec";
329 regulator-min-microvolt = <3000000>;
330 regulator-max-microvolt = <3000000>;
331 regulator-state-mem {
332 regulator-off-in-suspend;
337 regulator-name = "vcc_1v5";
340 regulator-min-microvolt = <1500000>;
341 regulator-max-microvolt = <1500000>;
342 regulator-state-mem {
343 regulator-on-in-suspend;
344 regulator-suspend-microvolt = <1500000>;
348 vcca1v8_codec: LDO_REG7 {
349 regulator-name = "vcca1v8_codec";
352 regulator-min-microvolt = <1800000>;
353 regulator-max-microvolt = <1800000>;
354 regulator-state-mem {
355 regulator-off-in-suspend;
360 regulator-name = "vcc_3v0";
363 regulator-min-microvolt = <3000000>;
364 regulator-max-microvolt = <3000000>;
365 regulator-state-mem {
366 regulator-on-in-suspend;
367 regulator-suspend-microvolt = <3000000>;
371 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
372 regulator-name = "vcc3v3_s3";
375 regulator-state-mem {
376 regulator-off-in-suspend;
380 vcc3v3_s0: SWITCH_REG2 {
381 regulator-name = "vcc3v3_s0";
384 regulator-state-mem {
385 regulator-off-in-suspend;
391 vdd_cpu_b: regulator@40 {
392 compatible = "silergy,syr827";
394 fcs,suspend-voltage-selector = <1>;
395 regulator-name = "vdd_cpu_b";
396 regulator-min-microvolt = <712500>;
397 regulator-max-microvolt = <1500000>;
398 regulator-ramp-delay = <1000>;
401 vin-supply = <&vcc_sys>;
403 regulator-state-mem {
404 regulator-off-in-suspend;
408 vdd_gpu: regulator@41 {
409 compatible = "silergy,syr828";
411 fcs,suspend-voltage-selector = <1>;
412 regulator-name = "vdd_gpu";
413 regulator-min-microvolt = <712500>;
414 regulator-max-microvolt = <1500000>;
415 regulator-ramp-delay = <1000>;
418 vin-supply = <&vcc_sys>;
420 regulator-state-mem {
421 regulator-off-in-suspend;
426 compatible = "pwm-regulator";
427 pwms = <&pwm2 0 25000 1>;
428 regulator-name = "vdd_log";
431 regulator-min-microvolt = <800000>;
432 regulator-max-microvolt = <1400000>;
433 vin-supply = <&vcc_sys>;
438 i2c-scl-rising-time-ns = <450>;
439 i2c-scl-falling-time-ns = <15>;
446 bt656-supply = <&vcc_3v0>;
447 audio-supply = <&vcca1v8_codec>;
448 sdmmc-supply = <&vcc_sdio>;
449 gpio1830-supply = <&vcc_3v0>;
457 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
458 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
459 assigned-clock-rates = <100000000>;
460 ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
462 pinctrl-names = "default";
463 pinctrl-0 = <&pcie_clkreqn_cpm>;
468 pmu1830-supply = <&vcc_3v0>;
474 pmic_int_l: pmic-int-l {
476 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
479 pmic_dvs2: pmic-dvs2 {
481 <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
484 vsel1_gpio: vsel1-gpio {
485 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
488 vsel2_gpio: vsel2-gpio {
489 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
494 vcc5v0_host_en: vcc5v0-host-en {
496 <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
510 vref-supply = <&vcca1v8_s3>;
516 keep-power-in-suspend;
518 mmc-hs400-enhanced-strobe;
527 clock-frequency = <50000000>;
529 keep-power-in-suspend;
530 max-frequency = <50000000>;
531 mmc-pwrseq = <&sdio_pwrseq>;
533 pinctrl-names = "default";
534 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
543 clock-frequency = <150000000>;
545 max-frequency = <150000000>;
546 pinctrl-names = "default";
547 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
548 vqmmc-supply = <&vcc_sdio>;
553 /* tshut mode 0:CRU 1:GPIO */
554 rockchip,hw-tshut-mode = <1>;
555 /* tshut polarity 0:LOW 1:HIGH */
556 rockchip,hw-tshut-polarity = <1>;
563 u2phy0_otg: otg-port {
567 u2phy0_host: host-port {
568 phy-supply = <&vcc5v0_host>;
576 u2phy1_otg: otg-port {
580 u2phy1_host: host-port {
581 phy-supply = <&vcc5v0_host>;
587 pinctrl-names = "default";
588 pinctrl-0 = <&uart0_xfer &uart0_cts>;