arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts

   1 /*
   2  * dts file for Xilinx ZynqMP ep108 development board
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  */
  13
  14 /dts-v1/;
  15
  16 #include "zynqmp.dtsi"
  17 #include "zynqmp-ep108-clk.dtsi"
  18
  19 / {
  20         model = "ZynqMP EP108";
  21
  22         aliases {
  23                 mmc0 = &sdhci0;
  24                 mmc1 = &sdhci1;
  25                 serial0 = &uart0;
  26         };
  27
  28         chosen {
  29                 stdout-path = "serial0:115200n8";
  30         };
  31
  32         memory@0 {
  33                 device_type = "memory";
  34                 reg = <0x0 0x0 0x0 0x40000000>;
  35         };
  36 };
  37
  38 &can0 {
  39         status = "okay";
  40 };
  41
  42 &can1 {
  43         status = "okay";
  44 };
  45
  46 &gem0 {
  47         status = "okay";
  48         phy-handle = <&phy0>;
  49         phy-mode = "rgmii-id";
  50         phy0: phy@0{
  51                 reg = <0>;
  52                 max-speed = <100>;
  53         };
  54 };
  55
  56 &gpio {
  57         status = "okay";
  58 };
  59
  60 &i2c0 {
  61         status = "okay";
  62         clock-frequency = <400000>;
  63         eeprom@54 {
  64                 compatible = "atmel,24c64";
  65                 reg = <0x54>;
  66         };
  67 };
  68
  69 &i2c1 {
  70         status = "okay";
  71         clock-frequency = <400000>;
  72         eeprom@55 {
  73                 compatible = "atmel,24c64";
  74                 reg = <0x55>;
  75         };
  76 };
  77
  78 &sata {
  79         status = "okay";
  80         ceva,broken-gen2;
  81 };
  82
  83 &sdhci0 {
  84         status = "okay";
  85 };
  86
  87 &sdhci1 {
  88         status = "okay";
  89 };
  90
  91 &spi0 {
  92         status = "okay";
  93         num-cs = <1>;
  94         spi0_flash0: spi0_flash0@0 {
  95                 compatible = "m25p80";
  96                 #address-cells = <1>;
  97                 #size-cells = <1>;
  98                 spi-max-frequency = <50000000>;
  99                 reg = <0>;
 100
 101                 spi0_flash0@0 {
 102                         label = "spi0_flash0";
 103                         reg = <0x0 0x100000>;
 104                 };
 105         };
 106 };
 107
 108 &spi1 {
 109         status = "okay";
 110         num-cs = <1>;
 111         spi1_flash0: spi1_flash0@0 {
 112                 compatible = "m25p80";
 113                 #address-cells = <1>;
 114                 #size-cells = <1>;
 115                 spi-max-frequency = <50000000>;
 116                 reg = <0>;
 117
 118                 spi1_flash0@0 {
 119                         label = "spi1_flash0";
 120                         reg = <0x0 0x100000>;
 121                 };
 122         };
 123 };
 124
 125 &uart0 {
 126         status = "okay";
 127 };
 128
 129 &usb0 {
 130         status = "okay";
 131         dr_mode = "peripheral";
 132         maximum-speed = "high-speed";
 133 };
 134
 135 &usb1 {
 136         status = "okay";
 137         dr_mode = "host";
 138         maximum-speed = "high-speed";
 139 };
 140
 141 &watchdog0 {
 142         status = "okay";
 143 };