1 # SPDX-License-Identifier: GPL-2.0
4 depends on (BF512 || BF514 || BF516 || BF518)
8 source "arch/blackfin/mach-bf518/boards/Kconfig"
10 menu "BF518 Specific Configuration"
12 comment "Alternative Multiplexing Scheme"
15 prompt "PWM Channel Pins"
16 default BF518_PWM_ALL_PORTF
18 Select pins used for the PWM channels:
19 PWM_AH PWM_AL PWM_BH PWM_BL PWM_CH PWM_CL
21 See the Hardware Reference Manual for more details.
23 config BF518_PWM_ALL_PORTF
26 PF{1,2,3,4,5,6} <-> PWM_{AH,AL,BH,BL,CH,CL}
28 config BF518_PWM_PORTF_PORTG
29 bool "PF11 - PF14 / PG1 - PG2"
31 PF{11,12,13,14} <-> PWM_{AH,AL,BH,BL}
32 PG{1,2} <-> PWM_{CH,CL}
38 default BF518_PWM_SYNC_PF7
40 Select the pin used for PWM_SYNC.
42 See the Hardware Reference Manual for more details.
44 config BF518_PWM_SYNC_PF7
46 config BF518_PWM_SYNC_PF15
51 prompt "PWM Trip B Pin"
52 default BF518_PWM_TRIPB_PG10
54 Select the pin used for PWM_TRIPB.
56 See the Hardware Reference Manual for more details.
58 config BF518_PWM_TRIPB_PG10
60 config BF518_PWM_TRIPB_PG14
65 prompt "PPI / Timer Pins"
66 default BF518_PPI_TMR_PG5
68 Select pins used for PPI/Timer:
72 See the Hardware Reference Manual for more details.
74 config BF518_PPI_TMR_PG5
77 PG{5,6,7} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
79 config BF518_PPI_TMR_PG12
82 PG{12,13,14} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
86 comment "Hysteresis/Schmitt Trigger Control"
87 config BFIN_HYSTERESIS_CONTROL
88 bool "Enable Hysteresis Control"
90 The ADSP-BF51x allows to control input hysteresis for Port F,
91 Port G and Port H and other processor signal inputs.
92 The Schmitt trigger enables can be set only for pin groups.
93 Saying Y will overwrite the default reset or boot loader
97 depends on BFIN_HYSTERESIS_CONTROL
98 config GPIO_HYST_PORTF_0_7
99 bool "Enable Hysteresis on PORTF {0...7}"
100 config GPIO_HYST_PORTF_8_9
101 bool "Enable Hysteresis on PORTF {8, 9}"
102 config GPIO_HYST_PORTF_10
103 bool "Enable Hysteresis on PORTF 10"
104 config GPIO_HYST_PORTF_11
105 bool "Enable Hysteresis on PORTF 11"
106 config GPIO_HYST_PORTF_12_13
107 bool "Enable Hysteresis on PORTF {12, 13}"
108 config GPIO_HYST_PORTF_14_15
109 bool "Enable Hysteresis on PORTF {14, 15}"
113 depends on BFIN_HYSTERESIS_CONTROL
114 config GPIO_HYST_PORTG_0
115 bool "Enable Hysteresis on PORTG 0"
116 config GPIO_HYST_PORTG_1_4
117 bool "Enable Hysteresis on PORTG {1...4}"
118 config GPIO_HYST_PORTG_5_6
119 bool "Enable Hysteresis on PORTG {5, 6}"
120 config GPIO_HYST_PORTG_7_8
121 bool "Enable Hysteresis on PORTG {7, 8}"
122 config GPIO_HYST_PORTG_9
123 bool "Enable Hysteresis on PORTG 9"
124 config GPIO_HYST_PORTG_10
125 bool "Enable Hysteresis on PORTG 10"
126 config GPIO_HYST_PORTG_11_13
127 bool "Enable Hysteresis on PORTG {11...13}"
128 config GPIO_HYST_PORTG_14_15
129 bool "Enable Hysteresis on PORTG {14, 15}"
133 depends on BFIN_HYSTERESIS_CONTROL
134 config GPIO_HYST_PORTH_0_7
135 bool "Enable Hysteresis on PORTH {0...7}"
140 depends on BFIN_HYSTERESIS_CONTROL
141 config NONEGPIO_HYST_NMI_RST_BMODE
142 bool "Enable Hysteresis on {NMI, RESET, BMODE}"
143 config NONEGPIO_HYST_JTAG
144 bool "Enable Hysteresis on JTAG"
147 comment "Interrupt Priority Assignment"
150 config IRQ_PLL_WAKEUP
153 config IRQ_DMA0_ERROR
174 config IRQ_SPORT0_ERROR
175 int "IRQ_SPORT0_ERROR"
177 config IRQ_SPORT1_ERROR
178 int "IRQ_SPORT1_ERROR"
183 config IRQ_UART0_ERROR
184 int "IRQ_UART0_ERROR"
186 config IRQ_UART1_ERROR
187 int "IRQ_UART1_ERROR"
234 config IRQ_PORTH_INTA
240 config IRQ_PORTH_INTB
245 default 7 if TICKSOURCE_GPTMR0
268 config IRQ_PORTG_INTA
271 config IRQ_PORTG_INTB
283 config IRQ_PORTF_INTA
286 config IRQ_PORTF_INTB
289 config IRQ_SPI0_ERROR
292 config IRQ_SPI1_ERROR
312 Enter the priority numbers between 7-13 ONLY. Others are Reserved.
313 This applies to all the above. It is not recommended to assign the
314 highest priority number 7 to UART or any other device.