1 # SPDX-License-Identifier: GPL-2.0
4 depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527)
8 source "arch/blackfin/mach-bf527/boards/Kconfig"
10 menu "BF527 Specific Configuration"
12 comment "Alternative Multiplexing Scheme"
16 default BF527_SPORT0_PORTG
18 Select PORT used for SPORT0. See Hardware Reference Manual
20 config BF527_SPORT0_PORTF
25 config BF527_SPORT0_PORTG
32 prompt "SPORT0 TSCLK Location"
33 depends on BF527_SPORT0_PORTG
34 default BF527_SPORT0_TSCLK_PG10
36 Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual
38 config BF527_SPORT0_TSCLK_PG10
43 config BF527_SPORT0_TSCLK_PG14
51 default BF527_UART1_PORTF
53 Select PORT used for UART1. See Hardware Reference Manual
55 config BF527_UART1_PORTF
60 config BF527_UART1_PORTG
67 prompt "NAND (NFC) Data"
68 default BF527_NAND_D_PORTH
70 Select PORT used for NAND Data Bus. See Hardware Reference Manual
72 config BF527_NAND_D_PORTF
77 config BF527_NAND_D_PORTH
83 comment "Hysteresis/Schmitt Trigger Control"
84 config BFIN_HYSTERESIS_CONTROL
85 bool "Enable Hysteresis Control"
87 The ADSP-BF52x allows to control input hysteresis for Port F,
88 Port G and Port H and other processor signal inputs.
89 The Schmitt trigger enables can be set only for pin groups.
90 Saying Y will overwrite the default reset or boot loader
94 depends on BFIN_HYSTERESIS_CONTROL
95 config GPIO_HYST_PORTF_0_7
96 bool "Enable Hysteresis on PORTF {0...7}"
97 config GPIO_HYST_PORTF_8_9
98 bool "Enable Hysteresis on PORTF {8, 9}"
99 config GPIO_HYST_PORTF_10
100 bool "Enable Hysteresis on PORTF 10"
101 config GPIO_HYST_PORTF_11
102 bool "Enable Hysteresis on PORTF 11"
103 config GPIO_HYST_PORTF_12_13
104 bool "Enable Hysteresis on PORTF {12, 13}"
105 config GPIO_HYST_PORTF_14_15
106 bool "Enable Hysteresis on PORTF {14, 15}"
110 depends on BFIN_HYSTERESIS_CONTROL
111 config GPIO_HYST_PORTG_0
112 bool "Enable Hysteresis on PORTG 0"
113 config GPIO_HYST_PORTG_1_4
114 bool "Enable Hysteresis on PORTG {1...4}"
115 config GPIO_HYST_PORTG_5_6
116 bool "Enable Hysteresis on PORTG {5, 6}"
117 config GPIO_HYST_PORTG_7_8
118 bool "Enable Hysteresis on PORTG {7, 8}"
119 config GPIO_HYST_PORTG_9
120 bool "Enable Hysteresis on PORTG 9"
121 config GPIO_HYST_PORTG_10
122 bool "Enable Hysteresis on PORTG 10"
123 config GPIO_HYST_PORTG_11_13
124 bool "Enable Hysteresis on PORTG {11...13}"
125 config GPIO_HYST_PORTG_14_15
126 bool "Enable Hysteresis on PORTG {14, 15}"
130 depends on BFIN_HYSTERESIS_CONTROL
131 config GPIO_HYST_PORTH_0_7
132 bool "Enable Hysteresis on PORTH {0...7}"
133 config GPIO_HYST_PORTH_8
134 bool "Enable Hysteresis on PORTH 8"
135 config GPIO_HYST_PORTH_9_15
136 bool "Enable Hysteresis on PORTH {9...15}"
140 depends on BFIN_HYSTERESIS_CONTROL
141 config NONEGPIO_HYST_TMR0_FS1_PPICLK
142 bool "Enable Hysteresis on {TMR0, PPI_FS1, PPI_CLK}"
143 config NONEGPIO_HYST_NMI_RST_BMODE
144 bool "Enable Hysteresis on {NMI, RESET, BMODE}"
145 config NONEGPIO_HYST_JTAG
146 bool "Enable Hysteresis on JTAG"
149 comment "Interrupt Priority Assignment"
152 config IRQ_PLL_WAKEUP
155 config IRQ_DMA0_ERROR
176 config IRQ_SPORT0_ERROR
177 int "IRQ_SPORT0_ERROR"
179 config IRQ_SPORT1_ERROR
180 int "IRQ_SPORT1_ERROR"
182 config IRQ_UART0_ERROR
183 int "IRQ_UART0_ERROR"
185 config IRQ_UART1_ERROR
186 int "IRQ_UART1_ERROR"
233 config IRQ_PORTH_INTA
239 config IRQ_PORTH_INTB
244 default 7 if TICKSOURCE_GPTMR0
267 config IRQ_PORTG_INTA
270 config IRQ_PORTG_INTB
282 config IRQ_PORTF_INTA
285 config IRQ_PORTF_INTB
294 config IRQ_HDMA_ERROR
317 Enter the priority numbers between 7-13 ONLY. Others are Reserved.
318 This applies to all the above. It is not recommended to assign the
319 highest priority number 7 to UART or any other device.