1 /* Load firmware into Core B on a BF561
3 * Author: Bas Vermeulen <bvermeul@blackstar.xs4all.nl>
5 * Copyright 2004-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
9 /* The Core B reset func requires code in the application that is loaded into
10 * Core B. In order to reset, the application needs to install an interrupt
11 * handler for Supplemental Interrupt 0, that sets RETI to 0xff600000 and
12 * writes bit 11 of SICB_SYSCR when bit 5 of SICA_SYSCR is 0. This causes Core
13 * B to stall when Supplemental Interrupt 0 is set, and will reset PC to
14 * 0xff600000 when COREB_SRAM_INIT is cleared.
17 #include <linux/device.h>
19 #include <linux/init.h>
20 #include <linux/kernel.h>
21 #include <linux/miscdevice.h>
23 #define CMD_COREB_START _IO('b', 0)
24 #define CMD_COREB_STOP _IO('b', 1)
25 #define CMD_COREB_RESET _IO('b', 2)
28 coreb_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
34 bfin_write_SYSCR(bfin_read_SYSCR() & ~0x0020);
37 bfin_write_SYSCR(bfin_read_SYSCR() | 0x0020);
38 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080);
41 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080);
53 static const struct file_operations coreb_fops
= {
55 .unlocked_ioctl
= coreb_ioctl
,
56 .llseek
= noop_llseek
,
59 static struct miscdevice coreb_dev
= {
60 .minor
= MISC_DYNAMIC_MINOR
,
64 builtin_misc_device(coreb_dev
);