arch/frv/mm/mmu-context.c

   1 /* mmu-context.c: MMU context allocation and management
   2  *
   3  * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <linux/sched.h>
  13 #include <linux/sched/mm.h>
  14 #include <linux/sched/task.h>
  15 #include <linux/mm.h>
  16 #include <asm/tlbflush.h>
  17
  18 #define NR_CXN  4096
  19
  20 static unsigned long cxn_bitmap[NR_CXN / (sizeof(unsigned long) * 8)];
  21 static LIST_HEAD(cxn_owners_lru);
  22 static DEFINE_SPINLOCK(cxn_owners_lock);
  23
  24 int __nongpreldata cxn_pinned = -1;
  25
  26
  27 /*****************************************************************************/
  28 /*
  29  * initialise a new context
  30  */
  31 int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
  32 {
  33         memset(&mm->context, 0, sizeof(mm->context));
  34         INIT_LIST_HEAD(&mm->context.id_link);
  35         mm->context.itlb_cached_pge = 0xffffffffUL;
  36         mm->context.dtlb_cached_pge = 0xffffffffUL;
  37
  38         return 0;
  39 } /* end init_new_context() */
  40
  41 /*****************************************************************************/
  42 /*
  43  * make sure a kernel MMU context has a CPU context number
  44  * - call with cxn_owners_lock held
  45  */
  46 static unsigned get_cxn(mm_context_t *ctx)
  47 {
  48         struct list_head *_p;
  49         mm_context_t *p;
  50         unsigned cxn;
  51
  52         if (!list_empty(&ctx->id_link)) {
  53                 list_move_tail(&ctx->id_link, &cxn_owners_lru);
  54         }
  55         else {
  56                 /* find the first unallocated context number
  57                  * - 0 is reserved for the kernel
  58                  */
  59                 cxn = find_next_zero_bit(cxn_bitmap, NR_CXN, 1);
  60                 if (cxn < NR_CXN) {
  61                         set_bit(cxn, cxn_bitmap);
  62                 }
  63                 else {
  64                         /* none remaining - need to steal someone else's cxn */
  65                         p = NULL;
  66                         list_for_each(_p, &cxn_owners_lru) {
  67                                 p = list_entry(_p, mm_context_t, id_link);
  68                                 if (!p->id_busy && p->id != cxn_pinned)
  69                                         break;
  70                         }
  71
  72                         BUG_ON(_p == &cxn_owners_lru);
  73
  74                         cxn = p->id;
  75                         p->id = 0;
  76                         list_del_init(&p->id_link);
  77                         __flush_tlb_mm(cxn);
  78                 }
  79
  80                 ctx->id = cxn;
  81                 list_add_tail(&ctx->id_link, &cxn_owners_lru);
  82         }
  83
  84         return ctx->id;
  85 } /* end get_cxn() */
  86
  87 /*****************************************************************************/
  88 /*
  89  * restore the current TLB miss handler mapped page tables into the MMU context and set up a
  90  * mapping for the page directory
  91  */
  92 void change_mm_context(mm_context_t *old, mm_context_t *ctx, pgd_t *pgd)
  93 {
  94         unsigned long _pgd;
  95
  96         _pgd = virt_to_phys(pgd);
  97
  98         /* save the state of the outgoing MMU context */
  99         old->id_busy = 0;
 100
 101         asm volatile("movsg scr0,%0"   : "=r"(old->itlb_cached_pge));
 102         asm volatile("movsg dampr4,%0" : "=r"(old->itlb_ptd_mapping));
 103         asm volatile("movsg scr1,%0"   : "=r"(old->dtlb_cached_pge));
 104         asm volatile("movsg dampr5,%0" : "=r"(old->dtlb_ptd_mapping));
 105
 106         /* select an MMU context number */
 107         spin_lock(&cxn_owners_lock);
 108         get_cxn(ctx);
 109         ctx->id_busy = 1;
 110         spin_unlock(&cxn_owners_lock);
 111
 112         asm volatile("movgs %0,cxnr"   : : "r"(ctx->id));
 113
 114         /* restore the state of the incoming MMU context */
 115         asm volatile("movgs %0,scr0"   : : "r"(ctx->itlb_cached_pge));
 116         asm volatile("movgs %0,dampr4" : : "r"(ctx->itlb_ptd_mapping));
 117         asm volatile("movgs %0,scr1"   : : "r"(ctx->dtlb_cached_pge));
 118         asm volatile("movgs %0,dampr5" : : "r"(ctx->dtlb_ptd_mapping));
 119
 120         /* map the PGD into uncached virtual memory */
 121         asm volatile("movgs %0,ttbr"   : : "r"(_pgd));
 122         asm volatile("movgs %0,dampr3"
 123                      :: "r"(_pgd | xAMPRx_L | xAMPRx_M | xAMPRx_SS_16Kb |
 124                             xAMPRx_S | xAMPRx_C | xAMPRx_V));
 125
 126 } /* end change_mm_context() */
 127
 128 /*****************************************************************************/
 129 /*
 130  * finished with an MMU context number
 131  */
 132 void destroy_context(struct mm_struct *mm)
 133 {
 134         mm_context_t *ctx = &mm->context;
 135
 136         spin_lock(&cxn_owners_lock);
 137
 138         if (!list_empty(&ctx->id_link)) {
 139                 if (ctx->id == cxn_pinned)
 140                         cxn_pinned = -1;
 141
 142                 list_del_init(&ctx->id_link);
 143                 clear_bit(ctx->id, cxn_bitmap);
 144                 __flush_tlb_mm(ctx->id);
 145                 ctx->id = 0;
 146         }
 147
 148         spin_unlock(&cxn_owners_lock);
 149 } /* end destroy_context() */
 150
 151 /*****************************************************************************/
 152 /*
 153  * display the MMU context currently a process is currently using
 154  */
 155 #ifdef CONFIG_PROC_FS
 156 char *proc_pid_status_frv_cxnr(struct mm_struct *mm, char *buffer)
 157 {
 158         spin_lock(&cxn_owners_lock);
 159         buffer += sprintf(buffer, "CXNR: %u\n", mm->context.id);
 160         spin_unlock(&cxn_owners_lock);
 161
 162         return buffer;
 163 } /* end proc_pid_status_frv_cxnr() */
 164 #endif
 165
 166 /*****************************************************************************/
 167 /*
 168  * (un)pin a process's mm_struct's MMU context ID
 169  */
 170 int cxn_pin_by_pid(pid_t pid)
 171 {
 172         struct task_struct *tsk;
 173         struct mm_struct *mm = NULL;
 174         int ret;
 175
 176         /* unpin if pid is zero */
 177         if (pid == 0) {
 178                 cxn_pinned = -1;
 179                 return 0;
 180         }
 181
 182         ret = -ESRCH;
 183
 184         /* get a handle on the mm_struct */
 185         read_lock(&tasklist_lock);
 186         tsk = find_task_by_vpid(pid);
 187         if (tsk) {
 188                 ret = -EINVAL;
 189
 190                 task_lock(tsk);
 191                 if (tsk->mm) {
 192                         mm = tsk->mm;
 193                         mmget(mm);
 194                         ret = 0;
 195                 }
 196                 task_unlock(tsk);
 197         }
 198         read_unlock(&tasklist_lock);
 199
 200         if (ret < 0)
 201                 return ret;
 202
 203         /* make sure it has a CXN and pin it */
 204         spin_lock(&cxn_owners_lock);
 205         cxn_pinned = get_cxn(&mm->context);
 206         spin_unlock(&cxn_owners_lock);
 207
 208         mmput(mm);
 209         return 0;
 210 } /* end cxn_pin_by_pid() */