arch/mips/include/asm/dec/ecc.h

   1 /*
   2  *      include/asm-mips/dec/ecc.h
   3  *
   4  *      ECC handling logic definitions common to DECstation/DECsystem
   5  *      5000/200 (KN02), 5000/240 (KN03), 5000/260 (KN05) and
   6  *      DECsystem 5900 (KN03), 5900/260 (KN05) systems.
   7  *
   8  *      Copyright (C) 2003  Maciej W. Rozycki
   9  *
  10  *      This program is free software; you can redistribute it and/or
  11  *      modify it under the terms of the GNU General Public License
  12  *      as published by the Free Software Foundation; either version
  13  *      2 of the License, or (at your option) any later version.
  14  */
  15 #ifndef __ASM_MIPS_DEC_ECC_H
  16 #define __ASM_MIPS_DEC_ECC_H
  17
  18 /*
  19  * Error Address Register bits.
  20  * The register is r/wc -- any write clears it.
  21  */
  22 #define KN0X_EAR_VALID          (1<<31)         /* error data valid, bus IRQ */
  23 #define KN0X_EAR_CPU            (1<<30)         /* CPU/DMA transaction */
  24 #define KN0X_EAR_WRITE          (1<<29)         /* write/read transaction */
  25 #define KN0X_EAR_ECCERR         (1<<28)         /* ECC/timeout or overrun */
  26 #define KN0X_EAR_RES_27         (1<<27)         /* unused */
  27 #define KN0X_EAR_ADDRESS        (0x7ffffff<<0)  /* address involved */
  28
  29 /*
  30  * Error Syndrome Register bits.
  31  * The register is frozen when EAR.VALID is set, otherwise it records bits
  32  * from the last memory read.  The register is r/wc -- any write clears it.
  33  */
  34 #define KN0X_ESR_VLDHI          (1<<31)         /* error data valid hi word */
  35 #define KN0X_ESR_CHKHI          (0x7f<<24)      /* check bits read from mem */
  36 #define KN0X_ESR_SNGHI          (1<<23)         /* single/double bit error */
  37 #define KN0X_ESR_SYNHI          (0x7f<<16)      /* syndrome from ECC logic */
  38 #define KN0X_ESR_VLDLO          (1<<15)         /* error data valid lo word */
  39 #define KN0X_ESR_CHKLO          (0x7f<<8)       /* check bits read from mem */
  40 #define KN0X_ESR_SNGLO          (1<<7)          /* single/double bit error */
  41 #define KN0X_ESR_SYNLO          (0x7f<<0)       /* syndrome from ECC logic */
  42
  43
  44 #ifndef __ASSEMBLY__
  45
  46 #include <linux/interrupt.h>
  47
  48 struct pt_regs;
  49
  50 extern void dec_ecc_be_init(void);
  51 extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup);
  52 extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id);
  53 #endif
  54
  55 #endif /* __ASM_MIPS_DEC_ECC_H */