Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / arch / mips / include / asm / mach-au1x00 / gpio-au1300.h
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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * gpio-au1300.h -- GPIO control for Au1300 GPIC and compatibles.
5 * Copyright (c) 2009-2011 Manuel Lauss <manuel.lauss@googlemail.com>
6 */
8 #ifndef _GPIO_AU1300_H_
9 #define _GPIO_AU1300_H_
11 #include <asm/addrspace.h>
12 #include <asm/io.h>
13 #include <asm/mach-au1x00/au1000.h>
15 struct gpio;
16 struct gpio_chip;
18 /* with the current GPIC design, up to 128 GPIOs are possible.
19 * The only implementation so far is in the Au1300, which has 75 externally
20 * available GPIOs.
22 #define AU1300_GPIO_BASE 0
23 #define AU1300_GPIO_NUM 75
24 #define AU1300_GPIO_MAX (AU1300_GPIO_BASE + AU1300_GPIO_NUM - 1)
26 #define AU1300_GPIC_ADDR \
27 (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR)
29 static inline int au1300_gpio_get_value(unsigned int gpio)
31 void __iomem *roff = AU1300_GPIC_ADDR;
32 int bit;
34 gpio -= AU1300_GPIO_BASE;
35 roff += GPIC_GPIO_BANKOFF(gpio);
36 bit = GPIC_GPIO_TO_BIT(gpio);
37 return __raw_readl(roff + AU1300_GPIC_PINVAL) & bit;
40 static inline int au1300_gpio_direction_input(unsigned int gpio)
42 void __iomem *roff = AU1300_GPIC_ADDR;
43 unsigned long bit;
45 gpio -= AU1300_GPIO_BASE;
47 roff += GPIC_GPIO_BANKOFF(gpio);
48 bit = GPIC_GPIO_TO_BIT(gpio);
49 __raw_writel(bit, roff + AU1300_GPIC_DEVCLR);
50 wmb();
52 return 0;
55 static inline int au1300_gpio_set_value(unsigned int gpio, int v)
57 void __iomem *roff = AU1300_GPIC_ADDR;
58 unsigned long bit;
60 gpio -= AU1300_GPIO_BASE;
62 roff += GPIC_GPIO_BANKOFF(gpio);
63 bit = GPIC_GPIO_TO_BIT(gpio);
64 __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL
65 : AU1300_GPIC_PINVALCLR));
66 wmb();
68 return 0;
71 static inline int au1300_gpio_direction_output(unsigned int gpio, int v)
73 /* hw switches to output automatically */
74 return au1300_gpio_set_value(gpio, v);
77 static inline int au1300_gpio_to_irq(unsigned int gpio)
79 return AU1300_FIRST_INT + (gpio - AU1300_GPIO_BASE);
82 static inline int au1300_irq_to_gpio(unsigned int irq)
84 return (irq - AU1300_FIRST_INT) + AU1300_GPIO_BASE;
87 static inline int au1300_gpio_is_valid(unsigned int gpio)
89 int ret;
91 switch (alchemy_get_cputype()) {
92 case ALCHEMY_CPU_AU1300:
93 ret = ((gpio >= AU1300_GPIO_BASE) && (gpio <= AU1300_GPIO_MAX));
94 break;
95 default:
96 ret = 0;
98 return ret;
101 static inline int au1300_gpio_cansleep(unsigned int gpio)
103 return 0;
106 /* hardware remembers gpio 0-63 levels on powerup */
107 static inline int au1300_gpio_getinitlvl(unsigned int gpio)
109 void __iomem *roff = AU1300_GPIC_ADDR;
110 unsigned long v;
112 if (unlikely(gpio > 63))
113 return 0;
114 else if (gpio > 31) {
115 gpio -= 32;
116 roff += 4;
119 v = __raw_readl(roff + AU1300_GPIC_RSTVAL);
120 return (v >> gpio) & 1;
123 /**********************************************************************/
125 /* Linux gpio framework integration.
127 * 4 use cases of Alchemy GPIOS:
128 *(1) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=y:
129 * Board must register gpiochips.
130 *(2) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=n:
131 * A gpiochip for the 75 GPIOs is registered.
133 *(3) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=y:
134 * the boards' gpio.h must provide the linux gpio wrapper functions,
136 *(4) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=n:
137 * inlinable gpio functions are provided which enable access to the
138 * Au1300 gpios only by using the numbers straight out of the data-
139 * sheets.
141 * Cases 1 and 3 are intended for boards which want to provide their own
142 * GPIO namespace and -operations (i.e. for example you have 8 GPIOs
143 * which are in part provided by spare Au1300 GPIO pins and in part by
144 * an external FPGA but you still want them to be accessible in linux
145 * as gpio0-7. The board can of course use the alchemy_gpioX_* functions
146 * as required).
149 #ifndef CONFIG_GPIOLIB
151 #ifdef CONFIG_ALCHEMY_GPIOINT_AU1300
153 #ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (4) */
155 static inline int gpio_direction_input(unsigned int gpio)
157 return au1300_gpio_direction_input(gpio);
160 static inline int gpio_direction_output(unsigned int gpio, int v)
162 return au1300_gpio_direction_output(gpio, v);
165 static inline int gpio_get_value(unsigned int gpio)
167 return au1300_gpio_get_value(gpio);
170 static inline void gpio_set_value(unsigned int gpio, int v)
172 au1300_gpio_set_value(gpio, v);
175 static inline int gpio_get_value_cansleep(unsigned gpio)
177 return gpio_get_value(gpio);
180 static inline void gpio_set_value_cansleep(unsigned gpio, int value)
182 gpio_set_value(gpio, value);
185 static inline int gpio_is_valid(unsigned int gpio)
187 return au1300_gpio_is_valid(gpio);
190 static inline int gpio_cansleep(unsigned int gpio)
192 return au1300_gpio_cansleep(gpio);
195 static inline int gpio_to_irq(unsigned int gpio)
197 return au1300_gpio_to_irq(gpio);
200 static inline int irq_to_gpio(unsigned int irq)
202 return au1300_irq_to_gpio(irq);
205 static inline int gpio_request(unsigned int gpio, const char *label)
207 return 0;
210 static inline int gpio_request_one(unsigned gpio,
211 unsigned long flags, const char *label)
213 return 0;
216 static inline int gpio_request_array(struct gpio *array, size_t num)
218 return 0;
221 static inline void gpio_free(unsigned gpio)
225 static inline void gpio_free_array(struct gpio *array, size_t num)
229 static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
231 return -ENOSYS;
234 static inline void gpio_unexport(unsigned gpio)
238 static inline int gpio_export(unsigned gpio, bool direction_may_change)
240 return -ENOSYS;
243 static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
245 return -ENOSYS;
248 static inline int gpio_export_link(struct device *dev, const char *name,
249 unsigned gpio)
251 return -ENOSYS;
254 #endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */
256 #endif /* CONFIG_ALCHEMY_GPIOINT_AU1300 */
258 #endif /* CONFIG GPIOLIB */
260 #endif /* _GPIO_AU1300_H_ */