arch/mips/include/asm/mach-dec/cpu-feature-overrides.h

   1 /*
   2  *      CPU feature overrides for DECstation systems.  Two variations
   3  *      are generally applicable.
   4  *
   5  *      Copyright (C) 2013  Maciej W. Rozycki
   6  *
   7  *      This program is free software; you can redistribute it and/or
   8  *      modify it under the terms of the GNU General Public License
   9  *      as published by the Free Software Foundation; either version
  10  *      2 of the License, or (at your option) any later version.
  11  */
  12 #ifndef __ASM_MACH_DEC_CPU_FEATURE_OVERRIDES_H
  13 #define __ASM_MACH_DEC_CPU_FEATURE_OVERRIDES_H
  14
  15 /* Generic ones first.  */
  16 #define cpu_has_tlb                     1
  17 #define cpu_has_tlbinv                  0
  18 #define cpu_has_segments                0
  19 #define cpu_has_eva                     0
  20 #define cpu_has_htw                     0
  21 #define cpu_has_rixiex                  0
  22 #define cpu_has_maar                    0
  23 #define cpu_has_rw_llb                  0
  24 #define cpu_has_tx39_cache              0
  25 #define cpu_has_divec                   0
  26 #define cpu_has_prefetch                0
  27 #define cpu_has_mcheck                  0
  28 #define cpu_has_ejtag                   0
  29 #define cpu_has_mips16                  0
  30 #define cpu_has_mips16e2                0
  31 #define cpu_has_mdmx                    0
  32 #define cpu_has_mips3d                  0
  33 #define cpu_has_smartmips               0
  34 #define cpu_has_rixi                    0
  35 #define cpu_has_xpa                     0
  36 #define cpu_has_vtag_icache             0
  37 #define cpu_has_ic_fills_f_dc           0
  38 #define cpu_has_pindexed_dcache         0
  39 #define cpu_has_local_ebase             0
  40 #define cpu_icache_snoops_remote_store  1
  41 #define cpu_has_mips_4                  0
  42 #define cpu_has_mips_5                  0
  43 #define cpu_has_mips32r1                0
  44 #define cpu_has_mips32r2                0
  45 #define cpu_has_mips64r1                0
  46 #define cpu_has_mips64r2                0
  47 #define cpu_has_dsp                     0
  48 #define cpu_has_dsp2                    0
  49 #define cpu_has_mipsmt                  0
  50 #define cpu_has_userlocal               0
  51 #define cpu_hwrena_impl_bits            0
  52 #define cpu_has_perf_cntr_intr_bit      0
  53 #define cpu_has_vz                      0
  54 #define cpu_has_fre                     0
  55 #define cpu_has_cdmm                    0
  56
  57 /* R3k-specific ones.  */
  58 #ifdef CONFIG_CPU_R3000
  59 #define cpu_has_3kex                    1
  60 #define cpu_has_4kex                    0
  61 #define cpu_has_3k_cache                1
  62 #define cpu_has_4k_cache                0
  63 #define cpu_has_32fpr                   0
  64 #define cpu_has_counter                 0
  65 #define cpu_has_watch                   0
  66 #define cpu_has_vce                     0
  67 #define cpu_has_cache_cdex_p            0
  68 #define cpu_has_cache_cdex_s            0
  69 #define cpu_has_llsc                    0
  70 #define cpu_has_dc_aliases              0
  71 #define cpu_has_mips_2                  0
  72 #define cpu_has_mips_3                  0
  73 #define cpu_has_nofpuex                 1
  74 #define cpu_has_inclusive_pcaches       0
  75 #define cpu_dcache_line_size()          4
  76 #define cpu_icache_line_size()          4
  77 #define cpu_scache_line_size()          0
  78 #endif /* CONFIG_CPU_R3000 */
  79
  80 /* R4k-specific ones.  */
  81 #ifdef CONFIG_CPU_R4X00
  82 #define cpu_has_3kex                    0
  83 #define cpu_has_4kex                    1
  84 #define cpu_has_3k_cache                0
  85 #define cpu_has_4k_cache                1
  86 #define cpu_has_32fpr                   1
  87 #define cpu_has_counter                 1
  88 #define cpu_has_watch                   1
  89 #define cpu_has_vce                     1
  90 #define cpu_has_cache_cdex_p            1
  91 #define cpu_has_cache_cdex_s            1
  92 #define cpu_has_llsc                    1
  93 #define cpu_has_dc_aliases              (PAGE_SIZE < 0x4000)
  94 #define cpu_has_mips_2                  1
  95 #define cpu_has_mips_3                  1
  96 #define cpu_has_nofpuex                 0
  97 #define cpu_has_inclusive_pcaches       1
  98 #define cpu_dcache_line_size()          16
  99 #define cpu_icache_line_size()          16
 100 #define cpu_scache_line_size()          32
 101 #endif /* CONFIG_CPU_R4X00 */
 102
 103 #endif /* __ASM_MACH_DEC_CPU_FEATURE_OVERRIDES_H */