Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / arch / mips / include / asm / octeon / cvmx-dbg-defs.h
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1 /***********************license start***************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2012 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
28 #ifndef __CVMX_DBG_DEFS_H__
29 #define __CVMX_DBG_DEFS_H__
31 #define CVMX_DBG_DATA (CVMX_ADD_IO_SEG(0x00011F00000001E8ull))
33 union cvmx_dbg_data {
34 uint64_t u64;
35 struct cvmx_dbg_data_s {
36 #ifdef __BIG_ENDIAN_BITFIELD
37 uint64_t reserved_23_63:41;
38 uint64_t c_mul:5;
39 uint64_t dsel_ext:1;
40 uint64_t data:17;
41 #else
42 uint64_t data:17;
43 uint64_t dsel_ext:1;
44 uint64_t c_mul:5;
45 uint64_t reserved_23_63:41;
46 #endif
47 } s;
48 struct cvmx_dbg_data_cn30xx {
49 #ifdef __BIG_ENDIAN_BITFIELD
50 uint64_t reserved_31_63:33;
51 uint64_t pll_mul:3;
52 uint64_t reserved_23_27:5;
53 uint64_t c_mul:5;
54 uint64_t dsel_ext:1;
55 uint64_t data:17;
56 #else
57 uint64_t data:17;
58 uint64_t dsel_ext:1;
59 uint64_t c_mul:5;
60 uint64_t reserved_23_27:5;
61 uint64_t pll_mul:3;
62 uint64_t reserved_31_63:33;
63 #endif
64 } cn30xx;
65 struct cvmx_dbg_data_cn30xx cn31xx;
66 struct cvmx_dbg_data_cn38xx {
67 #ifdef __BIG_ENDIAN_BITFIELD
68 uint64_t reserved_29_63:35;
69 uint64_t d_mul:4;
70 uint64_t dclk_mul2:1;
71 uint64_t cclk_div2:1;
72 uint64_t c_mul:5;
73 uint64_t dsel_ext:1;
74 uint64_t data:17;
75 #else
76 uint64_t data:17;
77 uint64_t dsel_ext:1;
78 uint64_t c_mul:5;
79 uint64_t cclk_div2:1;
80 uint64_t dclk_mul2:1;
81 uint64_t d_mul:4;
82 uint64_t reserved_29_63:35;
83 #endif
84 } cn38xx;
85 struct cvmx_dbg_data_cn38xx cn38xxp2;
86 struct cvmx_dbg_data_cn30xx cn50xx;
87 struct cvmx_dbg_data_cn58xx {
88 #ifdef __BIG_ENDIAN_BITFIELD
89 uint64_t reserved_29_63:35;
90 uint64_t rem:6;
91 uint64_t c_mul:5;
92 uint64_t dsel_ext:1;
93 uint64_t data:17;
94 #else
95 uint64_t data:17;
96 uint64_t dsel_ext:1;
97 uint64_t c_mul:5;
98 uint64_t rem:6;
99 uint64_t reserved_29_63:35;
100 #endif
101 } cn58xx;
102 struct cvmx_dbg_data_cn58xx cn58xxp1;
105 #endif