2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2005-2009 Cavium Networks
9 #ifndef __PCI_OCTEON_H__
10 #define __PCI_OCTEON_H__
12 #include <linux/pci.h>
15 * The physical memory base mapped by BAR1. 256MB at the end of the
18 #define CVMX_PCIE_BAR1_PHYS_BASE ((1ull << 32) - (1ull << 28))
19 #define CVMX_PCIE_BAR1_PHYS_SIZE (1ull << 28)
22 * The RC base of BAR1. gen1 has a 39-bit BAR2, gen2 has 41-bit BAR2,
23 * place BAR1 so it is the same for both.
25 #define CVMX_PCIE_BAR1_RC_BASE (1ull << 41)
28 * pcibios_map_irq() is defined inside pci-octeon.c. All it does is
29 * call the Octeon specific version pointed to by this variable. This
30 * function needs to change for PCI or PCIe based hosts.
32 extern int (*octeon_pcibios_map_irq
)(const struct pci_dev
*dev
,
36 * For PCI (not PCIe) the BAR2 base address.
38 #define OCTEON_BAR2_PCI_ADDRESS 0x8000000000ull
41 * For PCI (not PCIe) the base of the memory mapped by BAR1
43 extern u64 octeon_bar1_pci_phys
;
46 * The following defines are used when octeon_dma_bar_type =
47 * OCTEON_DMA_BAR_TYPE_BIG
49 #define OCTEON_PCI_BAR1_HOLE_BITS 5
50 #define OCTEON_PCI_BAR1_HOLE_SIZE (1ul<<(OCTEON_PCI_BAR1_HOLE_BITS+3))
52 enum octeon_dma_bar_type
{
53 OCTEON_DMA_BAR_TYPE_INVALID
,
54 OCTEON_DMA_BAR_TYPE_SMALL
,
55 OCTEON_DMA_BAR_TYPE_BIG
,
56 OCTEON_DMA_BAR_TYPE_PCIE
,
57 OCTEON_DMA_BAR_TYPE_PCIE2
61 * This tells the DMA mapping system in dma-octeon.c how to map PCI
64 extern enum octeon_dma_bar_type octeon_dma_bar_type
;