arch/mips/include/asm/pci.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  */
   6 #ifndef _ASM_PCI_H
   7 #define _ASM_PCI_H
   8
   9 #include <linux/mm.h>
  10
  11 #ifdef __KERNEL__
  12
  13 /*
  14  * This file essentially defines the interface between board
  15  * specific PCI code and MIPS common PCI code.  Should potentially put
  16  * into include/asm/pci.h file.
  17  */
  18
  19 #include <linux/ioport.h>
  20 #include <linux/list.h>
  21 #include <linux/of.h>
  22
  23 #ifdef CONFIG_PCI_DRIVERS_LEGACY
  24
  25 /*
  26  * Each pci channel is a top-level PCI bus seem by CPU.  A machine  with
  27  * multiple PCI channels may have multiple PCI host controllers or a
  28  * single controller supporting multiple channels.
  29  */
  30 struct pci_controller {
  31         struct list_head list;
  32         struct pci_bus *bus;
  33         struct device_node *of_node;
  34
  35         struct pci_ops *pci_ops;
  36         struct resource *mem_resource;
  37         unsigned long mem_offset;
  38         struct resource *io_resource;
  39         unsigned long io_offset;
  40         unsigned long io_map_base;
  41         struct resource *busn_resource;
  42
  43 #ifndef CONFIG_PCI_DOMAINS_GENERIC
  44         unsigned int index;
  45         /* For compatibility with current (as of July 2003) pciutils
  46            and XFree86. Eventually will be removed. */
  47         unsigned int need_domain_info;
  48 #endif
  49
  50         /* Optional access methods for reading/writing the bus number
  51            of the PCI controller */
  52         int (*get_busno)(void);
  53         void (*set_busno)(int busno);
  54 };
  55
  56 /*
  57  * Used by boards to register their PCI busses before the actual scanning.
  58  */
  59 extern void register_pci_controller(struct pci_controller *hose);
  60
  61 /*
  62  * board supplied pci irq fixup routine
  63  */
  64 extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
  65
  66 /* Do platform specific device initialization at pci_enable_device() time */
  67 extern int pcibios_plat_dev_init(struct pci_dev *dev);
  68
  69 extern char * (*pcibios_plat_setup)(char *str);
  70
  71 #ifdef CONFIG_OF
  72 /* this function parses memory ranges from a device node */
  73 extern void pci_load_of_ranges(struct pci_controller *hose,
  74                                struct device_node *node);
  75 #else
  76 static inline void pci_load_of_ranges(struct pci_controller *hose,
  77                                       struct device_node *node) {}
  78 #endif
  79
  80 #ifdef CONFIG_PCI_DOMAINS_GENERIC
  81 static inline void set_pci_need_domain_info(struct pci_controller *hose,
  82                                             int need_domain_info)
  83 {
  84         /* nothing to do */
  85 }
  86 #elif defined(CONFIG_PCI_DOMAINS)
  87 static inline void set_pci_need_domain_info(struct pci_controller *hose,
  88                                             int need_domain_info)
  89 {
  90         hose->need_domain_info = need_domain_info;
  91 }
  92 #endif /* CONFIG_PCI_DOMAINS */
  93
  94 #endif
  95
  96 /* Can be used to override the logic in pci_scan_bus for skipping
  97    already-configured bus numbers - to be used for buggy BIOSes
  98    or architectures with incomplete PCI setup by the loader */
  99 static inline unsigned int pcibios_assign_all_busses(void)
 100 {
 101         return 1;
 102 }
 103
 104 extern unsigned long PCIBIOS_MIN_IO;
 105 extern unsigned long PCIBIOS_MIN_MEM;
 106
 107 #define PCIBIOS_MIN_CARDBUS_IO  0x4000
 108
 109 #define HAVE_PCI_MMAP
 110 #define ARCH_GENERIC_PCI_MMAP_RESOURCE
 111 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
 112
 113 /*
 114  * Dynamic DMA mapping stuff.
 115  * MIPS has everything mapped statically.
 116  */
 117
 118 #include <linux/types.h>
 119 #include <linux/slab.h>
 120 #include <linux/scatterlist.h>
 121 #include <linux/string.h>
 122 #include <asm/io.h>
 123
 124 /*
 125  * The PCI address space does equal the physical memory address space.
 126  * The networking and block device layers use this boolean for bounce
 127  * buffer decisions.
 128  */
 129 #define PCI_DMA_BUS_IS_PHYS     (1)
 130
 131 #ifdef CONFIG_PCI_DOMAINS_GENERIC
 132 static inline int pci_proc_domain(struct pci_bus *bus)
 133 {
 134         return pci_domain_nr(bus);
 135 }
 136 #elif defined(CONFIG_PCI_DOMAINS)
 137 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
 138
 139 static inline int pci_proc_domain(struct pci_bus *bus)
 140 {
 141         struct pci_controller *hose = bus->sysdata;
 142         return hose->need_domain_info;
 143 }
 144 #endif /* CONFIG_PCI_DOMAINS */
 145
 146 #endif /* __KERNEL__ */
 147
 148 /* Do platform specific device initialization at pci_enable_device() time */
 149 extern int pcibios_plat_dev_init(struct pci_dev *dev);
 150
 151 /* Chances are this interrupt is wired PC-style ...  */
 152 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 153 {
 154         return channel ? 15 : 14;
 155 }
 156
 157 #endif /* _ASM_PCI_H */