arch/mips/include/asm/thread_info.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* thread_info.h: MIPS low-level thread information
   3  *
   4  * Copyright (C) 2002  David Howells (dhowells@redhat.com)
   5  * - Incorporating suggestions made by Linus Torvalds and Dave Miller
   6  */
   7
   8 #ifndef _ASM_THREAD_INFO_H
   9 #define _ASM_THREAD_INFO_H
  10
  11 #ifdef __KERNEL__
  12
  13
  14 #ifndef __ASSEMBLY__
  15
  16 #include <asm/processor.h>
  17
  18 /*
  19  * low level task data that entry.S needs immediate access to
  20  * - this struct should fit entirely inside of one cache line
  21  * - this struct shares the supervisor stack pages
  22  * - if the contents of this structure are changed, the assembly constants
  23  *   must also be changed
  24  */
  25 struct thread_info {
  26         struct task_struct      *task;          /* main task structure */
  27         unsigned long           flags;          /* low level flags */
  28         unsigned long           tp_value;       /* thread pointer */
  29         __u32                   cpu;            /* current CPU */
  30         int                     preempt_count;  /* 0 => preemptable, <0 => BUG */
  31         mm_segment_t            addr_limit;     /*
  32                                                  * thread address space limit:
  33                                                  * 0x7fffffff for user-thead
  34                                                  * 0xffffffff for kernel-thread
  35                                                  */
  36         struct pt_regs          *regs;
  37         long                    syscall;        /* syscall number */
  38 };
  39
  40 /*
  41  * macros/functions for gaining access to the thread information structure
  42  */
  43 #define INIT_THREAD_INFO(tsk)                   \
  44 {                                               \
  45         .task           = &tsk,                 \
  46         .flags          = _TIF_FIXADE,          \
  47         .cpu            = 0,                    \
  48         .preempt_count  = INIT_PREEMPT_COUNT,   \
  49         .addr_limit     = KERNEL_DS,            \
  50 }
  51
  52 /* How to get the thread information struct from C.  */
  53 register struct thread_info *__current_thread_info __asm__("$28");
  54
  55 static inline struct thread_info *current_thread_info(void)
  56 {
  57         return __current_thread_info;
  58 }
  59
  60 #endif /* !__ASSEMBLY__ */
  61
  62 /* thread information allocation */
  63 #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
  64 #define THREAD_SIZE_ORDER (1)
  65 #endif
  66 #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT)
  67 #define THREAD_SIZE_ORDER (2)
  68 #endif
  69 #ifdef CONFIG_PAGE_SIZE_8KB
  70 #define THREAD_SIZE_ORDER (1)
  71 #endif
  72 #ifdef CONFIG_PAGE_SIZE_16KB
  73 #define THREAD_SIZE_ORDER (0)
  74 #endif
  75 #ifdef CONFIG_PAGE_SIZE_32KB
  76 #define THREAD_SIZE_ORDER (0)
  77 #endif
  78 #ifdef CONFIG_PAGE_SIZE_64KB
  79 #define THREAD_SIZE_ORDER (0)
  80 #endif
  81
  82 #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
  83 #define THREAD_MASK (THREAD_SIZE - 1UL)
  84
  85 #define STACK_WARN      (THREAD_SIZE / 8)
  86
  87 /*
  88  * thread information flags
  89  * - these are process state flags that various assembly files may need to
  90  *   access
  91  * - pending work-to-be-done flags are in LSW
  92  * - other flags in MSW
  93  */
  94 #define TIF_SIGPENDING          1       /* signal pending */
  95 #define TIF_NEED_RESCHED        2       /* rescheduling necessary */
  96 #define TIF_SYSCALL_AUDIT       3       /* syscall auditing active */
  97 #define TIF_SECCOMP             4       /* secure computing */
  98 #define TIF_NOTIFY_RESUME       5       /* callback before returning to user */
  99 #define TIF_UPROBE              6       /* breakpointed or singlestepping */
 100 #define TIF_RESTORE_SIGMASK     9       /* restore signal mask in do_signal() */
 101 #define TIF_USEDFPU             16      /* FPU was used by this task this quantum (SMP) */
 102 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
 103 #define TIF_NOHZ                19      /* in adaptive nohz mode */
 104 #define TIF_FIXADE              20      /* Fix address errors in software */
 105 #define TIF_LOGADE              21      /* Log address errors to syslog */
 106 #define TIF_32BIT_REGS          22      /* 32-bit general purpose registers */
 107 #define TIF_32BIT_ADDR          23      /* 32-bit address space (o32/n32) */
 108 #define TIF_FPUBOUND            24      /* thread bound to FPU-full CPU set */
 109 #define TIF_LOAD_WATCH          25      /* If set, load watch registers */
 110 #define TIF_SYSCALL_TRACEPOINT  26      /* syscall tracepoint instrumentation */
 111 #define TIF_32BIT_FPREGS        27      /* 32-bit floating point registers */
 112 #define TIF_HYBRID_FPREGS       28      /* 64b FP registers, odd singles in bits 63:32 of even doubles */
 113 #define TIF_USEDMSA             29      /* MSA has been used this quantum */
 114 #define TIF_MSA_CTX_LIVE        30      /* MSA context must be preserved */
 115 #define TIF_SYSCALL_TRACE       31      /* syscall trace active */
 116
 117 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 118 #define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
 119 #define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
 120 #define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
 121 #define _TIF_SECCOMP            (1<<TIF_SECCOMP)
 122 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
 123 #define _TIF_UPROBE             (1<<TIF_UPROBE)
 124 #define _TIF_USEDFPU            (1<<TIF_USEDFPU)
 125 #define _TIF_NOHZ               (1<<TIF_NOHZ)
 126 #define _TIF_FIXADE             (1<<TIF_FIXADE)
 127 #define _TIF_LOGADE             (1<<TIF_LOGADE)
 128 #define _TIF_32BIT_REGS         (1<<TIF_32BIT_REGS)
 129 #define _TIF_32BIT_ADDR         (1<<TIF_32BIT_ADDR)
 130 #define _TIF_FPUBOUND           (1<<TIF_FPUBOUND)
 131 #define _TIF_LOAD_WATCH         (1<<TIF_LOAD_WATCH)
 132 #define _TIF_32BIT_FPREGS       (1<<TIF_32BIT_FPREGS)
 133 #define _TIF_HYBRID_FPREGS      (1<<TIF_HYBRID_FPREGS)
 134 #define _TIF_USEDMSA            (1<<TIF_USEDMSA)
 135 #define _TIF_MSA_CTX_LIVE       (1<<TIF_MSA_CTX_LIVE)
 136 #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
 137
 138 #define _TIF_WORK_SYSCALL_ENTRY (_TIF_NOHZ | _TIF_SYSCALL_TRACE |       \
 139                                  _TIF_SYSCALL_AUDIT | \
 140                                  _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP)
 141
 142 /* work to do in syscall_trace_leave() */
 143 #define _TIF_WORK_SYSCALL_EXIT  (_TIF_NOHZ | _TIF_SYSCALL_TRACE |       \
 144                                  _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)
 145
 146 /* work to do on interrupt/exception return */
 147 #define _TIF_WORK_MASK          \
 148         (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME |     \
 149          _TIF_UPROBE)
 150 /* work to do on any return to u-space */
 151 #define _TIF_ALLWORK_MASK       (_TIF_NOHZ | _TIF_WORK_MASK |           \
 152                                  _TIF_WORK_SYSCALL_EXIT |               \
 153                                  _TIF_SYSCALL_TRACEPOINT)
 154
 155 /*
 156  * We stash processor id into a COP0 register to retrieve it fast
 157  * at kernel exception entry.
 158  */
 159 #if   defined(CONFIG_MIPS_PGD_C0_CONTEXT)
 160 #define SMP_CPUID_REG           20, 0   /* XCONTEXT */
 161 #define ASM_SMP_CPUID_REG       $20
 162 #define SMP_CPUID_PTRSHIFT      48
 163 #else
 164 #define SMP_CPUID_REG           4, 0    /* CONTEXT */
 165 #define ASM_SMP_CPUID_REG       $4
 166 #define SMP_CPUID_PTRSHIFT      23
 167 #endif
 168
 169 #ifdef CONFIG_64BIT
 170 #define SMP_CPUID_REGSHIFT      (SMP_CPUID_PTRSHIFT + 3)
 171 #else
 172 #define SMP_CPUID_REGSHIFT      (SMP_CPUID_PTRSHIFT + 2)
 173 #endif
 174
 175 #define ASM_CPUID_MFC0          MFC0
 176 #define UASM_i_CPUID_MFC0       UASM_i_MFC0
 177
 178 #endif /* __KERNEL__ */
 179 #endif /* _ASM_THREAD_INFO_H */