arch/mips/rb532/gpio.c

   1 /*
   2  *  Miscellaneous functions for IDT EB434 board
   3  *
   4  *  Copyright 2004 IDT Inc. (rischelp@idt.com)
   5  *  Copyright 2006 Phil Sutter <n0-1@freewrt.org>
   6  *  Copyright 2007 Florian Fainelli <florian@openwrt.org>
   7  *
   8  *  This program is free software; you can redistribute  it and/or modify it
   9  *  under  the terms of  the GNU General  Public License as published by the
  10  *  Free Software Foundation;  either version 2 of the  License, or (at your
  11  *  option) any later version.
  12  *
  13  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  14  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  15  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  16  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  17  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  18  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  19  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  20  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  21  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  22  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23  *
  24  *  You should have received a copy of the  GNU General Public License along
  25  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  26  *  675 Mass Ave, Cambridge, MA 02139, USA.
  27  */
  28
  29 #include <linux/kernel.h>
  30 #include <linux/init.h>
  31 #include <linux/types.h>
  32 #include <linux/export.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/platform_device.h>
  35 #include <linux/gpio/driver.h>
  36
  37 #include <asm/mach-rc32434/rb.h>
  38 #include <asm/mach-rc32434/gpio.h>
  39
  40 struct rb532_gpio_chip {
  41         struct gpio_chip chip;
  42         void __iomem     *regbase;
  43 };
  44
  45 static struct resource rb532_gpio_reg0_res[] = {
  46         {
  47                 .name   = "gpio_reg0",
  48                 .start  = REGBASE + GPIOBASE,
  49                 .end    = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
  50                 .flags  = IORESOURCE_MEM,
  51         }
  52 };
  53
  54 /* rb532_set_bit - sanely set a bit
  55  *
  56  * bitval: new value for the bit
  57  * offset: bit index in the 4 byte address range
  58  * ioaddr: 4 byte aligned address being altered
  59  */
  60 static inline void rb532_set_bit(unsigned bitval,
  61                 unsigned offset, void __iomem *ioaddr)
  62 {
  63         unsigned long flags;
  64         u32 val;
  65
  66         local_irq_save(flags);
  67
  68         val = readl(ioaddr);
  69         val &= ~(!bitval << offset);   /* unset bit if bitval == 0 */
  70         val |= (!!bitval << offset);   /* set bit if bitval == 1 */
  71         writel(val, ioaddr);
  72
  73         local_irq_restore(flags);
  74 }
  75
  76 /* rb532_get_bit - read a bit
  77  *
  78  * returns the boolean state of the bit, which may be > 1
  79  */
  80 static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr)
  81 {
  82         return readl(ioaddr) & (1 << offset);
  83 }
  84
  85 /*
  86  * Return GPIO level */
  87 static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset)
  88 {
  89         struct rb532_gpio_chip  *gpch;
  90
  91         gpch = gpiochip_get_data(chip);
  92         return !!rb532_get_bit(offset, gpch->regbase + GPIOD);
  93 }
  94
  95 /*
  96  * Set output GPIO level
  97  */
  98 static void rb532_gpio_set(struct gpio_chip *chip,
  99                                 unsigned offset, int value)
 100 {
 101         struct rb532_gpio_chip  *gpch;
 102
 103         gpch = gpiochip_get_data(chip);
 104         rb532_set_bit(value, offset, gpch->regbase + GPIOD);
 105 }
 106
 107 /*
 108  * Set GPIO direction to input
 109  */
 110 static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 111 {
 112         struct rb532_gpio_chip  *gpch;
 113
 114         gpch = gpiochip_get_data(chip);
 115
 116         /* disable alternate function in case it's set */
 117         rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
 118
 119         rb532_set_bit(0, offset, gpch->regbase + GPIOCFG);
 120         return 0;
 121 }
 122
 123 /*
 124  * Set GPIO direction to output
 125  */
 126 static int rb532_gpio_direction_output(struct gpio_chip *chip,
 127                                         unsigned offset, int value)
 128 {
 129         struct rb532_gpio_chip  *gpch;
 130
 131         gpch = gpiochip_get_data(chip);
 132
 133         /* disable alternate function in case it's set */
 134         rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
 135
 136         /* set the initial output value */
 137         rb532_set_bit(value, offset, gpch->regbase + GPIOD);
 138
 139         rb532_set_bit(1, offset, gpch->regbase + GPIOCFG);
 140         return 0;
 141 }
 142
 143 static int rb532_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
 144 {
 145         return 8 + 4 * 32 + gpio;
 146 }
 147
 148 static struct rb532_gpio_chip rb532_gpio_chip[] = {
 149         [0] = {
 150                 .chip = {
 151                         .label                  = "gpio0",
 152                         .direction_input        = rb532_gpio_direction_input,
 153                         .direction_output       = rb532_gpio_direction_output,
 154                         .get                    = rb532_gpio_get,
 155                         .set                    = rb532_gpio_set,
 156                         .to_irq                 = rb532_gpio_to_irq,
 157                         .base                   = 0,
 158                         .ngpio                  = 32,
 159                 },
 160         },
 161 };
 162
 163 /*
 164  * Set GPIO interrupt level
 165  */
 166 void rb532_gpio_set_ilevel(int bit, unsigned gpio)
 167 {
 168         rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL);
 169 }
 170 EXPORT_SYMBOL(rb532_gpio_set_ilevel);
 171
 172 /*
 173  * Set GPIO interrupt status
 174  */
 175 void rb532_gpio_set_istat(int bit, unsigned gpio)
 176 {
 177         rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT);
 178 }
 179 EXPORT_SYMBOL(rb532_gpio_set_istat);
 180
 181 /*
 182  * Configure GPIO alternate function
 183  */
 184 void rb532_gpio_set_func(unsigned gpio)
 185 {
 186        rb532_set_bit(1, gpio, rb532_gpio_chip->regbase + GPIOFUNC);
 187 }
 188 EXPORT_SYMBOL(rb532_gpio_set_func);
 189
 190 int __init rb532_gpio_init(void)
 191 {
 192         struct resource *r;
 193
 194         r = rb532_gpio_reg0_res;
 195         rb532_gpio_chip->regbase = ioremap_nocache(r->start, resource_size(r));
 196
 197         if (!rb532_gpio_chip->regbase) {
 198                 printk(KERN_ERR "rb532: cannot remap GPIO register 0\n");
 199                 return -ENXIO;
 200         }
 201
 202         /* Register our GPIO chip */
 203         gpiochip_add_data(&rb532_gpio_chip->chip, rb532_gpio_chip);
 204
 205         return 0;
 206 }
 207 arch_initcall(rb532_gpio_init);