2 * MPC5121E ADS Device Tree Source
4 * Copyright 2007-2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 #include "mpc5121.dtsi"
16 compatible = "fsl,mpc5121ads", "fsl,mpc5121";
20 * ADS has two Hynix 512MB Nand flash chips in a single
27 reg = <0x00000000 0x40000000>; /* 512MB + 512MB */
32 ranges = <0x0 0x0 0xfc000000 0x04000000
33 0x2 0x0 0x82000000 0x00008000>;
36 compatible = "cfi-flash";
37 reg = <0 0x0 0x4000000>;
45 reg = <0x00000000 0x00040000>; // first sector is protected
50 reg = <0x00040000 0x03c00000>; // 60M for filesystem
54 reg = <0x03c40000 0x00280000>; // 2.5M for kernel
57 label = "device-tree";
58 reg = <0x03ec0000 0x00040000>; // one sector for device tree
62 reg = <0x03f00000 0x00100000>; // 1M for u-boot
68 compatible = "fsl,mpc5121ads-cpld";
69 reg = <0x2 0x0 0x8000>;
73 compatible = "fsl,mpc5121ads-cpld-pic";
75 #interrupt-cells = <2>;
78 * all irqs but touch screen are routed to irq0 (ipic 48)
79 * touch screen is statically routed to irq1 (ipic 17)
80 * so don't use it here
82 interrupts = <48 0x8>;
89 fsl,preserve-clocking;
92 compatible = "adi,ad7414";
97 compatible = "atmel,24c32";
102 compatible = "st,m41t62";
107 eth0: ethernet@2800 {
108 phy-handle = <&phy0>;
124 phy0: ethernet-phy@0 {
129 /* mpc5121ads only uses USB0 */
134 /* USB0 using internal UTMI PHY */
138 fsl,invert-pwr-fault;
141 /* PSC3 serial port A aka ttyPSC0 */
143 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
146 /* PSC4 serial port B aka ttyPSC1 */
148 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
151 /* PSC5 in ac97 mode */
153 compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
154 fsl,mode = "ac97-slave";
155 fsl,rx-fifo-size = <384>;
156 fsl,tx-fifo-size = <384>;
161 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
163 /* IDSEL 0x15 - Slot 1 PCI */
164 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
165 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
166 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
167 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8
169 /* IDSEL 0x16 - Slot 2 MiniPCI */
170 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
171 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8
173 /* IDSEL 0x17 - Slot 3 MiniPCI */
174 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
175 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8