2 * MPC8349E-mITX-GP Device Tree Source
4 * Copyright 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "MPC8349EMITXGP";
16 compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>; // from bootloader
39 bus-frequency = <0>; // from bootloader
40 clock-frequency = <0>; // from bootloader
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>;
53 compatible = "simple-bus";
54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x00000200>;
56 bus-frequency = <0>; // from bootloader
59 device_type = "watchdog";
60 compatible = "mpc83xx_wdt";
68 compatible = "fsl-i2c";
70 interrupts = <14 0x8>;
71 interrupt-parent = <&ipic>;
79 compatible = "fsl-i2c";
81 interrupts = <15 0x8>;
82 interrupt-parent = <&ipic>;
86 compatible = "dallas,ds1339";
88 interrupts = <18 0x8>;
89 interrupt-parent = <&ipic>;
95 compatible = "fsl,spi";
96 reg = <0x7000 0x1000>;
97 interrupts = <16 0x8>;
98 interrupt-parent = <&ipic>;
103 #address-cells = <1>;
105 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
107 ranges = <0 0x8100 0x1a8>;
108 interrupt-parent = <&ipic>;
112 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
115 interrupt-parent = <&ipic>;
119 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
122 interrupt-parent = <&ipic>;
126 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
129 interrupt-parent = <&ipic>;
133 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
136 interrupt-parent = <&ipic>;
142 compatible = "fsl-usb2-dr";
143 reg = <0x23000 0x1000>;
144 #address-cells = <1>;
146 interrupt-parent = <&ipic>;
147 interrupts = <38 0x8>;
152 enet0: ethernet@24000 {
153 #address-cells = <1>;
156 device_type = "network";
158 compatible = "gianfar";
159 reg = <0x24000 0x1000>;
160 ranges = <0x0 0x24000 0x1000>;
161 local-mac-address = [ 00 00 00 00 00 00 ];
162 interrupts = <32 0x8 33 0x8 34 0x8>;
163 interrupt-parent = <&ipic>;
164 tbi-handle = <&tbi0>;
165 phy-handle = <&phy1c>;
166 linux,network-index = <0>;
169 #address-cells = <1>;
171 compatible = "fsl,gianfar-mdio";
175 phy1c: ethernet-phy@1c {
176 interrupt-parent = <&ipic>;
177 interrupts = <18 0x8>;
183 device_type = "tbi-phy";
188 serial0: serial@4500 {
190 device_type = "serial";
191 compatible = "fsl,ns16550", "ns16550";
192 reg = <0x4500 0x100>;
193 clock-frequency = <0>; // from bootloader
194 interrupts = <9 0x8>;
195 interrupt-parent = <&ipic>;
198 serial1: serial@4600 {
200 device_type = "serial";
201 compatible = "fsl,ns16550", "ns16550";
202 reg = <0x4600 0x100>;
203 clock-frequency = <0>; // from bootloader
204 interrupts = <10 0x8>;
205 interrupt-parent = <&ipic>;
209 compatible = "fsl,sec2.0";
210 reg = <0x30000 0x10000>;
211 interrupts = <11 0x8>;
212 interrupt-parent = <&ipic>;
213 fsl,num-channels = <4>;
214 fsl,channel-fifo-len = <24>;
215 fsl,exec-units-mask = <0x7e>;
216 fsl,descriptor-types-mask = <0x01010ebf>;
220 interrupt-controller;
221 #address-cells = <0>;
222 #interrupt-cells = <2>;
224 device_type = "ipic";
229 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
231 /* IDSEL 0x0F - PCI Slot */
232 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
233 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
235 interrupt-parent = <&ipic>;
236 interrupts = <67 0x8>;
237 bus-range = <0x1 0x1>;
238 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
239 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
240 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
241 clock-frequency = <66666666>;
242 #interrupt-cells = <1>;
244 #address-cells = <3>;
245 reg = <0xe0008600 0x100 /* internal registers */
246 0xe0008380 0x8>; /* config space access registers */
247 compatible = "fsl,mpc8349-pci";