2 * MPC8377E WLAN Device Tree Source
4 * Copyright 2007-2009 Freescale Semiconductor Inc.
5 * Copyright 2009 MontaVista Software, Inc.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
16 compatible = "fsl,mpc8377wlan";
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
40 i-cache-size = <32768>;
41 timebase-frequency = <0>;
43 clock-frequency = <0>;
48 device_type = "memory";
49 reg = <0x00000000 0x20000000>; // 512MB at 0
55 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
56 reg = <0xe0005000 0x1000>;
57 interrupts = <77 0x8>;
58 interrupt-parent = <&ipic>;
59 ranges = <0x0 0x0 0xfc000000 0x04000000>;
64 compatible = "cfi-flash";
65 reg = <0x0 0x0 0x4000000>;
76 reg = <0xa0000 0x300000>;
81 reg = <0x3a0000 0x3c60000>;
91 compatible = "simple-bus";
92 ranges = <0x0 0xe0000000 0x00100000>;
93 reg = <0xe0000000 0x00000200>;
97 device_type = "watchdog";
98 compatible = "mpc83xx_wdt";
102 gpio1: gpio-controller@c00 {
104 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
106 interrupts = <74 0x8>;
107 interrupt-parent = <&ipic>;
111 gpio2: gpio-controller@d00 {
113 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
115 interrupts = <75 0x8>;
116 interrupt-parent = <&ipic>;
121 #address-cells = <1>;
123 compatible = "simple-bus";
124 sleep = <&pmc 0x0c000000>;
128 #address-cells = <1>;
131 compatible = "fsl-i2c";
132 reg = <0x3000 0x100>;
133 interrupts = <14 0x8>;
134 interrupt-parent = <&ipic>;
138 compatible = "atmel,24c256";
143 compatible = "dallas,ds1339";
149 compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
150 reg = <0x2e000 0x1000>;
151 interrupts = <42 0x8>;
152 interrupt-parent = <&ipic>;
154 clock-frequency = <133333333>;
159 #address-cells = <1>;
162 compatible = "fsl-i2c";
163 reg = <0x3100 0x100>;
164 interrupts = <15 0x8>;
165 interrupt-parent = <&ipic>;
171 compatible = "fsl,spi";
172 reg = <0x7000 0x1000>;
173 interrupts = <16 0x8>;
174 interrupt-parent = <&ipic>;
179 #address-cells = <1>;
181 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
183 ranges = <0 0x8100 0x1a8>;
184 interrupt-parent = <&ipic>;
188 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
191 interrupt-parent = <&ipic>;
195 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
198 interrupt-parent = <&ipic>;
202 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
205 interrupt-parent = <&ipic>;
209 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
212 interrupt-parent = <&ipic>;
218 compatible = "fsl-usb2-dr";
219 reg = <0x23000 0x1000>;
220 #address-cells = <1>;
222 interrupt-parent = <&ipic>;
223 interrupts = <38 0x8>;
225 sleep = <&pmc 0x00c00000>;
228 enet0: ethernet@24000 {
229 #address-cells = <1>;
232 device_type = "network";
234 compatible = "gianfar";
235 reg = <0x24000 0x1000>;
236 ranges = <0x0 0x24000 0x1000>;
237 local-mac-address = [ 00 00 00 00 00 00 ];
238 interrupts = <32 0x8 33 0x8 34 0x8>;
239 phy-connection-type = "mii";
240 interrupt-parent = <&ipic>;
241 tbi-handle = <&tbi0>;
242 phy-handle = <&phy2>;
243 sleep = <&pmc 0xc0000000>;
247 #address-cells = <1>;
249 compatible = "fsl,gianfar-mdio";
252 phy2: ethernet-phy@2 {
253 interrupt-parent = <&ipic>;
254 interrupts = <17 0x8>;
258 phy3: ethernet-phy@3 {
259 interrupt-parent = <&ipic>;
260 interrupts = <18 0x8>;
266 device_type = "tbi-phy";
271 enet1: ethernet@25000 {
272 #address-cells = <1>;
275 device_type = "network";
277 compatible = "gianfar";
278 reg = <0x25000 0x1000>;
279 ranges = <0x0 0x25000 0x1000>;
280 local-mac-address = [ 00 00 00 00 00 00 ];
281 interrupts = <35 0x8 36 0x8 37 0x8>;
282 phy-connection-type = "mii";
283 interrupt-parent = <&ipic>;
284 phy-handle = <&phy3>;
285 tbi-handle = <&tbi1>;
286 sleep = <&pmc 0x30000000>;
290 #address-cells = <1>;
292 compatible = "fsl,gianfar-tbi";
297 device_type = "tbi-phy";
302 serial0: serial@4500 {
304 device_type = "serial";
305 compatible = "fsl,ns16550", "ns16550";
306 reg = <0x4500 0x100>;
307 clock-frequency = <0>;
308 interrupts = <9 0x8>;
309 interrupt-parent = <&ipic>;
312 serial1: serial@4600 {
314 device_type = "serial";
315 compatible = "fsl,ns16550", "ns16550";
316 reg = <0x4600 0x100>;
317 clock-frequency = <0>;
318 interrupts = <10 0x8>;
319 interrupt-parent = <&ipic>;
323 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
324 "fsl,sec2.1", "fsl,sec2.0";
325 reg = <0x30000 0x10000>;
326 interrupts = <11 0x8>;
327 interrupt-parent = <&ipic>;
328 fsl,num-channels = <4>;
329 fsl,channel-fifo-len = <24>;
330 fsl,exec-units-mask = <0x9fe>;
331 fsl,descriptor-types-mask = <0x3ab0ebf>;
332 sleep = <&pmc 0x03000000>;
336 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
337 reg = <0x18000 0x1000>;
338 interrupts = <44 0x8>;
339 interrupt-parent = <&ipic>;
340 sleep = <&pmc 0x000000c0>;
344 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
345 reg = <0x19000 0x1000>;
346 interrupts = <45 0x8>;
347 interrupt-parent = <&ipic>;
348 sleep = <&pmc 0x00000030>;
352 * interrupts cell = <intr #, sense>
353 * sense values match linux IORESOURCE_IRQ_* defines:
354 * sense == 8: Level, low assertion
355 * sense == 2: Edge, high-to-low change
357 ipic: interrupt-controller@700 {
358 compatible = "fsl,ipic";
359 interrupt-controller;
360 #address-cells = <0>;
361 #interrupt-cells = <2>;
366 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
367 reg = <0xb00 0x100 0xa00 0x100>;
368 interrupts = <80 0x8>;
369 interrupt-parent = <&ipic>;
374 interrupt-map-mask = <0xf800 0 0 7>;
376 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
378 /* IDSEL AD14 IRQ6 inta */
379 0x7000 0x0 0x0 0x1 &ipic 22 0x8
381 /* IDSEL AD15 IRQ5 inta */
382 0x7800 0x0 0x0 0x1 &ipic 21 0x8>;
383 interrupt-parent = <&ipic>;
384 interrupts = <66 0x8>;
386 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
387 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
388 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
389 sleep = <&pmc 0x00010000>;
390 clock-frequency = <66666666>;
391 #interrupt-cells = <1>;
393 #address-cells = <3>;
394 reg = <0xe0008500 0x100 /* internal registers */
395 0xe0008300 0x8>; /* config space access registers */
396 compatible = "fsl,mpc8349-pci";
400 pci1: pcie@e0009000 {
401 #address-cells = <3>;
403 #interrupt-cells = <1>;
405 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
406 reg = <0xe0009000 0x00001000>;
407 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
408 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
410 interrupt-map-mask = <0xf800 0 0 7>;
411 interrupt-map = <0 0 0 1 &ipic 1 8
415 sleep = <&pmc 0x00300000>;
416 clock-frequency = <0>;
419 #address-cells = <3>;
423 ranges = <0x02000000 0 0xa8000000
424 0x02000000 0 0xa8000000
426 0x01000000 0 0x00000000
427 0x01000000 0 0x00000000
432 pci2: pcie@e000a000 {
433 #address-cells = <3>;
435 #interrupt-cells = <1>;
437 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
438 reg = <0xe000a000 0x00001000>;
439 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
440 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
442 interrupt-map-mask = <0xf800 0 0 7>;
443 interrupt-map = <0 0 0 1 &ipic 2 8
447 sleep = <&pmc 0x000c0000>;
448 clock-frequency = <0>;
451 #address-cells = <3>;
455 ranges = <0x02000000 0 0xc8000000
456 0x02000000 0 0xc8000000
458 0x01000000 0 0x00000000
459 0x01000000 0 0x00000000