| blob | ed5d12ff2ee02f3323972cd22f8ef4e44ffc9b8c |
1 /*
2 * MPC8379E RDB Device Tree Source
3 *
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
12 /dts-v1/;
14 / {
15 compatible = "fsl,mpc8379rdb";
16 #address-cells = <1>;
17 #size-cells = <1>;
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
25 };
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
31 PowerPC,8379@0 {
32 device_type = "cpu";
33 reg = <0x0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>;
39 bus-frequency = <0>;
40 clock-frequency = <0>;
41 };
42 };
44 memory {
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>; // 256MB at 0
47 };
49 localbus@e0005000 {
50 #address-cells = <2>;
51 #size-cells = <1>;
52 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
53 reg = <0xe0005000 0x1000>;
54 interrupts = <77 0x8>;
55 interrupt-parent = <&ipic>;
57 // CS0 and CS1 are swapped when
58 // booting from nand, but the
59 // addresses are the same.
60 ranges = <0x0 0x0 0xfe000000 0x00800000
61 0x1 0x0 0xe0600000 0x00008000
62 0x2 0x0 0xf0000000 0x00020000
63 0x3 0x0 0xfa000000 0x00008000>;
65 flash@0,0 {
66 #address-cells = <1>;
67 #size-cells = <1>;
68 compatible = "cfi-flash";
69 reg = <0x0 0x0 0x800000>;
70 bank-width = <2>;
71 device-width = <1>;
72 };
74 nand@1,0 {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "fsl,mpc8379-fcm-nand",
78 "fsl,elbc-fcm-nand";
79 reg = <0x1 0x0 0x8000>;
81 u-boot@0 {
82 reg = <0x0 0x100000>;
83 read-only;
84 };
86 kernel@100000 {
87 reg = <0x100000 0x300000>;
88 };
89 fs@400000 {
90 reg = <0x400000 0x1c00000>;
91 };
92 };
93 };
95 immr@e0000000 {
96 #address-cells = <1>;
97 #size-cells = <1>;
98 device_type = "soc";
99 compatible = "simple-bus";
100 ranges = <0x0 0xe0000000 0x00100000>;
101 reg = <0xe0000000 0x00000200>;
102 bus-frequency = <0>;
104 wdt@200 {
105 device_type = "watchdog";
106 compatible = "mpc83xx_wdt";
107 reg = <0x200 0x100>;
108 };
110 gpio1: gpio-controller@c00 {
111 #gpio-cells = <2>;
112 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
113 reg = <0xc00 0x100>;
114 interrupts = <74 0x8>;
115 interrupt-parent = <&ipic>;
116 gpio-controller;
117 };
119 gpio2: gpio-controller@d00 {
120 #gpio-cells = <2>;
121 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
122 reg = <0xd00 0x100>;
123 interrupts = <75 0x8>;
124 interrupt-parent = <&ipic>;
125 gpio-controller;
126 };
128 sleep-nexus {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 compatible = "simple-bus";
132 sleep = <&pmc 0x0c000000>;
133 ranges;
135 i2c@3000 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 cell-index = <0>;
139 compatible = "fsl-i2c";
140 reg = <0x3000 0x100>;
141 interrupts = <14 0x8>;
142 interrupt-parent = <&ipic>;
143 dfsrr;
145 dtt@48 {
146 compatible = "national,lm75";
147 reg = <0x48>;
148 };
150 at24@50 {
151 compatible = "atmel,24c256";
152 reg = <0x50>;
153 };
155 rtc@68 {
156 compatible = "dallas,ds1339";
157 reg = <0x68>;
158 };
160 mcu_pio: mcu@a {
161 #gpio-cells = <2>;
162 compatible = "fsl,mc9s08qg8-mpc8379erdb",
163 "fsl,mcu-mpc8349emitx";
164 reg = <0x0a>;
165 gpio-controller;
166 };
167 };
169 sdhci@2e000 {
170 compatible = "fsl,mpc8379-esdhc", "fsl,esdhc";
171 reg = <0x2e000 0x1000>;
172 interrupts = <42 0x8>;
173 interrupt-parent = <&ipic>;
174 sdhci,wp-inverted;
175 /* Filled in by U-Boot */
176 clock-frequency = <111111111>;
177 };
178 };
180 i2c@3100 {
181 #address-cells = <1>;
182 #size-cells = <0>;
183 cell-index = <1>;
184 compatible = "fsl-i2c";
185 reg = <0x3100 0x100>;
186 interrupts = <15 0x8>;
187 interrupt-parent = <&ipic>;
188 dfsrr;
189 };
191 spi@7000 {
192 cell-index = <0>;
193 compatible = "fsl,spi";
194 reg = <0x7000 0x1000>;
195 interrupts = <16 0x8>;
196 interrupt-parent = <&ipic>;
197 mode = "cpu";
198 };
200 dma@82a8 {
201 #address-cells = <1>;
202 #size-cells = <1>;
203 compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
204 reg = <0x82a8 4>;
205 ranges = <0 0x8100 0x1a8>;
206 interrupt-parent = <&ipic>;
207 interrupts = <71 8>;
208 cell-index = <0>;
209 dma-channel@0 {
210 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
211 reg = <0 0x80>;
212 cell-index = <0>;
213 interrupt-parent = <&ipic>;
214 interrupts = <71 8>;
215 };
216 dma-channel@80 {
217 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
218 reg = <0x80 0x80>;
219 cell-index = <1>;
220 interrupt-parent = <&ipic>;
221 interrupts = <71 8>;
222 };
223 dma-channel@100 {
224 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
225 reg = <0x100 0x80>;
226 cell-index = <2>;
227 interrupt-parent = <&ipic>;
228 interrupts = <71 8>;
229 };
230 dma-channel@180 {
231 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
232 reg = <0x180 0x28>;
233 cell-index = <3>;
234 interrupt-parent = <&ipic>;
235 interrupts = <71 8>;
236 };
237 };
239 usb@23000 {
240 compatible = "fsl-usb2-dr";
241 reg = <0x23000 0x1000>;
242 #address-cells = <1>;
243 #size-cells = <0>;
244 interrupt-parent = <&ipic>;
245 interrupts = <38 0x8>;
246 phy_type = "ulpi";
247 sleep = <&pmc 0x00c00000>;
248 };
250 enet0: ethernet@24000 {
251 #address-cells = <1>;
252 #size-cells = <1>;
253 cell-index = <0>;
254 device_type = "network";
255 model = "eTSEC";
256 compatible = "gianfar";
257 reg = <0x24000 0x1000>;
258 ranges = <0x0 0x24000 0x1000>;
259 local-mac-address = [ 00 00 00 00 00 00 ];
260 interrupts = <32 0x8 33 0x8 34 0x8>;
261 phy-connection-type = "mii";
262 interrupt-parent = <&ipic>;
263 tbi-handle = <&tbi0>;
264 phy-handle = <&phy2>;
265 sleep = <&pmc 0xc0000000>;
266 fsl,magic-packet;
268 mdio@520 {
269 #address-cells = <1>;
270 #size-cells = <0>;
271 compatible = "fsl,gianfar-mdio";
272 reg = <0x520 0x20>;
274 phy2: ethernet-phy@2 {
275 interrupt-parent = <&ipic>;
276 interrupts = <17 0x8>;
277 reg = <0x2>;
278 };
280 tbi0: tbi-phy@11 {
281 reg = <0x11>;
282 device_type = "tbi-phy";
283 };
284 };
285 };
287 enet1: ethernet@25000 {
288 #address-cells = <1>;
289 #size-cells = <1>;
290 cell-index = <1>;
291 device_type = "network";
292 model = "eTSEC";
293 compatible = "gianfar";
294 reg = <0x25000 0x1000>;
295 ranges = <0x0 0x25000 0x1000>;
296 local-mac-address = [ 00 00 00 00 00 00 ];
297 interrupts = <35 0x8 36 0x8 37 0x8>;
298 phy-connection-type = "mii";
299 interrupt-parent = <&ipic>;
300 fixed-link = <1 1 1000 0 0>;
301 tbi-handle = <&tbi1>;
302 sleep = <&pmc 0x30000000>;
303 fsl,magic-packet;
305 mdio@520 {
306 #address-cells = <1>;
307 #size-cells = <0>;
308 compatible = "fsl,gianfar-tbi";
309 reg = <0x520 0x20>;
311 tbi1: tbi-phy@11 {
312 reg = <0x11>;
313 device_type = "tbi-phy";
314 };
315 };
316 };
318 serial0: serial@4500 {
319 cell-index = <0>;
320 device_type = "serial";
321 compatible = "fsl,ns16550", "ns16550";
322 reg = <0x4500 0x100>;
323 clock-frequency = <0>;
324 interrupts = <9 0x8>;
325 interrupt-parent = <&ipic>;
326 };
328 serial1: serial@4600 {
329 cell-index = <1>;
330 device_type = "serial";
331 compatible = "fsl,ns16550", "ns16550";
332 reg = <0x4600 0x100>;
333 clock-frequency = <0>;
334 interrupts = <10 0x8>;
335 interrupt-parent = <&ipic>;
336 };
338 crypto@30000 {
339 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
340 "fsl,sec2.1", "fsl,sec2.0";
341 reg = <0x30000 0x10000>;
342 interrupts = <11 0x8>;
343 interrupt-parent = <&ipic>;
344 fsl,num-channels = <4>;
345 fsl,channel-fifo-len = <24>;
346 fsl,exec-units-mask = <0x9fe>;
347 fsl,descriptor-types-mask = <0x3ab0ebf>;
348 sleep = <&pmc 0x03000000>;
349 };
351 sata@18000 {
352 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
353 reg = <0x18000 0x1000>;
354 interrupts = <44 0x8>;
355 interrupt-parent = <&ipic>;
356 sleep = <&pmc 0x000000c0>;
357 };
359 sata@19000 {
360 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
361 reg = <0x19000 0x1000>;
362 interrupts = <45 0x8>;
363 interrupt-parent = <&ipic>;
364 sleep = <&pmc 0x00000030>;
365 };
367 sata@1a000 {
368 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
369 reg = <0x1a000 0x1000>;
370 interrupts = <46 0x8>;
371 interrupt-parent = <&ipic>;
372 sleep = <&pmc 0x0000000c>;
373 };
375 sata@1b000 {
376 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
377 reg = <0x1b000 0x1000>;
378 interrupts = <47 0x8>;
379 interrupt-parent = <&ipic>;
380 sleep = <&pmc 0x00000003>;
381 };
383 /* IPIC
384 * interrupts cell = <intr #, sense>
385 * sense values match linux IORESOURCE_IRQ_* defines:
386 * sense == 8: Level, low assertion
387 * sense == 2: Edge, high-to-low change
388 */
389 ipic: interrupt-controller@700 {
390 compatible = "fsl,ipic";
391 interrupt-controller;
392 #address-cells = <0>;
393 #interrupt-cells = <2>;
394 reg = <0x700 0x100>;
395 };
397 pmc: power@b00 {
398 compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
399 reg = <0xb00 0x100 0xa00 0x100>;
400 interrupts = <80 0x8>;
401 interrupt-parent = <&ipic>;
402 };
403 };
405 pci0: pci@e0008500 {
406 interrupt-map-mask = <0xf800 0 0 7>;
407 interrupt-map = <
408 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
410 /* IDSEL AD14 IRQ6 inta */
411 0x7000 0x0 0x0 0x1 &ipic 22 0x8
413 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
414 0x7800 0x0 0x0 0x1 &ipic 21 0x8
415 0x7800 0x0 0x0 0x2 &ipic 22 0x8
416 0x7800 0x0 0x0 0x4 &ipic 23 0x8
418 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
419 0xE000 0x0 0x0 0x1 &ipic 23 0x8
420 0xE000 0x0 0x0 0x2 &ipic 21 0x8
421 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
422 interrupt-parent = <&ipic>;
423 interrupts = <66 0x8>;
424 bus-range = <0x0 0x0>;
425 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
426 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
427 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
428 sleep = <&pmc 0x00010000>;
429 clock-frequency = <66666666>;
430 #interrupt-cells = <1>;
431 #size-cells = <2>;
432 #address-cells = <3>;
433 reg = <0xe0008500 0x100 /* internal registers */
434 0xe0008300 0x8>; /* config space access registers */
435 compatible = "fsl,mpc8349-pci";
436 device_type = "pci";
437 };
439 leds {
440 compatible = "gpio-leds";
442 pwr {
443 gpios = <&mcu_pio 0 0>;
444 default-state = "on";
445 };
447 hdd {
448 gpios = <&mcu_pio 1 0>;
449 linux,default-trigger = "disk-activity";
450 };
451 };
452 };