arch/powerpc/boot/dts/sbc8349.dts

   1 /*
   2  * SBC8349E Device Tree Source
   3  *
   4  * Copyright 2007 Wind River Inc.
   5  *
   6  * Paul Gortmaker (see MAINTAINERS for contact information)
   7  *
   8  *      -based largely on the Freescale MPC834x_MDS dts.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 /dts-v1/;
  17
  18 / {
  19         model = "SBC8349E";
  20         compatible = "SBC834xE";
  21         #address-cells = <1>;
  22         #size-cells = <1>;
  23
  24         aliases {
  25                 ethernet0 = &enet0;
  26                 ethernet1 = &enet1;
  27                 serial0 = &serial0;
  28                 serial1 = &serial1;
  29                 pci0 = &pci0;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 PowerPC,8349@0 {
  37                         device_type = "cpu";
  38                         reg = <0x0>;
  39                         d-cache-line-size = <32>;
  40                         i-cache-line-size = <32>;
  41                         d-cache-size = <32768>;
  42                         i-cache-size = <32768>;
  43                         timebase-frequency = <0>;       // from bootloader
  44                         bus-frequency = <0>;            // from bootloader
  45                         clock-frequency = <0>;          // from bootloader
  46                 };
  47         };
  48
  49         memory {
  50                 device_type = "memory";
  51                 reg = <0x00000000 0x10000000>;  // 256MB at 0
  52         };
  53
  54         soc8349@e0000000 {
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57                 device_type = "soc";
  58                 ranges = <0x0 0xe0000000 0x00100000>;
  59                 reg = <0xe0000000 0x00000200>;
  60                 bus-frequency = <0>;
  61
  62                 wdt@200 {
  63                         compatible = "mpc83xx_wdt";
  64                         reg = <0x200 0x100>;
  65                 };
  66
  67                 i2c@3000 {
  68                         #address-cells = <1>;
  69                         #size-cells = <0>;
  70                         cell-index = <0>;
  71                         compatible = "fsl-i2c";
  72                         reg = <0x3000 0x100>;
  73                         interrupts = <14 0x8>;
  74                         interrupt-parent = <&ipic>;
  75                         dfsrr;
  76                 };
  77
  78                 i2c@3100 {
  79                         #address-cells = <1>;
  80                         #size-cells = <0>;
  81                         cell-index = <1>;
  82                         compatible = "fsl-i2c";
  83                         reg = <0x3100 0x100>;
  84                         interrupts = <15 0x8>;
  85                         interrupt-parent = <&ipic>;
  86                         dfsrr;
  87                 };
  88
  89                 spi@7000 {
  90                         cell-index = <0>;
  91                         compatible = "fsl,spi";
  92                         reg = <0x7000 0x1000>;
  93                         interrupts = <16 0x8>;
  94                         interrupt-parent = <&ipic>;
  95                         mode = "cpu";
  96                 };
  97
  98                 dma@82a8 {
  99                         #address-cells = <1>;
 100                         #size-cells = <1>;
 101                         compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
 102                         reg = <0x82a8 4>;
 103                         ranges = <0 0x8100 0x1a8>;
 104                         interrupt-parent = <&ipic>;
 105                         interrupts = <71 8>;
 106                         cell-index = <0>;
 107                         dma-channel@0 {
 108                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 109                                 reg = <0 0x80>;
 110                                 cell-index = <0>;
 111                                 interrupt-parent = <&ipic>;
 112                                 interrupts = <71 8>;
 113                         };
 114                         dma-channel@80 {
 115                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 116                                 reg = <0x80 0x80>;
 117                                 cell-index = <1>;
 118                                 interrupt-parent = <&ipic>;
 119                                 interrupts = <71 8>;
 120                         };
 121                         dma-channel@100 {
 122                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 123                                 reg = <0x100 0x80>;
 124                                 cell-index = <2>;
 125                                 interrupt-parent = <&ipic>;
 126                                 interrupts = <71 8>;
 127                         };
 128                         dma-channel@180 {
 129                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 130                                 reg = <0x180 0x28>;
 131                                 cell-index = <3>;
 132                                 interrupt-parent = <&ipic>;
 133                                 interrupts = <71 8>;
 134                         };
 135                 };
 136
 137                 /* phy type (ULPI or SERIAL) are only types supported for MPH */
 138                 /* port = 0 or 1 */
 139                 usb@22000 {
 140                         compatible = "fsl-usb2-mph";
 141                         reg = <0x22000 0x1000>;
 142                         #address-cells = <1>;
 143                         #size-cells = <0>;
 144                         interrupt-parent = <&ipic>;
 145                         interrupts = <39 0x8>;
 146                         phy_type = "ulpi";
 147                         port0;
 148                 };
 149
 150                 enet0: ethernet@24000 {
 151                         #address-cells = <1>;
 152                         #size-cells = <1>;
 153                         cell-index = <0>;
 154                         device_type = "network";
 155                         model = "TSEC";
 156                         compatible = "gianfar";
 157                         reg = <0x24000 0x1000>;
 158                         ranges = <0x0 0x24000 0x1000>;
 159                         local-mac-address = [ 00 00 00 00 00 00 ];
 160                         interrupts = <32 0x8 33 0x8 34 0x8>;
 161                         interrupt-parent = <&ipic>;
 162                         tbi-handle = <&tbi0>;
 163                         phy-handle = <&phy0>;
 164                         linux,network-index = <0>;
 165
 166                         mdio@520 {
 167                                 #address-cells = <1>;
 168                                 #size-cells = <0>;
 169                                 compatible = "fsl,gianfar-mdio";
 170                                 reg = <0x520 0x20>;
 171
 172                                 phy0: ethernet-phy@19 {
 173                                         interrupt-parent = <&ipic>;
 174                                         interrupts = <20 0x8>;
 175                                         reg = <0x19>;
 176                                 };
 177
 178                                 phy1: ethernet-phy@1a {
 179                                         interrupt-parent = <&ipic>;
 180                                         interrupts = <21 0x8>;
 181                                         reg = <0x1a>;
 182                                 };
 183
 184                                 tbi0: tbi-phy@11 {
 185                                         reg = <0x11>;
 186                                         device_type = "tbi-phy";
 187                                 };
 188                         };
 189                 };
 190
 191                 enet1: ethernet@25000 {
 192                         #address-cells = <1>;
 193                         #size-cells = <1>;
 194                         cell-index = <1>;
 195                         device_type = "network";
 196                         model = "TSEC";
 197                         compatible = "gianfar";
 198                         reg = <0x25000 0x1000>;
 199                         ranges = <0x0 0x25000 0x1000>;
 200                         local-mac-address = [ 00 00 00 00 00 00 ];
 201                         interrupts = <35 0x8 36 0x8 37 0x8>;
 202                         interrupt-parent = <&ipic>;
 203                         tbi-handle = <&tbi1>;
 204                         phy-handle = <&phy1>;
 205                         linux,network-index = <1>;
 206
 207                         mdio@520 {
 208                                 #address-cells = <1>;
 209                                 #size-cells = <0>;
 210                                 compatible = "fsl,gianfar-tbi";
 211                                 reg = <0x520 0x20>;
 212
 213                                 tbi1: tbi-phy@11 {
 214                                         reg = <0x11>;
 215                                         device_type = "tbi-phy";
 216                                 };
 217                         };
 218                 };
 219
 220                 serial0: serial@4500 {
 221                         cell-index = <0>;
 222                         device_type = "serial";
 223                         compatible = "fsl,ns16550", "ns16550";
 224                         reg = <0x4500 0x100>;
 225                         clock-frequency = <0>;
 226                         interrupts = <9 0x8>;
 227                         interrupt-parent = <&ipic>;
 228                 };
 229
 230                 serial1: serial@4600 {
 231                         cell-index = <1>;
 232                         device_type = "serial";
 233                         compatible = "fsl,ns16550", "ns16550";
 234                         reg = <0x4600 0x100>;
 235                         clock-frequency = <0>;
 236                         interrupts = <10 0x8>;
 237                         interrupt-parent = <&ipic>;
 238                 };
 239
 240                 crypto@30000 {
 241                         compatible = "fsl,sec2.0";
 242                         reg = <0x30000 0x10000>;
 243                         interrupts = <11 0x8>;
 244                         interrupt-parent = <&ipic>;
 245                         fsl,num-channels = <4>;
 246                         fsl,channel-fifo-len = <24>;
 247                         fsl,exec-units-mask = <0x7e>;
 248                         fsl,descriptor-types-mask = <0x01010ebf>;
 249                 };
 250
 251                 /* IPIC
 252                  * interrupts cell = <intr #, sense>
 253                  * sense values match linux IORESOURCE_IRQ_* defines:
 254                  * sense == 8: Level, low assertion
 255                  * sense == 2: Edge, high-to-low change
 256                  */
 257                 ipic: pic@700 {
 258                         interrupt-controller;
 259                         #address-cells = <0>;
 260                         #interrupt-cells = <2>;
 261                         reg = <0x700 0x100>;
 262                         device_type = "ipic";
 263                 };
 264         };
 265
 266         localbus@e0005000 {
 267                 #address-cells = <2>;
 268                 #size-cells = <1>;
 269                 compatible = "fsl,mpc8349-localbus", "simple-bus";
 270                 reg = <0xe0005000 0x1000>;
 271                 interrupts = <77 0x8>;
 272                 interrupt-parent = <&ipic>;
 273                 ranges = <0x0 0x0 0xff800000 0x00800000         /* 8MB Flash */
 274                           0x1 0x0 0xf8000000 0x00002000         /* 8KB EEPROM */
 275                           0x2 0x0 0x10000000 0x04000000         /* 64MB SDRAM */
 276                           0x3 0x0 0x10000000 0x04000000>;       /* 64MB SDRAM */
 277
 278                 flash@0,0 {
 279                         #address-cells = <1>;
 280                         #size-cells = <1>;
 281                         compatible = "intel,28F640J3A", "cfi-flash";
 282                         reg = <0x0 0x0 0x800000>;
 283                         bank-width = <2>;
 284                         device-width = <1>;
 285
 286                         partition@0 {
 287                                 label = "u-boot";
 288                                 reg = <0x00000000 0x00040000>;
 289                                 read-only;
 290                         };
 291
 292                         partition@40000 {
 293                                 label = "user";
 294                                 reg = <0x00040000 0x006c0000>;
 295                         };
 296
 297                         partition@700000 {
 298                                 label = "legacy u-boot";
 299                                 reg = <0x00700000 0x00100000>;
 300                                 read-only;
 301                         };
 302
 303                 };
 304         };
 305
 306         pci0: pci@e0008500 {
 307                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 308                 interrupt-map = <
 309
 310                                 /* IDSEL 0x11 */
 311                                  0x8800 0x0 0x0 0x1 &ipic 48 0x8
 312                                  0x8800 0x0 0x0 0x2 &ipic 17 0x8
 313                                  0x8800 0x0 0x0 0x3 &ipic 18 0x8
 314                                  0x8800 0x0 0x0 0x4 &ipic 19 0x8>;
 315
 316                 interrupt-parent = <&ipic>;
 317                 interrupts = <0x42 0x8>;
 318                 bus-range = <0 0>;
 319                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 320                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 321                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
 322                 clock-frequency = <66666666>;
 323                 #interrupt-cells = <1>;
 324                 #size-cells = <2>;
 325                 #address-cells = <3>;
 326                 reg = <0xe0008500 0x100         /* internal registers */
 327                        0xe0008300 0x8>;         /* config space access registers */
 328                 compatible = "fsl,mpc8349-pci";
 329                 device_type = "pci";
 330         };
 331 };