arch/powerpc/boot/dts/storcenter.dts

   1 /*
   2  * Device Tree Source for IOMEGA StorCenter
   3  *
   4  * Copyright 2007 Oyvind Repvik
   5  * Copyright 2007 Jon Loeliger
   6  *
   7  * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de>
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2.  This program is licensed "as is" without any
  11  * warranty of any kind, whether express or implied.
  12  */
  13
  14 /dts-v1/;
  15
  16 / {
  17         model = "StorCenter";
  18         compatible = "iomega,storcenter";
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21
  22         aliases {
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26         };
  27
  28         cpus {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31
  32                 PowerPC,8241@0 {
  33                         device_type = "cpu";
  34                         reg = <0>;
  35                         clock-frequency = <200000000>;
  36                         timebase-frequency = <25000000>;
  37                         bus-frequency = <0>;    /* from bootwrapper */
  38                         i-cache-line-size = <32>;
  39                         d-cache-line-size = <32>;
  40                         i-cache-size = <16384>;
  41                         d-cache-size = <16384>;
  42                 };
  43         };
  44
  45         memory {
  46                 device_type = "memory";
  47                 reg = <0x00000000 0x04000000>;  /* 64MB @ 0x0 */
  48         };
  49
  50         soc@fc000000 {
  51                 #address-cells = <1>;
  52                 #size-cells = <1>;
  53                 device_type = "soc";
  54                 compatible = "fsl,mpc8241", "mpc10x";
  55                 store-gathering = <0>; /* 0 == off, !0 == on */
  56                 ranges = <0x0 0xfc000000 0x100000>;
  57                 reg = <0xfc000000 0x100000>;    /* EUMB */
  58                 bus-frequency = <0>;            /* fixed by loader */
  59
  60                 i2c@3000 {
  61                         #address-cells = <1>;
  62                         #size-cells = <0>;
  63                         compatible = "fsl-i2c";
  64                         reg = <0x3000 0x100>;
  65                         interrupts = <17 2>;
  66                         interrupt-parent = <&mpic>;
  67
  68                         rtc@68 {
  69                                 compatible = "dallas,ds1337";
  70                                 reg = <0x68>;
  71                         };
  72                 };
  73
  74                 serial0: serial@4500 {
  75                         cell-index = <0>;
  76                         device_type = "serial";
  77                         compatible = "fsl,ns16550", "ns16550";
  78                         reg = <0x4500 0x20>;
  79                         clock-frequency = <97553800>; /* Hz */
  80                         current-speed = <115200>;
  81                         interrupts = <25 2>;
  82                         interrupt-parent = <&mpic>;
  83                 };
  84
  85                 serial1: serial@4600 {
  86                         cell-index = <1>;
  87                         device_type = "serial";
  88                         compatible = "fsl,ns16550", "ns16550";
  89                         reg = <0x4600 0x20>;
  90                         clock-frequency = <97553800>; /* Hz */
  91                         current-speed = <9600>;
  92                         interrupts = <26 2>;
  93                         interrupt-parent = <&mpic>;
  94                 };
  95
  96                 mpic: interrupt-controller@40000 {
  97                         #interrupt-cells = <2>;
  98                         #address-cells = <0>;
  99                         device_type = "open-pic";
 100                         compatible = "chrp,open-pic";
 101                         interrupt-controller;
 102                         reg = <0x40000 0x40000>;
 103                 };
 104
 105         };
 106
 107         pci0: pci@fe800000 {
 108                 #address-cells = <3>;
 109                 #size-cells = <2>;
 110                 #interrupt-cells = <1>;
 111                 device_type = "pci";
 112                 compatible = "mpc10x-pci";
 113                 reg = <0xfe800000 0x1000>;
 114                 ranges = <0x01000000 0x0        0x0 0xfe000000 0x0 0x00c00000
 115                           0x02000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
 116                 bus-range = <0 0xff>;
 117                 clock-frequency = <97553800>;
 118                 interrupt-parent = <&mpic>;
 119                 interrupt-map-mask = <0xf800 0 0 7>;
 120                 interrupt-map = <
 121                         /* IDSEL 13 - IDE */
 122                         0x6800 0 0 1 &mpic 0 1
 123                         0x6800 0 0 2 &mpic 0 1
 124                         0x6800 0 0 3 &mpic 0 1
 125                         0x6800 0 0 4 &mpic 0 1
 126                         /* IDSEL 14 - USB */
 127                         0x7000 0 0 1 &mpic 0 1
 128                         0x7000 0 0 2 &mpic 0 1
 129                         0x7000 0 0 3 &mpic 0 1
 130                         0x7000 0 0 4 &mpic 0 1
 131                         /* IDSEL 15 - ETH */
 132                         0x7800 0 0 1 &mpic 0 1
 133                         0x7800 0 0 2 &mpic 0 1
 134                         0x7800 0 0 3 &mpic 0 1
 135                         0x7800 0 0 4 &mpic 0 1
 136                 >;
 137         };
 138
 139         chosen {
 140                 linux,stdout-path = &serial0;
 141         };
 142 };