arch/powerpc/include/asm/prom.h

   1 #ifndef _POWERPC_PROM_H
   2 #define _POWERPC_PROM_H
   3 #ifdef __KERNEL__
   4
   5 /*
   6  * Definitions for talking to the Open Firmware PROM on
   7  * Power Macintosh computers.
   8  *
   9  * Copyright (C) 1996-2005 Paul Mackerras.
  10  *
  11  * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version
  16  * 2 of the License, or (at your option) any later version.
  17  */
  18 #include <linux/types.h>
  19 #include <asm/irq.h>
  20 #include <linux/atomic.h>
  21
  22 /* These includes should be removed once implicit includes are cleaned up. */
  23 #include <linux/of.h>
  24 #include <linux/of_fdt.h>
  25 #include <linux/of_address.h>
  26 #include <linux/of_irq.h>
  27 #include <linux/platform_device.h>
  28
  29 #define OF_DT_BEGIN_NODE        0x1             /* Start of node, full name */
  30 #define OF_DT_END_NODE          0x2             /* End node */
  31 #define OF_DT_PROP              0x3             /* Property: name off, size,
  32                                                  * content */
  33 #define OF_DT_NOP               0x4             /* nop */
  34 #define OF_DT_END               0x9
  35
  36 #define OF_DT_VERSION           0x10
  37
  38 /*
  39  * This is what gets passed to the kernel by prom_init or kexec
  40  *
  41  * The dt struct contains the device tree structure, full pathes and
  42  * property contents. The dt strings contain a separate block with just
  43  * the strings for the property names, and is fully page aligned and
  44  * self contained in a page, so that it can be kept around by the kernel,
  45  * each property name appears only once in this page (cheap compression)
  46  *
  47  * the mem_rsvmap contains a map of reserved ranges of physical memory,
  48  * passing it here instead of in the device-tree itself greatly simplifies
  49  * the job of everybody. It's just a list of u64 pairs (base/size) that
  50  * ends when size is 0
  51  */
  52 struct boot_param_header {
  53         __be32  magic;                  /* magic word OF_DT_HEADER */
  54         __be32  totalsize;              /* total size of DT block */
  55         __be32  off_dt_struct;          /* offset to structure */
  56         __be32  off_dt_strings;         /* offset to strings */
  57         __be32  off_mem_rsvmap;         /* offset to memory reserve map */
  58         __be32  version;                /* format version */
  59         __be32  last_comp_version;      /* last compatible version */
  60         /* version 2 fields below */
  61         __be32  boot_cpuid_phys;        /* Physical CPU id we're booting on */
  62         /* version 3 fields below */
  63         __be32  dt_strings_size;        /* size of the DT strings block */
  64         /* version 17 fields below */
  65         __be32  dt_struct_size;         /* size of the DT structure block */
  66 };
  67
  68 /*
  69  * OF address retreival & translation
  70  */
  71
  72 /* Parse the ibm,dma-window property of an OF node into the busno, phys and
  73  * size parameters.
  74  */
  75 void of_parse_dma_window(struct device_node *dn, const __be32 *dma_window,
  76                          unsigned long *busno, unsigned long *phys,
  77                          unsigned long *size);
  78
  79 extern void of_instantiate_rtc(void);
  80
  81 extern int of_get_ibm_chip_id(struct device_node *np);
  82
  83 struct of_drc_info {
  84         char *drc_type;
  85         char *drc_name_prefix;
  86         u32 drc_index_start;
  87         u32 drc_name_suffix_start;
  88         u32 num_sequential_elems;
  89         u32 sequential_inc;
  90         u32 drc_power_domain;
  91         u32 last_drc_index;
  92 };
  93
  94 extern int of_read_drc_info_cell(struct property **prop,
  95                         const __be32 **curval, struct of_drc_info *data);
  96
  97
  98 /*
  99  * There are two methods for telling firmware what our capabilities are.
 100  * Newer machines have an "ibm,client-architecture-support" method on the
 101  * root node.  For older machines, we have to call the "process-elf-header"
 102  * method in the /packages/elf-loader node, passing it a fake 32-bit
 103  * ELF header containing a couple of PT_NOTE sections that contain
 104  * structures that contain various information.
 105  */
 106
 107 /* New method - extensible architecture description vector. */
 108
 109 /* Option vector bits - generic bits in byte 1 */
 110 #define OV_IGNORE               0x80    /* ignore this vector */
 111 #define OV_CESSATION_POLICY     0x40    /* halt if unsupported option present*/
 112
 113 /* Option vector 1: processor architectures supported */
 114 #define OV1_PPC_2_00            0x80    /* set if we support PowerPC 2.00 */
 115 #define OV1_PPC_2_01            0x40    /* set if we support PowerPC 2.01 */
 116 #define OV1_PPC_2_02            0x20    /* set if we support PowerPC 2.02 */
 117 #define OV1_PPC_2_03            0x10    /* set if we support PowerPC 2.03 */
 118 #define OV1_PPC_2_04            0x08    /* set if we support PowerPC 2.04 */
 119 #define OV1_PPC_2_05            0x04    /* set if we support PowerPC 2.05 */
 120 #define OV1_PPC_2_06            0x02    /* set if we support PowerPC 2.06 */
 121 #define OV1_PPC_2_07            0x01    /* set if we support PowerPC 2.07 */
 122
 123 #define OV1_PPC_3_00            0x80    /* set if we support PowerPC 3.00 */
 124
 125 /* Option vector 2: Open Firmware options supported */
 126 #define OV2_REAL_MODE           0x20    /* set if we want OF in real mode */
 127
 128 /* Option vector 3: processor options supported */
 129 #define OV3_FP                  0x80    /* floating point */
 130 #define OV3_VMX                 0x40    /* VMX/Altivec */
 131 #define OV3_DFP                 0x20    /* decimal FP */
 132
 133 /* Option vector 4: IBM PAPR implementation */
 134 #define OV4_MIN_ENT_CAP         0x01    /* minimum VP entitled capacity */
 135
 136 /* Option vector 5: PAPR/OF options supported
 137  * These bits are also used in firmware_has_feature() to validate
 138  * the capabilities reported for vector 5 in the device tree so we
 139  * encode the vector index in the define and use the OV5_FEAT()
 140  * and OV5_INDX() macros to extract the desired information.
 141  */
 142 #define OV5_FEAT(x)     ((x) & 0xff)
 143 #define OV5_INDX(x)     ((x) >> 8)
 144 #define OV5_LPAR                0x0280  /* logical partitioning supported */
 145 #define OV5_SPLPAR              0x0240  /* shared-processor LPAR supported */
 146 /* ibm,dynamic-reconfiguration-memory property supported */
 147 #define OV5_DRCONF_MEMORY       0x0220
 148 #define OV5_LARGE_PAGES         0x0210  /* large pages supported */
 149 #define OV5_DONATE_DEDICATE_CPU 0x0202  /* donate dedicated CPU support */
 150 #define OV5_MSI                 0x0201  /* PCIe/MSI support */
 151 #define OV5_CMO                 0x0480  /* Cooperative Memory Overcommitment */
 152 #define OV5_XCMO                0x0440  /* Page Coalescing */
 153 #define OV5_TYPE1_AFFINITY      0x0580  /* Type 1 NUMA affinity */
 154 #define OV5_PRRN                0x0540  /* Platform Resource Reassignment */
 155 #define OV5_HP_EVT              0x0604  /* Hot Plug Event support */
 156 #define OV5_RESIZE_HPT          0x0601  /* Hash Page Table resizing */
 157 #define OV5_PFO_HW_RNG          0x1180  /* PFO Random Number Generator */
 158 #define OV5_PFO_HW_842          0x1140  /* PFO Compression Accelerator */
 159 #define OV5_PFO_HW_ENCR         0x1120  /* PFO Encryption Accelerator */
 160 #define OV5_SUB_PROCESSORS      0x1501  /* 1,2,or 4 Sub-Processors supported */
 161 #define OV5_DRMEM_V2            0x1680  /* ibm,dynamic-reconfiguration-v2 */
 162 #define OV5_XIVE_SUPPORT        0x17C0  /* XIVE Exploitation Support Mask */
 163 #define OV5_XIVE_LEGACY         0x1700  /* XIVE legacy mode Only */
 164 #define OV5_XIVE_EXPLOIT        0x1740  /* XIVE exploitation mode Only */
 165 #define OV5_XIVE_EITHER         0x1780  /* XIVE legacy or exploitation mode */
 166 /* MMU Base Architecture */
 167 #define OV5_MMU_SUPPORT         0x18C0  /* MMU Mode Support Mask */
 168 #define OV5_MMU_HASH            0x1800  /* Hash MMU Only */
 169 #define OV5_MMU_RADIX           0x1840  /* Radix MMU Only */
 170 #define OV5_MMU_EITHER          0x1880  /* Hash or Radix Supported */
 171 #define OV5_MMU_DYNAMIC         0x18C0  /* Hash or Radix Can Switch Later */
 172 #define OV5_NMMU                0x1820  /* Nest MMU Available */
 173 /* Hash Table Extensions */
 174 #define OV5_HASH_SEG_TBL        0x1980  /* In Memory Segment Tables Available */
 175 #define OV5_HASH_GTSE           0x1940  /* Guest Translation Shoot Down Avail */
 176 /* Radix Table Extensions */
 177 #define OV5_RADIX_GTSE          0x1A40  /* Guest Translation Shoot Down Avail */
 178 #define OV5_DRC_INFO            0x1640  /* Redef Prop Structures: drc-info   */
 179
 180 /* Option Vector 6: IBM PAPR hints */
 181 #define OV6_LINUX               0x02    /* Linux is our OS */
 182
 183 #endif /* __KERNEL__ */
 184 #endif /* _POWERPC_PROM_H */