2 * PowerPC 4xx Clock and Power Management
4 * Copyright (C) 2010, Applied Micro Circuits Corporation
5 * Victor Gallardo (vgallardo@apm.com)
7 * Based on arch/powerpc/platforms/44x/idle.c:
8 * Jerone Young <jyoung5@us.ibm.com>
9 * Copyright 2008 IBM Corp.
11 * Based on arch/powerpc/sysdev/fsl_pmc.c:
12 * Anton Vorontsov <avorontsov@ru.mvista.com>
13 * Copyright 2009 MontaVista Software, Inc.
15 * See file CREDITS for list of people who contributed to this
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <linux/kernel.h>
35 #include <linux/of_platform.h>
36 #include <linux/sysfs.h>
37 #include <linux/cpu.h>
38 #include <linux/suspend.h>
40 #include <asm/dcr-native.h>
41 #include <asm/machdep.h>
47 #define CPM_IDLE_WAIT 0
48 #define CPM_IDLE_DOZE 1
52 unsigned int dcr_offset
[3];
53 unsigned int powersave_off
;
55 unsigned int idle_doze
;
60 static struct cpm cpm
;
62 struct cpm_idle_mode
{
67 static struct cpm_idle_mode idle_mode
[] = {
68 [CPM_IDLE_WAIT
] = { 1, "wait" }, /* default */
69 [CPM_IDLE_DOZE
] = { 0, "doze" },
72 static unsigned int cpm_set(unsigned int cpm_reg
, unsigned int mask
)
76 /* CPM controller supports 3 different types of sleep interface
77 * known as class 1, 2 and 3. For class 1 units, they are
78 * unconditionally put to sleep when the corresponding CPM bit is
79 * set. For class 2 and 3 units this is not case; if they can be
80 * put to to sleep, they will. Here we do not verify, we just
81 * set them and expect them to eventually go off when they can.
83 value
= dcr_read(cpm
.dcr_host
, cpm
.dcr_offset
[cpm_reg
]);
84 dcr_write(cpm
.dcr_host
, cpm
.dcr_offset
[cpm_reg
], value
| mask
);
86 /* return old state, to restore later if needed */
90 static void cpm_idle_wait(void)
92 unsigned long msr_save
;
94 /* save off initial state */
96 /* sync required when CPM0_ER[CPU] is set */
98 /* set wait state MSR */
99 mtmsr(msr_save
|MSR_WE
|MSR_EE
|MSR_CE
|MSR_DE
);
101 /* return to initial state */
106 static void cpm_idle_sleep(unsigned int mask
)
108 unsigned int er_save
;
110 /* update CPM_ER state */
111 er_save
= cpm_set(CPM_ER
, mask
);
113 /* go to wait state so that CPM0_ER[CPU] can take effect */
116 /* restore CPM_ER state */
117 dcr_write(cpm
.dcr_host
, cpm
.dcr_offset
[CPM_ER
], er_save
);
120 static void cpm_idle_doze(void)
122 cpm_idle_sleep(cpm
.idle_doze
);
125 static void cpm_idle_config(int mode
)
129 if (idle_mode
[mode
].enabled
)
132 for (i
= 0; i
< ARRAY_SIZE(idle_mode
); i
++)
133 idle_mode
[i
].enabled
= 0;
135 idle_mode
[mode
].enabled
= 1;
138 static ssize_t
cpm_idle_show(struct kobject
*kobj
,
139 struct kobj_attribute
*attr
, char *buf
)
144 for (i
= 0; i
< ARRAY_SIZE(idle_mode
); i
++) {
145 if (idle_mode
[i
].enabled
)
146 s
+= sprintf(s
, "[%s] ", idle_mode
[i
].name
);
148 s
+= sprintf(s
, "%s ", idle_mode
[i
].name
);
151 *(s
-1) = '\n'; /* convert the last space to a newline */
156 static ssize_t
cpm_idle_store(struct kobject
*kobj
,
157 struct kobj_attribute
*attr
,
158 const char *buf
, size_t n
)
164 p
= memchr(buf
, '\n', n
);
165 len
= p
? p
- buf
: n
;
167 for (i
= 0; i
< ARRAY_SIZE(idle_mode
); i
++) {
168 if (strncmp(buf
, idle_mode
[i
].name
, len
) == 0) {
177 static struct kobj_attribute cpm_idle_attr
=
178 __ATTR(idle
, 0644, cpm_idle_show
, cpm_idle_store
);
180 static void cpm_idle_config_sysfs(void)
185 dev
= get_cpu_device(0);
187 ret
= sysfs_create_file(&dev
->kobj
,
188 &cpm_idle_attr
.attr
);
191 "cpm: failed to create idle sysfs entry\n");
194 static void cpm_idle(void)
196 if (idle_mode
[CPM_IDLE_DOZE
].enabled
)
202 static int cpm_suspend_valid(suspend_state_t state
)
205 case PM_SUSPEND_STANDBY
:
206 return !!cpm
.standby
;
208 return !!cpm
.suspend
;
214 static void cpm_suspend_standby(unsigned int mask
)
216 unsigned long tcr_save
;
218 /* disable decrement interrupt */
219 tcr_save
= mfspr(SPRN_TCR
);
220 mtspr(SPRN_TCR
, tcr_save
& ~TCR_DIE
);
222 /* go to sleep state */
223 cpm_idle_sleep(mask
);
225 /* restore decrement interrupt */
226 mtspr(SPRN_TCR
, tcr_save
);
229 static int cpm_suspend_enter(suspend_state_t state
)
232 case PM_SUSPEND_STANDBY
:
233 cpm_suspend_standby(cpm
.standby
);
236 cpm_suspend_standby(cpm
.suspend
);
243 static const struct platform_suspend_ops cpm_suspend_ops
= {
244 .valid
= cpm_suspend_valid
,
245 .enter
= cpm_suspend_enter
,
248 static int cpm_get_uint_property(struct device_node
*np
,
252 const unsigned int *prop
= of_get_property(np
, name
, &len
);
254 if (prop
== NULL
|| len
< sizeof(u32
))
260 static int __init
cpm_init(void)
262 struct device_node
*np
;
263 int dcr_base
, dcr_len
;
266 if (!cpm
.powersave_off
) {
267 cpm_idle_config(CPM_IDLE_WAIT
);
268 ppc_md
.power_save
= &cpm_idle
;
271 np
= of_find_compatible_node(NULL
, NULL
, "ibm,cpm");
277 dcr_base
= dcr_resource_start(np
, 0);
278 dcr_len
= dcr_resource_len(np
, 0);
280 if (dcr_base
== 0 || dcr_len
== 0) {
281 printk(KERN_ERR
"cpm: could not parse dcr property for %pOF\n",
287 cpm
.dcr_host
= dcr_map(np
, dcr_base
, dcr_len
);
289 if (!DCR_MAP_OK(cpm
.dcr_host
)) {
290 printk(KERN_ERR
"cpm: failed to map dcr property for %pOF\n",
296 /* All 4xx SoCs with a CPM controller have one of two
297 * different order for the CPM registers. Some have the
298 * CPM registers in the following order (ER,FR,SR). The
299 * others have them in the following order (SR,ER,FR).
302 if (cpm_get_uint_property(np
, "er-offset") == 0) {
303 cpm
.dcr_offset
[CPM_ER
] = 0;
304 cpm
.dcr_offset
[CPM_FR
] = 1;
305 cpm
.dcr_offset
[CPM_SR
] = 2;
307 cpm
.dcr_offset
[CPM_ER
] = 1;
308 cpm
.dcr_offset
[CPM_FR
] = 2;
309 cpm
.dcr_offset
[CPM_SR
] = 0;
312 /* Now let's see what IPs to turn off for the following modes */
314 cpm
.unused
= cpm_get_uint_property(np
, "unused-units");
315 cpm
.idle_doze
= cpm_get_uint_property(np
, "idle-doze");
316 cpm
.standby
= cpm_get_uint_property(np
, "standby");
317 cpm
.suspend
= cpm_get_uint_property(np
, "suspend");
319 /* If some IPs are unused let's turn them off now */
322 cpm_set(CPM_ER
, cpm
.unused
);
323 cpm_set(CPM_FR
, cpm
.unused
);
326 /* Now let's export interfaces */
328 if (!cpm
.powersave_off
&& cpm
.idle_doze
)
329 cpm_idle_config_sysfs();
331 if (cpm
.standby
|| cpm
.suspend
)
332 suspend_set_ops(&cpm_suspend_ops
);
339 late_initcall(cpm_init
);
341 static int __init
cpm_powersave_off(char *arg
)
343 cpm
.powersave_off
= 1;
346 __setup("powersave=off", cpm_powersave_off
);