Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / arch / powerpc / platforms / 86xx / mpc86xx_smp.c
blob020e84a47a32f925bf9fefda4a4e9db353cab628
1 /*
2 * Author: Xianghua Xiao <x.xiao@freescale.com>
3 * Zhang Wei <wei.zhang@freescale.com>
5 * Copyright 2006 Freescale Semiconductor Inc.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
13 #include <linux/stddef.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
18 #include <asm/code-patching.h>
19 #include <asm/page.h>
20 #include <asm/pgtable.h>
21 #include <asm/pci-bridge.h>
22 #include <asm/mpic.h>
23 #include <asm/cacheflush.h>
25 #include <sysdev/fsl_soc.h>
27 #include "mpc86xx.h"
29 extern void __secondary_start_mpc86xx(void);
31 #define MCM_PORT_CONFIG_OFFSET 0x10
33 /* Offset from CCSRBAR */
34 #define MPC86xx_MCM_OFFSET (0x1000)
35 #define MPC86xx_MCM_SIZE (0x1000)
37 static void __init
38 smp_86xx_release_core(int nr)
40 __be32 __iomem *mcm_vaddr;
41 unsigned long pcr;
43 if (nr < 0 || nr >= NR_CPUS)
44 return;
47 * Startup Core #nr.
49 mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
50 MPC86xx_MCM_SIZE);
51 pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
52 pcr |= 1 << (nr + 24);
53 out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
55 iounmap(mcm_vaddr);
59 static int __init
60 smp_86xx_kick_cpu(int nr)
62 unsigned int save_vector;
63 unsigned long target, flags;
64 int n = 0;
65 unsigned int *vector = (unsigned int *)(KERNELBASE + 0x100);
67 if (nr < 0 || nr >= NR_CPUS)
68 return -ENOENT;
70 pr_debug("smp_86xx_kick_cpu: kick CPU #%d\n", nr);
72 local_irq_save(flags);
74 /* Save reset vector */
75 save_vector = *vector;
77 /* Setup fake reset vector to call __secondary_start_mpc86xx. */
78 target = (unsigned long) __secondary_start_mpc86xx;
79 patch_branch(vector, target, BRANCH_SET_LINK);
81 /* Kick that CPU */
82 smp_86xx_release_core(nr);
84 /* Wait a bit for the CPU to take the exception. */
85 while ((__secondary_hold_acknowledge != nr) && (n++, n < 1000))
86 mdelay(1);
88 /* Restore the exception vector */
89 *vector = save_vector;
90 flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
92 local_irq_restore(flags);
94 pr_debug("wait CPU #%d for %d msecs.\n", nr, n);
96 return 0;
100 static void __init
101 smp_86xx_setup_cpu(int cpu_nr)
103 mpic_setup_this_cpu();
107 struct smp_ops_t smp_86xx_ops = {
108 .cause_nmi_ipi = NULL,
109 .message_pass = smp_mpic_message_pass,
110 .probe = smp_mpic_probe,
111 .kick_cpu = smp_86xx_kick_cpu,
112 .setup_cpu = smp_86xx_setup_cpu,
113 .take_timebase = smp_generic_take_timebase,
114 .give_timebase = smp_generic_give_timebase,
118 void __init
119 mpc86xx_smp_init(void)
121 smp_ops = &smp_86xx_ops;