arch/powerpc/platforms/powernv/opal-imc.c

   1 /*
   2  * OPAL IMC interface detection driver
   3  * Supported on POWERNV platform
   4  *
   5  * Copyright    (C) 2017 Madhavan Srinivasan, IBM Corporation.
   6  *              (C) 2017 Anju T Sudhakar, IBM Corporation.
   7  *              (C) 2017 Hemant K Shaw, IBM Corporation.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or later version.
  13  */
  14 #include <linux/kernel.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/of.h>
  17 #include <linux/of_address.h>
  18 #include <linux/of_platform.h>
  19 #include <linux/crash_dump.h>
  20 #include <asm/opal.h>
  21 #include <asm/io.h>
  22 #include <asm/imc-pmu.h>
  23 #include <asm/cputhreads.h>
  24 #include <asm/debugfs.h>
  25
  26 static struct dentry *imc_debugfs_parent;
  27
  28 /* Helpers to export imc command and mode via debugfs */
  29 static int imc_mem_get(void *data, u64 *val)
  30 {
  31         *val = cpu_to_be64(*(u64 *)data);
  32         return 0;
  33 }
  34
  35 static int imc_mem_set(void *data, u64 val)
  36 {
  37         *(u64 *)data = cpu_to_be64(val);
  38         return 0;
  39 }
  40 DEFINE_DEBUGFS_ATTRIBUTE(fops_imc_x64, imc_mem_get, imc_mem_set, "0x%016llx\n");
  41
  42 static struct dentry *imc_debugfs_create_x64(const char *name, umode_t mode,
  43                                              struct dentry *parent, u64  *value)
  44 {
  45         return debugfs_create_file_unsafe(name, mode, parent,
  46                                           value, &fops_imc_x64);
  47 }
  48
  49 /*
  50  * export_imc_mode_and_cmd: Create a debugfs interface
  51  *                     for imc_cmd and imc_mode
  52  *                     for each node in the system.
  53  *  imc_mode and imc_cmd can be changed by echo into
  54  *  this interface.
  55  */
  56 static void export_imc_mode_and_cmd(struct device_node *node,
  57                                     struct imc_pmu *pmu_ptr)
  58 {
  59         static u64 loc, *imc_mode_addr, *imc_cmd_addr;
  60         int chip = 0, nid;
  61         char mode[16], cmd[16];
  62         u32 cb_offset;
  63
  64         imc_debugfs_parent = debugfs_create_dir("imc", powerpc_debugfs_root);
  65
  66         /*
  67          * Return here, either because 'imc' directory already exists,
  68          * Or failed to create a new one.
  69          */
  70         if (!imc_debugfs_parent)
  71                 return;
  72
  73         if (of_property_read_u32(node, "cb_offset", &cb_offset))
  74                 cb_offset = IMC_CNTL_BLK_OFFSET;
  75
  76         for_each_node(nid) {
  77                 loc = (u64)(pmu_ptr->mem_info[chip].vbase) + cb_offset;
  78                 imc_mode_addr = (u64 *)(loc + IMC_CNTL_BLK_MODE_OFFSET);
  79                 sprintf(mode, "imc_mode_%d", nid);
  80                 if (!imc_debugfs_create_x64(mode, 0600, imc_debugfs_parent,
  81                                             imc_mode_addr))
  82                         goto err;
  83
  84                 imc_cmd_addr = (u64 *)(loc + IMC_CNTL_BLK_CMD_OFFSET);
  85                 sprintf(cmd, "imc_cmd_%d", nid);
  86                 if (!imc_debugfs_create_x64(cmd, 0600, imc_debugfs_parent,
  87                                             imc_cmd_addr))
  88                         goto err;
  89                 chip++;
  90         }
  91         return;
  92
  93 err:
  94         debugfs_remove_recursive(imc_debugfs_parent);
  95 }
  96
  97 /*
  98  * imc_get_mem_addr_nest: Function to get nest counter memory region
  99  * for each chip
 100  */
 101 static int imc_get_mem_addr_nest(struct device_node *node,
 102                                  struct imc_pmu *pmu_ptr,
 103                                  u32 offset)
 104 {
 105         int nr_chips = 0, i;
 106         u64 *base_addr_arr, baddr;
 107         u32 *chipid_arr;
 108
 109         nr_chips = of_property_count_u32_elems(node, "chip-id");
 110         if (nr_chips <= 0)
 111                 return -ENODEV;
 112
 113         base_addr_arr = kcalloc(nr_chips, sizeof(u64), GFP_KERNEL);
 114         if (!base_addr_arr)
 115                 return -ENOMEM;
 116
 117         chipid_arr = kcalloc(nr_chips, sizeof(u32), GFP_KERNEL);
 118         if (!chipid_arr)
 119                 return -ENOMEM;
 120
 121         if (of_property_read_u32_array(node, "chip-id", chipid_arr, nr_chips))
 122                 goto error;
 123
 124         if (of_property_read_u64_array(node, "base-addr", base_addr_arr,
 125                                                                 nr_chips))
 126                 goto error;
 127
 128         pmu_ptr->mem_info = kcalloc(nr_chips, sizeof(struct imc_mem_info),
 129                                                                 GFP_KERNEL);
 130         if (!pmu_ptr->mem_info)
 131                 goto error;
 132
 133         for (i = 0; i < nr_chips; i++) {
 134                 pmu_ptr->mem_info[i].id = chipid_arr[i];
 135                 baddr = base_addr_arr[i] + offset;
 136                 pmu_ptr->mem_info[i].vbase = phys_to_virt(baddr);
 137         }
 138
 139         pmu_ptr->imc_counter_mmaped = true;
 140         export_imc_mode_and_cmd(node, pmu_ptr);
 141         kfree(base_addr_arr);
 142         kfree(chipid_arr);
 143         return 0;
 144
 145 error:
 146         kfree(pmu_ptr->mem_info);
 147         kfree(base_addr_arr);
 148         kfree(chipid_arr);
 149         return -1;
 150 }
 151
 152 /*
 153  * imc_pmu_create : Takes the parent device which is the pmu unit, pmu_index
 154  *                  and domain as the inputs.
 155  * Allocates memory for the struct imc_pmu, sets up its domain, size and offsets
 156  */
 157 static int imc_pmu_create(struct device_node *parent, int pmu_index, int domain)
 158 {
 159         int ret = 0;
 160         struct imc_pmu *pmu_ptr;
 161         u32 offset;
 162
 163         /* memory for pmu */
 164         pmu_ptr = kzalloc(sizeof(struct imc_pmu), GFP_KERNEL);
 165         if (!pmu_ptr)
 166                 return -ENOMEM;
 167
 168         /* Set the domain */
 169         pmu_ptr->domain = domain;
 170
 171         ret = of_property_read_u32(parent, "size", &pmu_ptr->counter_mem_size);
 172         if (ret) {
 173                 ret = -EINVAL;
 174                 goto free_pmu;
 175         }
 176
 177         if (!of_property_read_u32(parent, "offset", &offset)) {
 178                 if (imc_get_mem_addr_nest(parent, pmu_ptr, offset)) {
 179                         ret = -EINVAL;
 180                         goto free_pmu;
 181                 }
 182         }
 183
 184         /* Function to register IMC pmu */
 185         ret = init_imc_pmu(parent, pmu_ptr, pmu_index);
 186         if (ret)
 187                 pr_err("IMC PMU %s Register failed\n", pmu_ptr->pmu.name);
 188
 189         return 0;
 190
 191 free_pmu:
 192         kfree(pmu_ptr);
 193         return ret;
 194 }
 195
 196 static void disable_nest_pmu_counters(void)
 197 {
 198         int nid, cpu;
 199         const struct cpumask *l_cpumask;
 200
 201         get_online_cpus();
 202         for_each_node_with_cpus(nid) {
 203                 l_cpumask = cpumask_of_node(nid);
 204                 cpu = cpumask_first_and(l_cpumask, cpu_online_mask);
 205                 if (cpu >= nr_cpu_ids)
 206                         continue;
 207                 opal_imc_counters_stop(OPAL_IMC_COUNTERS_NEST,
 208                                        get_hard_smp_processor_id(cpu));
 209         }
 210         put_online_cpus();
 211 }
 212
 213 static void disable_core_pmu_counters(void)
 214 {
 215         cpumask_t cores_map;
 216         int cpu, rc;
 217
 218         get_online_cpus();
 219         /* Disable the IMC Core functions */
 220         cores_map = cpu_online_cores_map();
 221         for_each_cpu(cpu, &cores_map) {
 222                 rc = opal_imc_counters_stop(OPAL_IMC_COUNTERS_CORE,
 223                                             get_hard_smp_processor_id(cpu));
 224                 if (rc)
 225                         pr_err("%s: Failed to stop Core (cpu = %d)\n",
 226                                 __FUNCTION__, cpu);
 227         }
 228         put_online_cpus();
 229 }
 230
 231 int get_max_nest_dev(void)
 232 {
 233         struct device_node *node;
 234         u32 pmu_units = 0, type;
 235
 236         for_each_compatible_node(node, NULL, IMC_DTB_UNIT_COMPAT) {
 237                 if (of_property_read_u32(node, "type", &type))
 238                         continue;
 239
 240                 if (type == IMC_TYPE_CHIP)
 241                         pmu_units++;
 242         }
 243
 244         return pmu_units;
 245 }
 246
 247 static int opal_imc_counters_probe(struct platform_device *pdev)
 248 {
 249         struct device_node *imc_dev = pdev->dev.of_node;
 250         int pmu_count = 0, domain;
 251         u32 type;
 252
 253         /*
 254          * Check whether this is kdump kernel. If yes, force the engines to
 255          * stop and return.
 256          */
 257         if (is_kdump_kernel()) {
 258                 disable_nest_pmu_counters();
 259                 disable_core_pmu_counters();
 260                 return -ENODEV;
 261         }
 262
 263         for_each_compatible_node(imc_dev, NULL, IMC_DTB_UNIT_COMPAT) {
 264                 if (of_property_read_u32(imc_dev, "type", &type)) {
 265                         pr_warn("IMC Device without type property\n");
 266                         continue;
 267                 }
 268
 269                 switch (type) {
 270                 case IMC_TYPE_CHIP:
 271                         domain = IMC_DOMAIN_NEST;
 272                         break;
 273                 case IMC_TYPE_CORE:
 274                         domain =IMC_DOMAIN_CORE;
 275                         break;
 276                 case IMC_TYPE_THREAD:
 277                         domain = IMC_DOMAIN_THREAD;
 278                         break;
 279                 default:
 280                         pr_warn("IMC Unknown Device type \n");
 281                         domain = -1;
 282                         break;
 283                 }
 284
 285                 if (!imc_pmu_create(imc_dev, pmu_count, domain)) {
 286                         if (domain == IMC_DOMAIN_NEST)
 287                                 pmu_count++;
 288                 }
 289         }
 290
 291         /* If none of the nest units are registered, remove debugfs interface */
 292         if (pmu_count == 0)
 293                 debugfs_remove_recursive(imc_debugfs_parent);
 294
 295         return 0;
 296 }
 297
 298 static void opal_imc_counters_shutdown(struct platform_device *pdev)
 299 {
 300         /*
 301          * Function only stops the engines which is bare minimum.
 302          * TODO: Need to handle proper memory cleanup and pmu
 303          * unregister.
 304          */
 305         disable_nest_pmu_counters();
 306         disable_core_pmu_counters();
 307 }
 308
 309 static const struct of_device_id opal_imc_match[] = {
 310         { .compatible = IMC_DTB_COMPAT },
 311         {},
 312 };
 313
 314 static struct platform_driver opal_imc_driver = {
 315         .driver = {
 316                 .name = "opal-imc-counters",
 317                 .of_match_table = opal_imc_match,
 318         },
 319         .probe = opal_imc_counters_probe,
 320         .shutdown = opal_imc_counters_shutdown,
 321 };
 322
 323 builtin_platform_driver(opal_imc_driver);